mirror of https://github.com/PCSX2/pcsx2.git
VIF: Fix up handling of indeterminate data with different alignment. Not sure if this will affect anything, but test results now match the PS2.
git-svn-id: http://pcsx2.googlecode.com/svn/trunk@5751 96395faa-99c1-11dd-bbfe-3dabce05a288
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@ -64,7 +64,8 @@ struct __aligned16 nVifBlock {
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u8 cl; // [03] CL Field
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u32 mask; // [04] Mask Field
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u8 wl; // [08] WL Field
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u8 padding[3];// [09] through [11]
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u8 aligned; // [09] Packet Alignment
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u8 padding[2];// [10] through [11]
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uptr startPtr; // [12] Start Ptr of RecGen Code
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}; // 16 bytes
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@ -64,6 +64,7 @@ VifUnpackSSE_Dynarec::VifUnpackSSE_Dynarec(const nVifStruct& vif_, const nVifBlo
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usn = (vB.upkType>>5) & 1;
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doMask = (vB.upkType>>4) & 1;
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doMode = vB.mode & 3;
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IsAligned = vB.aligned;
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vCL = 0;
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}
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@ -166,7 +167,7 @@ void VifUnpackSSE_Dynarec::ModUnpack( int upknum, bool PostOp )
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case 5:
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case 6: if(PostOp == true) { UnpkLoopIteration++; UnpkLoopIteration = UnpkLoopIteration & 0x1; } break;
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case 8: break;
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case 8: if(PostOp == true) { UnpkLoopIteration++; UnpkLoopIteration = UnpkLoopIteration & 0x1; } break;
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case 9: break;
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case 10: break;
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@ -193,7 +194,7 @@ void VifUnpackSSE_Dynarec::CompileRoutine() {
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uint vNum = vB.num ? vB.num : 256;
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doMode = (upkNum == 0xf) ? 0 : doMode; // V4_5 has no mode feature.
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MSKPATH3_LOG("Compiling new block, unpack number %x, mode %x, masking %x, vNum %x", upkNum, doMode, doMask, vNum);
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pxAssume(vCL == 0);
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// Value passed determines # of col regs we need to load
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@ -313,6 +314,7 @@ _vifT __fi void dVifUnpack(const u8* data, bool isFill) {
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v.block.mode = (u8&)vifRegs.mode;
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v.block.cl = vifRegs.cycle.cl;
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v.block.wl = vifRegs.cycle.wl;
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v.block.aligned = !!(vif.vifpacketsize & 0x1);
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// Zero out the mask parameter if it's unused -- games leave random junk
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// values here which cause false recblock cache misses.
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@ -180,11 +180,14 @@ void VifUnpackSSE_Base::xUPK_V2_32() const {
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if(UnpkLoopIteration == 0)
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{
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xMOV128 (workReg, ptr32[srcIndirect]);
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xPSHUF.D (destReg, workReg, 0x44); //v1v0v1v0
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xPSHUF.D (destReg, workReg, 0x44); //v1v0v1v0
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if(IsAligned)xAND.PS( destReg, ptr128[SSEXYZWMask[0]]); //zero last word - tested on ps2
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}
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else
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{
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xPSHUF.D (destReg, workReg, 0xEE); //v3v2v3v2
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if(IsAligned)xAND.PS( destReg, ptr128[SSEXYZWMask[0]]); //zero last word - tested on ps2
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}
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}
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@ -241,6 +244,8 @@ void VifUnpackSSE_Base::xUPK_V2_8() const {
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void VifUnpackSSE_Base::xUPK_V3_32() const {
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xMOV128 (destReg, ptr128[srcIndirect]);
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if(UnpkLoopIteration == (1-IsAligned))
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xAND.PS( destReg, ptr128[SSEXYZWMask[0]]);
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}
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void VifUnpackSSE_Base::xUPK_V3_16() const {
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@ -36,6 +36,7 @@ public:
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bool doMask; // masking write enable flag
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int UnpkLoopIteration;
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int UnpkNoOfIterations;
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int IsAligned;
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protected:
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