VIF: Fix up handling of indeterminate data with different alignment. Not sure if this will affect anything, but test results now match the PS2.

git-svn-id: http://pcsx2.googlecode.com/svn/trunk@5751 96395faa-99c1-11dd-bbfe-3dabce05a288
This commit is contained in:
refraction@gmail.com 2013-10-24 16:21:45 +00:00
parent 8e59b6bbf5
commit 178563a4b6
4 changed files with 13 additions and 4 deletions

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@ -64,7 +64,8 @@ struct __aligned16 nVifBlock {
u8 cl; // [03] CL Field
u32 mask; // [04] Mask Field
u8 wl; // [08] WL Field
u8 padding[3];// [09] through [11]
u8 aligned; // [09] Packet Alignment
u8 padding[2];// [10] through [11]
uptr startPtr; // [12] Start Ptr of RecGen Code
}; // 16 bytes

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@ -64,6 +64,7 @@ VifUnpackSSE_Dynarec::VifUnpackSSE_Dynarec(const nVifStruct& vif_, const nVifBlo
usn = (vB.upkType>>5) & 1;
doMask = (vB.upkType>>4) & 1;
doMode = vB.mode & 3;
IsAligned = vB.aligned;
vCL = 0;
}
@ -166,7 +167,7 @@ void VifUnpackSSE_Dynarec::ModUnpack( int upknum, bool PostOp )
case 5:
case 6: if(PostOp == true) { UnpkLoopIteration++; UnpkLoopIteration = UnpkLoopIteration & 0x1; } break;
case 8: break;
case 8: if(PostOp == true) { UnpkLoopIteration++; UnpkLoopIteration = UnpkLoopIteration & 0x1; } break;
case 9: break;
case 10: break;
@ -193,7 +194,7 @@ void VifUnpackSSE_Dynarec::CompileRoutine() {
uint vNum = vB.num ? vB.num : 256;
doMode = (upkNum == 0xf) ? 0 : doMode; // V4_5 has no mode feature.
MSKPATH3_LOG("Compiling new block, unpack number %x, mode %x, masking %x, vNum %x", upkNum, doMode, doMask, vNum);
pxAssume(vCL == 0);
// Value passed determines # of col regs we need to load
@ -313,6 +314,7 @@ _vifT __fi void dVifUnpack(const u8* data, bool isFill) {
v.block.mode = (u8&)vifRegs.mode;
v.block.cl = vifRegs.cycle.cl;
v.block.wl = vifRegs.cycle.wl;
v.block.aligned = !!(vif.vifpacketsize & 0x1);
// Zero out the mask parameter if it's unused -- games leave random junk
// values here which cause false recblock cache misses.

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@ -180,11 +180,14 @@ void VifUnpackSSE_Base::xUPK_V2_32() const {
if(UnpkLoopIteration == 0)
{
xMOV128 (workReg, ptr32[srcIndirect]);
xPSHUF.D (destReg, workReg, 0x44); //v1v0v1v0
xPSHUF.D (destReg, workReg, 0x44); //v1v0v1v0
if(IsAligned)xAND.PS( destReg, ptr128[SSEXYZWMask[0]]); //zero last word - tested on ps2
}
else
{
xPSHUF.D (destReg, workReg, 0xEE); //v3v2v3v2
if(IsAligned)xAND.PS( destReg, ptr128[SSEXYZWMask[0]]); //zero last word - tested on ps2
}
}
@ -241,6 +244,8 @@ void VifUnpackSSE_Base::xUPK_V2_8() const {
void VifUnpackSSE_Base::xUPK_V3_32() const {
xMOV128 (destReg, ptr128[srcIndirect]);
if(UnpkLoopIteration == (1-IsAligned))
xAND.PS( destReg, ptr128[SSEXYZWMask[0]]);
}
void VifUnpackSSE_Base::xUPK_V3_16() const {

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@ -36,6 +36,7 @@ public:
bool doMask; // masking write enable flag
int UnpkLoopIteration;
int UnpkNoOfIterations;
int IsAligned;
protected: