mirror of https://github.com/PCSX2/pcsx2.git
Made constant register saving more simple and certain. Grandia 2 is probably the only game that this would've fixed, but maybe there are others.
git-svn-id: http://pcsx2.googlecode.com/svn/trunk@778 96395faa-99c1-11dd-bbfe-3dabce05a288
This commit is contained in:
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c8f3a36d66
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@ -74,8 +74,8 @@ static BASEBLOCKEX* s_pCurBlockEx = NULL;
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static u32 s_nEndBlock = 0; // what psxpc the current block ends
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static u32 s_ConstGPRreg;
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static u32 s_saveConstGPRreg = 0, s_saveHasConstReg = 0, s_saveFlushedConstReg = 0;
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static u32 s_saveConstRegs[32];
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static u32 s_saveHasConstReg = 0, s_saveFlushedConstReg = 0;
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static EEINST* s_psaveInstInfo = NULL;
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u32 s_psxBlockCycles = 0; // cycles of current block recompiling
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@ -334,7 +334,7 @@ void _psxFlushCall(int flushtype)
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void psxSaveBranchState()
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{
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s_savenBlockCycles = s_psxBlockCycles;
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s_saveConstGPRreg = 0xffffffff; // indicate searching
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memcpy(s_saveConstRegs, g_psxConstRegs, sizeof(g_psxConstRegs));
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s_saveHasConstReg = g_psxHasConstReg;
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s_saveFlushedConstReg = g_psxFlushedConstReg;
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s_psaveInstInfo = g_pCurInstInfo;
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@ -347,18 +347,7 @@ void psxLoadBranchState()
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{
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s_psxBlockCycles = s_savenBlockCycles;
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if( s_saveConstGPRreg != 0xffffffff ) {
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assert( s_saveConstGPRreg > 0 );
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// make sure right GPR was saved
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assert( g_psxHasConstReg == s_saveHasConstReg || (g_psxHasConstReg ^ s_saveHasConstReg) == (1<<s_saveConstGPRreg) );
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// restore the GPR reg
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g_psxConstRegs[s_saveConstGPRreg] = s_ConstGPRreg;
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PSX_SET_CONST(s_saveConstGPRreg);
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//s_saveConstGPRreg = 0;
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}
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memcpy(g_psxConstRegs, s_saveConstRegs, sizeof(g_psxConstRegs));
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g_psxHasConstReg = s_saveHasConstReg;
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g_psxFlushedConstReg = s_saveFlushedConstReg;
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g_pCurInstInfo = s_psaveInstInfo;
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@ -371,23 +360,8 @@ void psxLoadBranchState()
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// Code Templates //
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////////////////////
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void PSX_CHECK_SAVE_REG(int reg)
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{
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if( s_saveConstGPRreg == 0xffffffff ) {
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if( PSX_IS_CONST1(reg) ) {
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s_saveConstGPRreg = reg;
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s_ConstGPRreg = g_psxConstRegs[reg];
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}
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}
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else {
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// can be non zero when double loading
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//assert( s_saveConstGPRreg == 0 );
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}
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}
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void _psxOnWriteReg(int reg)
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{
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PSX_CHECK_SAVE_REG(reg);
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PSX_DEL_CONST(reg);
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}
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@ -397,7 +371,6 @@ void psxRecompileCodeConst0(R3000AFNPTR constcode, R3000AFNPTR_INFO constscode,
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if ( ! _Rd_ ) return;
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// for now, don't support xmm
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PSX_CHECK_SAVE_REG(_Rd_);
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_deleteX86reg(X86TYPE_PSX, _Rs_, 1);
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_deleteX86reg(X86TYPE_PSX, _Rt_, 1);
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@ -447,7 +420,6 @@ void psxRecompileCodeConst1(R3000AFNPTR constcode, R3000AFNPTR_INFO noconstcode)
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}
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// for now, don't support xmm
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PSX_CHECK_SAVE_REG(_Rt_);
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_deleteX86reg(X86TYPE_PSX, _Rs_, 1);
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_deleteX86reg(X86TYPE_PSX, _Rt_, 0);
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@ -468,7 +440,6 @@ void psxRecompileCodeConst2(R3000AFNPTR constcode, R3000AFNPTR_INFO noconstcode)
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if ( ! _Rd_ ) return;
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// for now, don't support xmm
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PSX_CHECK_SAVE_REG(_Rd_);
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_deleteX86reg(X86TYPE_PSX, _Rt_, 1);
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_deleteX86reg(X86TYPE_PSX, _Rd_, 0);
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@ -1170,7 +1141,6 @@ void iopRecRecompile(u32 startpc)
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// reset recomp state variables
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psxpc = startpc;
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s_saveConstGPRreg = 0;
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g_psxHasConstReg = g_psxFlushedConstReg = 1;
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_initX86regs();
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@ -58,8 +58,6 @@ void _psxMoveGPRtoR(x86IntRegType to, int fromgpr);
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void _psxMoveGPRtoM(u32 to, int fromgpr);
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void _psxMoveGPRtoRm(x86IntRegType to, int fromgpr);
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void PSX_CHECK_SAVE_REG(int reg);
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extern u32 psxpc; // recompiler pc
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extern int psxbranch; // set for branch
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extern u32 g_iopCyclePenalty;
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@ -58,8 +58,6 @@ extern u32 pc; // recompiler pc (also used by the SuperVU! .. why? (a
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extern int branch; // set for branch (also used by the SuperVU! .. why? (air))
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extern u32 target; // branch target
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extern u32 s_nBlockCycles; // cycles of current block recompiling
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extern u32 s_saveConstGPRreg;
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extern GPR_reg64 s_ConstGPRreg;
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#define REC_FUNC( f ) \
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void rec##f( void ) \
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@ -65,8 +65,6 @@ int branch; // set for branch
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PCSX2_ALIGNED16(GPR_reg64 g_cpuConstRegs[32]) = {0};
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u32 g_cpuHasConstReg = 0, g_cpuFlushedConstReg = 0;
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u32 s_saveConstGPRreg = 0;
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GPR_reg64 s_ConstGPRreg;
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////////////////////////////////////////////////////////////////
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// Static Private Variables - R5900 Dynarec
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@ -92,6 +90,7 @@ static u32 s_nEndBlock = 0; // what pc the current block ends
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static u32 s_nHasDelay = 0;
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// save states for branches
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GPR_reg64 s_saveConstRegs[32];
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static u16 s_savex86FpuState, s_saveiCWstate;
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static u32 s_saveHasConstReg = 0, s_saveFlushedConstReg = 0, s_saveRegHasLive1 = 0, s_saveRegHasSignExt = 0;
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static EEINST* s_psaveInstInfo = NULL;
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@ -1077,7 +1076,7 @@ void SaveBranchState()
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s_savex86FpuState = x86FpuState;
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s_saveiCWstate = iCWstate;
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s_savenBlockCycles = s_nBlockCycles;
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s_saveConstGPRreg = 0xffffffff; // indicate searching
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memcpy(s_saveConstRegs, g_cpuConstRegs, sizeof(g_cpuConstRegs));
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s_saveHasConstReg = g_cpuHasConstReg;
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s_saveFlushedConstReg = g_cpuFlushedConstReg;
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s_psaveInstInfo = g_pCurInstInfo;
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@ -1095,19 +1094,7 @@ void LoadBranchState()
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iCWstate = s_saveiCWstate;
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s_nBlockCycles = s_savenBlockCycles;
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if( s_saveConstGPRreg != 0xffffffff ) {
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assert( s_saveConstGPRreg > 0 );
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// make sure right GPR was saved
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assert( g_cpuHasConstReg == s_saveHasConstReg || (g_cpuHasConstReg ^ s_saveHasConstReg) == (1<<s_saveConstGPRreg) );
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// restore the GPR reg
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g_cpuConstRegs[s_saveConstGPRreg] = s_ConstGPRreg;
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GPR_SET_CONST(s_saveConstGPRreg);
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s_saveConstGPRreg = 0;
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}
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memcpy(g_cpuConstRegs, s_saveConstRegs, sizeof(g_cpuConstRegs));
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g_cpuHasConstReg = s_saveHasConstReg;
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g_cpuFlushedConstReg = s_saveFlushedConstReg;
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g_pCurInstInfo = s_psaveInstInfo;
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@ -1512,7 +1499,6 @@ void recRecompile( const u32 startpc )
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pc = startpc;
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x86FpuState = FPU_STATE;
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iCWstate = 0;
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s_saveConstGPRreg = 0;
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g_cpuHasConstReg = g_cpuFlushedConstReg = 1;
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g_cpuPrevRegHasLive1 = g_cpuRegHasLive1 = 0xffffffff;
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g_cpuPrevRegHasSignExt = g_cpuRegHasSignExt = 0;
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@ -38,19 +38,6 @@
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// Code Templates //
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////////////////////
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void CHECK_SAVE_REG(int reg)
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{
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if( s_saveConstGPRreg == 0xffffffff ) {
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if( GPR_IS_CONST1(reg) ) {
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s_saveConstGPRreg = reg;
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s_ConstGPRreg = g_cpuConstRegs[reg];
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}
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}
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else {
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assert( s_saveConstGPRreg == 0 || s_saveConstGPRreg == reg );
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}
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}
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void _eeProcessHasLive(int reg, int signext)
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{
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g_cpuPrevRegHasLive1 = g_cpuRegHasLive1;
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@ -68,7 +55,6 @@ void _eeProcessHasLive(int reg, int signext)
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void _eeOnWriteReg(int reg, int signext)
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{
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CHECK_SAVE_REG(reg);
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GPR_DEL_CONST(reg);
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_eeProcessHasLive(reg, signext);
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}
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@ -109,7 +95,6 @@ void eeRecompileCode0(R5900FNPTR constcode, R5900FNPTR_INFO constscode, R5900FNP
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if ( ! _Rd_ && (xmminfo&XMMINFO_WRITED) ) return;
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if( xmminfo&XMMINFO_WRITED) {
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CHECK_SAVE_REG(_Rd_);
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_eeProcessHasLive(_Rd_, 0);
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EEINST_RESETSIGNEXT(_Rd_);
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}
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@ -421,7 +406,6 @@ void eeRecompileCode1(R5900FNPTR constcode, R5900FNPTR_INFO noconstcode)
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int mmreg1, mmreg2;
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if ( ! _Rt_ ) return;
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CHECK_SAVE_REG(_Rt_);
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_eeProcessHasLive(_Rt_, 0);
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EEINST_RESETSIGNEXT(_Rt_);
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@ -522,7 +506,6 @@ void eeRecompileCode2(R5900FNPTR constcode, R5900FNPTR_INFO noconstcode)
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int mmreg1, mmreg2;
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if ( ! _Rd_ ) return;
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CHECK_SAVE_REG(_Rd_);
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_eeProcessHasLive(_Rd_, 0);
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EEINST_RESETSIGNEXT(_Rd_);
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@ -651,7 +634,6 @@ void eeRecompileCodeConst0(R5900FNPTR constcode, R5900FNPTR_INFO constscode, R59
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if ( ! _Rd_ ) return;
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// for now, don't support xmm
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CHECK_SAVE_REG(_Rd_);
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_deleteGPRtoXMMreg(_Rs_, 1);
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_deleteGPRtoXMMreg(_Rt_, 1);
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@ -689,7 +671,6 @@ void eeRecompileCodeConst1(R5900FNPTR constcode, R5900FNPTR_INFO noconstcode)
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return;
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// for now, don't support xmm
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CHECK_SAVE_REG(_Rt_);
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_deleteGPRtoXMMreg(_Rs_, 1);
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_deleteGPRtoXMMreg(_Rt_, 0);
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@ -710,7 +691,6 @@ void eeRecompileCodeConst2(R5900FNPTR constcode, R5900FNPTR_INFO noconstcode)
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if ( ! _Rd_ ) return;
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// for now, don't support xmm
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CHECK_SAVE_REG(_Rd_);
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_deleteGPRtoXMMreg(_Rt_, 1);
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_deleteGPRtoXMMreg(_Rd_, 0);
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@ -731,7 +711,6 @@ void eeRecompileCodeConstSPECIAL(R5900FNPTR constcode, R5900FNPTR_INFO multicode
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assert(0);
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// for now, don't support xmm
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if( MULT ) {
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CHECK_SAVE_REG(_Rd_);
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_deleteGPRtoXMMreg(_Rd_, 0);
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}
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@ -767,7 +746,6 @@ int eeRecompileCodeXMM(int xmminfo)
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// save state
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if( xmminfo & XMMINFO_WRITED ) {
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CHECK_SAVE_REG(_Rd_);
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_eeProcessHasLive(_Rd_, 0);
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EEINST_RESETSIGNEXT(_Rd_);
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}
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