Made constant register saving more simple and certain. Grandia 2 is probably the only game that this would've fixed, but maybe there are others.

git-svn-id: http://pcsx2.googlecode.com/svn/trunk@778 96395faa-99c1-11dd-bbfe-3dabce05a288
This commit is contained in:
sudonim1 2009-03-14 02:06:18 +00:00
parent c8f3a36d66
commit 17298b7e6b
5 changed files with 7 additions and 77 deletions

View File

@ -74,8 +74,8 @@ static BASEBLOCKEX* s_pCurBlockEx = NULL;
static u32 s_nEndBlock = 0; // what psxpc the current block ends
static u32 s_ConstGPRreg;
static u32 s_saveConstGPRreg = 0, s_saveHasConstReg = 0, s_saveFlushedConstReg = 0;
static u32 s_saveConstRegs[32];
static u32 s_saveHasConstReg = 0, s_saveFlushedConstReg = 0;
static EEINST* s_psaveInstInfo = NULL;
u32 s_psxBlockCycles = 0; // cycles of current block recompiling
@ -334,7 +334,7 @@ void _psxFlushCall(int flushtype)
void psxSaveBranchState()
{
s_savenBlockCycles = s_psxBlockCycles;
s_saveConstGPRreg = 0xffffffff; // indicate searching
memcpy(s_saveConstRegs, g_psxConstRegs, sizeof(g_psxConstRegs));
s_saveHasConstReg = g_psxHasConstReg;
s_saveFlushedConstReg = g_psxFlushedConstReg;
s_psaveInstInfo = g_pCurInstInfo;
@ -347,18 +347,7 @@ void psxLoadBranchState()
{
s_psxBlockCycles = s_savenBlockCycles;
if( s_saveConstGPRreg != 0xffffffff ) {
assert( s_saveConstGPRreg > 0 );
// make sure right GPR was saved
assert( g_psxHasConstReg == s_saveHasConstReg || (g_psxHasConstReg ^ s_saveHasConstReg) == (1<<s_saveConstGPRreg) );
// restore the GPR reg
g_psxConstRegs[s_saveConstGPRreg] = s_ConstGPRreg;
PSX_SET_CONST(s_saveConstGPRreg);
//s_saveConstGPRreg = 0;
}
memcpy(g_psxConstRegs, s_saveConstRegs, sizeof(g_psxConstRegs));
g_psxHasConstReg = s_saveHasConstReg;
g_psxFlushedConstReg = s_saveFlushedConstReg;
g_pCurInstInfo = s_psaveInstInfo;
@ -371,23 +360,8 @@ void psxLoadBranchState()
// Code Templates //
////////////////////
void PSX_CHECK_SAVE_REG(int reg)
{
if( s_saveConstGPRreg == 0xffffffff ) {
if( PSX_IS_CONST1(reg) ) {
s_saveConstGPRreg = reg;
s_ConstGPRreg = g_psxConstRegs[reg];
}
}
else {
// can be non zero when double loading
//assert( s_saveConstGPRreg == 0 );
}
}
void _psxOnWriteReg(int reg)
{
PSX_CHECK_SAVE_REG(reg);
PSX_DEL_CONST(reg);
}
@ -397,7 +371,6 @@ void psxRecompileCodeConst0(R3000AFNPTR constcode, R3000AFNPTR_INFO constscode,
if ( ! _Rd_ ) return;
// for now, don't support xmm
PSX_CHECK_SAVE_REG(_Rd_);
_deleteX86reg(X86TYPE_PSX, _Rs_, 1);
_deleteX86reg(X86TYPE_PSX, _Rt_, 1);
@ -447,7 +420,6 @@ void psxRecompileCodeConst1(R3000AFNPTR constcode, R3000AFNPTR_INFO noconstcode)
}
// for now, don't support xmm
PSX_CHECK_SAVE_REG(_Rt_);
_deleteX86reg(X86TYPE_PSX, _Rs_, 1);
_deleteX86reg(X86TYPE_PSX, _Rt_, 0);
@ -468,7 +440,6 @@ void psxRecompileCodeConst2(R3000AFNPTR constcode, R3000AFNPTR_INFO noconstcode)
if ( ! _Rd_ ) return;
// for now, don't support xmm
PSX_CHECK_SAVE_REG(_Rd_);
_deleteX86reg(X86TYPE_PSX, _Rt_, 1);
_deleteX86reg(X86TYPE_PSX, _Rd_, 0);
@ -1170,7 +1141,6 @@ void iopRecRecompile(u32 startpc)
// reset recomp state variables
psxpc = startpc;
s_saveConstGPRreg = 0;
g_psxHasConstReg = g_psxFlushedConstReg = 1;
_initX86regs();

View File

@ -58,8 +58,6 @@ void _psxMoveGPRtoR(x86IntRegType to, int fromgpr);
void _psxMoveGPRtoM(u32 to, int fromgpr);
void _psxMoveGPRtoRm(x86IntRegType to, int fromgpr);
void PSX_CHECK_SAVE_REG(int reg);
extern u32 psxpc; // recompiler pc
extern int psxbranch; // set for branch
extern u32 g_iopCyclePenalty;

View File

@ -58,8 +58,6 @@ extern u32 pc; // recompiler pc (also used by the SuperVU! .. why? (a
extern int branch; // set for branch (also used by the SuperVU! .. why? (air))
extern u32 target; // branch target
extern u32 s_nBlockCycles; // cycles of current block recompiling
extern u32 s_saveConstGPRreg;
extern GPR_reg64 s_ConstGPRreg;
#define REC_FUNC( f ) \
void rec##f( void ) \

View File

@ -65,8 +65,6 @@ int branch; // set for branch
PCSX2_ALIGNED16(GPR_reg64 g_cpuConstRegs[32]) = {0};
u32 g_cpuHasConstReg = 0, g_cpuFlushedConstReg = 0;
u32 s_saveConstGPRreg = 0;
GPR_reg64 s_ConstGPRreg;
////////////////////////////////////////////////////////////////
// Static Private Variables - R5900 Dynarec
@ -92,6 +90,7 @@ static u32 s_nEndBlock = 0; // what pc the current block ends
static u32 s_nHasDelay = 0;
// save states for branches
GPR_reg64 s_saveConstRegs[32];
static u16 s_savex86FpuState, s_saveiCWstate;
static u32 s_saveHasConstReg = 0, s_saveFlushedConstReg = 0, s_saveRegHasLive1 = 0, s_saveRegHasSignExt = 0;
static EEINST* s_psaveInstInfo = NULL;
@ -1077,7 +1076,7 @@ void SaveBranchState()
s_savex86FpuState = x86FpuState;
s_saveiCWstate = iCWstate;
s_savenBlockCycles = s_nBlockCycles;
s_saveConstGPRreg = 0xffffffff; // indicate searching
memcpy(s_saveConstRegs, g_cpuConstRegs, sizeof(g_cpuConstRegs));
s_saveHasConstReg = g_cpuHasConstReg;
s_saveFlushedConstReg = g_cpuFlushedConstReg;
s_psaveInstInfo = g_pCurInstInfo;
@ -1095,19 +1094,7 @@ void LoadBranchState()
iCWstate = s_saveiCWstate;
s_nBlockCycles = s_savenBlockCycles;
if( s_saveConstGPRreg != 0xffffffff ) {
assert( s_saveConstGPRreg > 0 );
// make sure right GPR was saved
assert( g_cpuHasConstReg == s_saveHasConstReg || (g_cpuHasConstReg ^ s_saveHasConstReg) == (1<<s_saveConstGPRreg) );
// restore the GPR reg
g_cpuConstRegs[s_saveConstGPRreg] = s_ConstGPRreg;
GPR_SET_CONST(s_saveConstGPRreg);
s_saveConstGPRreg = 0;
}
memcpy(g_cpuConstRegs, s_saveConstRegs, sizeof(g_cpuConstRegs));
g_cpuHasConstReg = s_saveHasConstReg;
g_cpuFlushedConstReg = s_saveFlushedConstReg;
g_pCurInstInfo = s_psaveInstInfo;
@ -1512,7 +1499,6 @@ void recRecompile( const u32 startpc )
pc = startpc;
x86FpuState = FPU_STATE;
iCWstate = 0;
s_saveConstGPRreg = 0;
g_cpuHasConstReg = g_cpuFlushedConstReg = 1;
g_cpuPrevRegHasLive1 = g_cpuRegHasLive1 = 0xffffffff;
g_cpuPrevRegHasSignExt = g_cpuRegHasSignExt = 0;

View File

@ -38,19 +38,6 @@
// Code Templates //
////////////////////
void CHECK_SAVE_REG(int reg)
{
if( s_saveConstGPRreg == 0xffffffff ) {
if( GPR_IS_CONST1(reg) ) {
s_saveConstGPRreg = reg;
s_ConstGPRreg = g_cpuConstRegs[reg];
}
}
else {
assert( s_saveConstGPRreg == 0 || s_saveConstGPRreg == reg );
}
}
void _eeProcessHasLive(int reg, int signext)
{
g_cpuPrevRegHasLive1 = g_cpuRegHasLive1;
@ -68,7 +55,6 @@ void _eeProcessHasLive(int reg, int signext)
void _eeOnWriteReg(int reg, int signext)
{
CHECK_SAVE_REG(reg);
GPR_DEL_CONST(reg);
_eeProcessHasLive(reg, signext);
}
@ -109,7 +95,6 @@ void eeRecompileCode0(R5900FNPTR constcode, R5900FNPTR_INFO constscode, R5900FNP
if ( ! _Rd_ && (xmminfo&XMMINFO_WRITED) ) return;
if( xmminfo&XMMINFO_WRITED) {
CHECK_SAVE_REG(_Rd_);
_eeProcessHasLive(_Rd_, 0);
EEINST_RESETSIGNEXT(_Rd_);
}
@ -421,7 +406,6 @@ void eeRecompileCode1(R5900FNPTR constcode, R5900FNPTR_INFO noconstcode)
int mmreg1, mmreg2;
if ( ! _Rt_ ) return;
CHECK_SAVE_REG(_Rt_);
_eeProcessHasLive(_Rt_, 0);
EEINST_RESETSIGNEXT(_Rt_);
@ -522,7 +506,6 @@ void eeRecompileCode2(R5900FNPTR constcode, R5900FNPTR_INFO noconstcode)
int mmreg1, mmreg2;
if ( ! _Rd_ ) return;
CHECK_SAVE_REG(_Rd_);
_eeProcessHasLive(_Rd_, 0);
EEINST_RESETSIGNEXT(_Rd_);
@ -651,7 +634,6 @@ void eeRecompileCodeConst0(R5900FNPTR constcode, R5900FNPTR_INFO constscode, R59
if ( ! _Rd_ ) return;
// for now, don't support xmm
CHECK_SAVE_REG(_Rd_);
_deleteGPRtoXMMreg(_Rs_, 1);
_deleteGPRtoXMMreg(_Rt_, 1);
@ -689,7 +671,6 @@ void eeRecompileCodeConst1(R5900FNPTR constcode, R5900FNPTR_INFO noconstcode)
return;
// for now, don't support xmm
CHECK_SAVE_REG(_Rt_);
_deleteGPRtoXMMreg(_Rs_, 1);
_deleteGPRtoXMMreg(_Rt_, 0);
@ -710,7 +691,6 @@ void eeRecompileCodeConst2(R5900FNPTR constcode, R5900FNPTR_INFO noconstcode)
if ( ! _Rd_ ) return;
// for now, don't support xmm
CHECK_SAVE_REG(_Rd_);
_deleteGPRtoXMMreg(_Rt_, 1);
_deleteGPRtoXMMreg(_Rd_, 0);
@ -731,7 +711,6 @@ void eeRecompileCodeConstSPECIAL(R5900FNPTR constcode, R5900FNPTR_INFO multicode
assert(0);
// for now, don't support xmm
if( MULT ) {
CHECK_SAVE_REG(_Rd_);
_deleteGPRtoXMMreg(_Rd_, 0);
}
@ -767,7 +746,6 @@ int eeRecompileCodeXMM(int xmminfo)
// save state
if( xmminfo & XMMINFO_WRITED ) {
CHECK_SAVE_REG(_Rd_);
_eeProcessHasLive(_Rd_, 0);
EEINST_RESETSIGNEXT(_Rd_);
}