mirror of https://github.com/PCSX2/pcsx2.git
Realised that I probably broke MOVZ/N with my last commit and tried again.
git-svn-id: http://pcsx2.googlecode.com/svn/trunk@776 96395faa-99c1-11dd-bbfe-3dabce05a288
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@ -425,10 +425,7 @@ void recMTLO1( void )
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//// MOVZ
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void recMOVZtemp_const()
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{
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if (g_cpuConstRegs[_Rt_].UD[0] == 0) {
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g_cpuConstRegs[_Rd_].UL[0] = g_cpuConstRegs[_Rs_].UL[0];
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g_cpuConstRegs[_Rd_].UL[1] = g_cpuConstRegs[_Rs_].UL[1];
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}
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g_cpuConstRegs[_Rd_].UD[0] = g_cpuConstRegs[_Rs_].UD[0];
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}
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//static PCSX2_ALIGNED16(u32 s_zero[4]) = {0,0,0xffffffff, 0xffffffff};
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@ -472,24 +469,22 @@ void recMOVZtemp_consts(int info)
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void recMOVZtemp_constt(int info)
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{
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if (g_cpuConstRegs[_Rt_].UD[0] == 0) {
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if( info & PROCESS_EE_MMX ) {
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if( EEREC_D != EEREC_S ) MOVQRtoR(EEREC_D, EEREC_S);
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return;
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}
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if( _hasFreeXMMreg() ) {
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int t0reg = _allocMMXreg(-1, MMX_TEMP, 0);
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MOVQMtoR(t0reg, (int)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ]);
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MOVQRtoM((int)&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ], t0reg);
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_freeMMXreg(t0reg);
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}
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else {
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MOV32MtoR(EAX, (int)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ]);
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MOV32MtoR(EDX, (int)&cpuRegs.GPR.r[ _Rs_ ].UL[ 1 ]);
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MOV32RtoM((int)&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ], EAX);
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MOV32RtoM((int)&cpuRegs.GPR.r[ _Rd_ ].UL[ 1 ], EDX);
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}
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if( info & PROCESS_EE_MMX ) {
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if( EEREC_D != EEREC_S ) MOVQRtoR(EEREC_D, EEREC_S);
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return;
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}
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if( _hasFreeXMMreg() ) {
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int t0reg = _allocMMXreg(-1, MMX_TEMP, 0);
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MOVQMtoR(t0reg, (int)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ]);
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MOVQRtoM((int)&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ], t0reg);
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_freeMMXreg(t0reg);
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}
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else {
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MOV32MtoR(EAX, (int)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ]);
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MOV32MtoR(EDX, (int)&cpuRegs.GPR.r[ _Rs_ ].UL[ 1 ]);
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MOV32RtoM((int)&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ], EAX);
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MOV32RtoM((int)&cpuRegs.GPR.r[ _Rd_ ].UL[ 1 ], EDX);
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}
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}
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@ -543,15 +538,11 @@ void recMOVZ()
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if( _Rs_ == _Rd_ )
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return;
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// aren't the templates meant to take care of this kind of thing?
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if( GPR_IS_CONST1(_Rd_) ) {
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if( !GPR_IS_CONST2(_Rs_, _Rt_) ) {
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// remove the const, since move is conditional
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_deleteEEreg(_Rd_, 0);
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MOV32ItoM((uptr)&cpuRegs.GPR.r[_Rd_].UL[0], g_cpuConstRegs[_Rd_].UL[0]);
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MOV32ItoM((uptr)&cpuRegs.GPR.r[_Rd_].UL[1], g_cpuConstRegs[_Rd_].UL[1]);
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}
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}
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if(GPR_IS_CONST1(_Rt_)) {
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if (g_cpuConstRegs[_Rt_].UD[0] != 0)
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return;
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} else if (GPR_IS_CONST1(_Rd_))
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_deleteEEreg(_Rd_, 1);
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recMOVZtemp();
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}
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@ -559,10 +550,7 @@ void recMOVZ()
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//// MOVN
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void recMOVNtemp_const()
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{
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if (g_cpuConstRegs[_Rt_].UD[0] != 0) {
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g_cpuConstRegs[_Rd_].UL[0] = g_cpuConstRegs[_Rs_].UL[0];
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g_cpuConstRegs[_Rd_].UL[1] = g_cpuConstRegs[_Rs_].UL[1];
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}
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g_cpuConstRegs[_Rd_].UD[0] = g_cpuConstRegs[_Rs_].UD[0];
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}
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void recMOVNtemp_consts(int info)
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@ -605,19 +593,17 @@ void recMOVNtemp_consts(int info)
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void recMOVNtemp_constt(int info)
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{
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if (g_cpuConstRegs[_Rt_].UD[0] != 0) {
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if( _hasFreeXMMreg() ) {
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int t0reg = _allocMMXreg(-1, MMX_TEMP, 0);
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MOVQMtoR(t0reg, (int)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ]);
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MOVQRtoM((int)&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ], t0reg);
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_freeMMXreg(t0reg);
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}
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else {
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MOV32MtoR(EAX, (int)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ]);
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MOV32MtoR(EDX, (int)&cpuRegs.GPR.r[ _Rs_ ].UL[ 1 ]);
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MOV32RtoM((int)&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ], EAX);
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MOV32RtoM((int)&cpuRegs.GPR.r[ _Rd_ ].UL[ 1 ], EDX);
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}
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if( _hasFreeXMMreg() ) {
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int t0reg = _allocMMXreg(-1, MMX_TEMP, 0);
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MOVQMtoR(t0reg, (int)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ]);
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MOVQRtoM((int)&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ], t0reg);
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_freeMMXreg(t0reg);
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}
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else {
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MOV32MtoR(EAX, (int)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ]);
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MOV32MtoR(EDX, (int)&cpuRegs.GPR.r[ _Rs_ ].UL[ 1 ]);
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MOV32RtoM((int)&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ], EAX);
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MOV32RtoM((int)&cpuRegs.GPR.r[ _Rd_ ].UL[ 1 ], EDX);
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}
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}
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@ -672,14 +658,11 @@ void recMOVN()
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if( _Rs_ == _Rd_ )
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return;
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if( GPR_IS_CONST1(_Rd_) ) {
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if( !GPR_IS_CONST2(_Rs_, _Rt_) ) {
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// remove the const, since move is conditional
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_deleteEEreg(_Rd_, 0);
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MOV32ItoM((uptr)&cpuRegs.GPR.r[_Rd_].UL[0], g_cpuConstRegs[_Rd_].UL[0]);
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MOV32ItoM((uptr)&cpuRegs.GPR.r[_Rd_].UL[1], g_cpuConstRegs[_Rd_].UL[1]);
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}
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}
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if (GPR_IS_CONST1(_Rt_)) {
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if (g_cpuConstRegs[_Rt_].UD[0] == 0)
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return;
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} else if (GPR_IS_CONST1(_Rd_))
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_deleteEEreg(_Rd_, 1);
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recMOVNtemp();
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}
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