diff --git a/pcsx2/COP0.cpp b/pcsx2/COP0.cpp
index 91fd888b7f..21f8d2c5a4 100644
--- a/pcsx2/COP0.cpp
+++ b/pcsx2/COP0.cpp
@@ -25,15 +25,18 @@
 u32 s_iLastCOP0Cycle = 0;
 u32 s_iLastPERFCycle[2] = { 0, 0 };
 
-void UpdateCP0Status() {
-	u32 value = cpuRegs.CP0.n.Status.val;
+__releaseinline void UpdateCP0Status() {
+	//currently the 2 memory modes are not implemented. Given this function is called so much,
+	//it's commented out for now. Only the interrupt test is needed. (rama)
 
-	if (value & 0x06 ||
-		(value & 0x18) == 0) { // Kernel Mode (KSU = 0 | EXL = 1 | ERL = 1)*/
-		memSetKernelMode();	// Kernel memory always
-	} else { // User Mode
-		memSetUserMode();
-	}
+	//u32 value = cpuRegs.CP0.n.Status.val;
+
+	//if (value & 0x06 ||
+	//	(value & 0x18) == 0) { // Kernel Mode (KSU = 0 | EXL = 1 | ERL = 1)*/
+	//	memSetKernelMode();	// Kernel memory always
+	//} else { // User Mode
+	//	memSetUserMode();
+	//}
 	cpuTestHwInts();
 }
 
diff --git a/pcsx2/R5900.cpp b/pcsx2/R5900.cpp
index e035bbd862..b19d06dd0b 100644
--- a/pcsx2/R5900.cpp
+++ b/pcsx2/R5900.cpp
@@ -106,7 +106,7 @@ void cpuShutdown()
 	disR5900FreeSyms();
 }
 
-void cpuException(u32 code, u32 bd)
+__releaseinline void __fastcall cpuException(u32 code, u32 bd)
 {
 	cpuRegs.branch = 0;		// Tells the interpreter that an exception occurred during a branch.
 	bool errLevel2, checkStatus;
@@ -244,7 +244,7 @@ void cpuTestMissingHwInts() {
 }
 
 // sets a branch test to occur some time from an arbitrary starting point.
-__forceinline int cpuSetNextBranch( u32 startCycle, s32 delta )
+__forceinline int __fastcall cpuSetNextBranch( u32 startCycle, s32 delta )
 {
 	// typecast the conditional to signed so that things don't blow up
 	// if startCycle is greater than our next branch cycle.
@@ -258,14 +258,14 @@ __forceinline int cpuSetNextBranch( u32 startCycle, s32 delta )
 }
 
 // sets a branch to occur some time from the current cycle
-__forceinline int cpuSetNextBranchDelta( s32 delta )
+__forceinline int __fastcall cpuSetNextBranchDelta( s32 delta )
 {
 	return cpuSetNextBranch( cpuRegs.cycle, delta );
 }
 
 // tests the cpu cycle agaisnt the given start and delta values.
 // Returns true if the delta time has passed.
-__forceinline int cpuTestCycle( u32 startCycle, s32 delta )
+__forceinline int __fastcall cpuTestCycle( u32 startCycle, s32 delta )
 {
 	// typecast the conditional to signed so that things don't explode
 	// if the startCycle is ahead of our current cpu cycle.
@@ -504,7 +504,7 @@ __forceinline bool _cpuBranchTest_Shared()
 	return vsyncEvent;
 }
 
-void cpuTestINTCInts()
+__releaseinline void cpuTestINTCInts()
 {
 	if( cpuRegs.interrupt & (1 << 30) ) return;
 	//if( (cpuRegs.CP0.n.Status.val & 0x10407) != 0x10401 ) return;
@@ -556,7 +556,7 @@ __forceinline void cpuTestTIMRInts() {
 	}
 }
 
-void cpuTestHwInts() {
+__forceinline void cpuTestHwInts() {
 	cpuTestINTCInts();
 	cpuTestDMACInts();
 	cpuTestTIMRInts();
diff --git a/pcsx2/R5900.h b/pcsx2/R5900.h
index 8dbd6cda4c..b2dd4db46f 100644
--- a/pcsx2/R5900.h
+++ b/pcsx2/R5900.h
@@ -257,14 +257,14 @@ extern void cpuInit();
 extern void cpuReset();		// can throw Exception::FileNotFound.
 extern void cpuShutdown();
 extern void cpuExecuteBios();
-extern void cpuException(u32 code, u32 bd);
+extern void __fastcall cpuException(u32 code, u32 bd);
 extern void cpuTlbMissR(u32 addr, u32 bd);
 extern void cpuTlbMissW(u32 addr, u32 bd);
 extern void cpuTestHwInts();
 
-extern int cpuSetNextBranch( u32 startCycle, s32 delta );
-extern int cpuSetNextBranchDelta( s32 delta );
-extern int cpuTestCycle( u32 startCycle, s32 delta );
+extern int __fastcall cpuSetNextBranch( u32 startCycle, s32 delta );
+extern int __fastcall cpuSetNextBranchDelta( s32 delta );
+extern int __fastcall cpuTestCycle( u32 startCycle, s32 delta );
 extern void cpuSetBranch();
 
 extern bool _cpuBranchTest_Shared();		// for internal use by the Dynarecs and Ints inside R5900: