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GSdx: Explain TransactionScope changes
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@ -485,6 +485,11 @@ public:
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TransactionScope(Lock& fallBackLock_, int max_retries = 3)
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: fallBackLock(fallBackLock_)
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{
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// The TSX (RTM/HLE) instructions on Intel AVX2 CPUs may either be
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// absent or disabled (see errata HSD136 and specification change at
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// http://www.intel.com/content/dam/www/public/us/en/documents/specification-updates/4th-gen-core-family-desktop-specification-update.pdf)
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// This can cause builds for AVX2 CPUs to fail with GCC/Clang on Linux,
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// so check that the RTM instructions are actually available.
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#if (_M_SSE >= 0x501 && !defined(__GNUC__)) || defined(__RTM__)
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int nretries = 0;
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