newHostVM: Sync with trunk (r4010-4019)

git-svn-id: http://pcsx2.googlecode.com/svn/branches/newHostVM@4024 96395faa-99c1-11dd-bbfe-3dabce05a288
This commit is contained in:
Jake.Stine 2010-11-16 12:02:38 +00:00
commit 127ca00492
5 changed files with 67 additions and 30 deletions

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@ -29,7 +29,7 @@
#include "CDVDisoReader.h"
static u8 *pbuffer;
static u8 cdbuffer[2352] = {0};
static u8 cdbuffer[CD_FRAMESIZE_RAW] = {0};
static isoFile iso;
static int psize, cdtype;

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@ -107,17 +107,36 @@ __fi void vif0SetupTransfer()
if (vif0ch.chcr.TTE)
{
// Transfer dma tag if tte is set
bool ret;
if (vif0.vifstalled)
ret = VIF0transfer((u32*)ptag + (2 + vif0.irqoffset), 2 - vif0.irqoffset); //Transfer Tag on stall
else
ret = VIF0transfer((u32*)ptag + 2, 2); //Transfer Tag
static __aligned16 u128 masked_tag;
if ((ret == false) && vif0.irqoffset < 2)
masked_tag._u64[0] = 0;
masked_tag._u64[1] = *((u64*)ptag + 1);
VIF_LOG("\tVIF0 SrcChain TTE=1, data = 0x%08x.%08x", masked_tag._u32[3], masked_tag._u32[2]);
if (vif0.vifstalled)
{
ret = VIF0transfer((u32*)&masked_tag + vif0.irqoffset, 4 - vif0.irqoffset, true); //Transfer Tag on stall
//ret = VIF0transfer((u32*)ptag + (2 + vif0.irqoffset), 2 - vif0.irqoffset); //Transfer Tag on stall
}
else
{
//Some games (like killzone) do Tags mid unpack, the nops will just write blank data
//to the VU's, which breaks stuff, this is where the 128bit packet will fail, so we ignore the first 2 words
vif0.irqoffset = 2;
ret = VIF0transfer((u32*)&masked_tag + 2, 2, true); //Transfer Tag
//ret = VIF0transfer((u32*)ptag + 2, 2); //Transfer Tag
}
if (!ret && vif0.irqoffset)
{
vif0.inprogress = 0; //Better clear this so it has to do it again (Jak 1)
return; //There has been an error or an interrupt
return; //IRQ set by VIFTransfer
}
}

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@ -218,7 +218,10 @@ __fi void vif1SetupTransfer()
}
else
{
ret = VIF1transfer((u32*)&masked_tag, 4, true); //Transfer Tag
//Some games (like killzone) do Tags mid unpack, the nops will just write blank data
//to the VU's, which breaks stuff, this is where the 128bit packet will fail, so we ignore the first 2 words
vif1.irqoffset = 2;
ret = VIF1transfer((u32*)&masked_tag + 2, 2, true); //Transfer Tag
//ret = VIF1transfer((u32*)ptag + 2, 2); //Transfer Tag
}
@ -226,8 +229,7 @@ __fi void vif1SetupTransfer()
{
vif1.inprogress &= ~1; //Better clear this so it has to do it again (Jak 1)
return; //IRQ set by VIFTransfer
} //else vif1.vifstalled = false;
}
}
vif1.irqoffset = 0;

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@ -124,7 +124,7 @@ static __fi void mfifo_VIF1chain()
}
}
int NextTADR = 0; //Bodge for Clock Tower 3 (see below)
void mfifoVIF1transfer(int qwc)
{
@ -178,6 +178,7 @@ void mfifoVIF1transfer(int qwc)
return; //IRQ set by VIFTransfer
} //else vif1.vifstalled = false;
g_vifCycles += 2;
}
vif1.irqoffset = 0;
@ -193,13 +194,13 @@ void mfifoVIF1transfer(int qwc)
switch (ptag->ID)
{
case TAG_REFE: // Refe - Transfer Packet According to ADDR field
vif1ch.tadr = qwctag(vif1ch.tadr + 16);
NextTADR = qwctag(vif1ch.tadr + 16);
vif1.done = true; //End Transfer
break;
case TAG_CNT: // CNT - Transfer QWC following the tag.
vif1ch.madr = qwctag(vif1ch.tadr + 16); //Set MADR to QW after Tag
vif1ch.tadr = qwctag(vif1ch.madr + (vif1ch.qwc << 4)); //Set TADR to QW following the data
NextTADR = qwctag(vif1ch.madr + (vif1ch.qwc << 4)); //Set TADR to QW following the data
vif1.done = false;
break;
@ -207,7 +208,7 @@ void mfifoVIF1transfer(int qwc)
{
int temp = vif1ch.madr; //Temporarily Store ADDR
vif1ch.madr = qwctag(vif1ch.tadr + 16); //Set MADR to QW following the tag
vif1ch.tadr = temp; //Copy temporarily stored ADDR to Tag
NextTADR = temp; //Copy temporarily stored ADDR to Tag
if ((temp & dmacRegs.rbsr.RMSK) != dmacRegs.rbor.ADDR) Console.WriteLn("Next tag = %x outside ring %x size %x", temp, psHu32(DMAC_RBOR), psHu32(DMAC_RBSR));
vif1.done = false;
break;
@ -215,13 +216,13 @@ void mfifoVIF1transfer(int qwc)
case TAG_REF: // Ref - Transfer QWC from ADDR field
case TAG_REFS: // Refs - Transfer QWC from ADDR field (Stall Control)
vif1ch.tadr = qwctag(vif1ch.tadr + 16); //Set TADR to next tag
NextTADR = qwctag(vif1ch.tadr + 16); //Set TADR to next tag
vif1.done = false;
break;
case TAG_END: // End - Transfer QWC following the tag
vif1ch.madr = qwctag(vif1ch.tadr + 16); //Set MADR to data following the tag
vif1ch.tadr = qwctag(vif1ch.madr + (vif1ch.qwc << 4)); //Set TADR to QW following the data
NextTADR = qwctag(vif1ch.madr + (vif1ch.qwc << 4)); //Set TADR to QW following the data
vif1.done = true; //End Transfer
break;
}
@ -245,6 +246,17 @@ void vifMFIFOInterrupt()
g_vifCycles = 0;
VIF_LOG("vif mfifo interrupt");
if(NextTADR != 0 && vif1ch.qwc == 0)
{
// Clock Tower 3 Note!
/* If the DMA starts the transfer then hammers the TADR to see when the transfer has finished(as clock tower does)
and we have preincremented before all data has arrived, it breaks. Idealy we increment this as we transfer the data.
"NextTADR" bodge in for the moment! - Refraction */
vif1ch.tadr = NextTADR;
NextTADR = 0;
}
if(GSTransferStatus.PTH2 == STOPPED_MODE && gifRegs.stat.APATH == GIF_APATH2)
{
GSTransferStatus.PTH2 = STOPPED_MODE;
@ -304,6 +316,8 @@ void vifMFIFOInterrupt()
}
mfifoVIF1transfer(0);
CPU_INT(DMAC_MFIFO_VIF, 4);
return;

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@ -112,7 +112,7 @@ _vifT static __fi bool vifTransfer(u32 *data, int size, bool TTE) {
vifStruct& vifX = GetVifX;
// irqoffset necessary to add up the right qws, or else will spin (spiderman)
int transferred = vifX.vifstalled ? vifX.irqoffset : 0;
int transferred = vifX.irqoffset;
vifX.irqoffset = 0;
vifX.vifstalled = false;
@ -139,25 +139,27 @@ _vifT static __fi bool vifTransfer(u32 *data, int size, bool TTE) {
vifX.irqoffset = transferred % 4; // cannot lose the offset
if (TTE) return !vifX.vifstalled;
if (!TTE) // *WARNING* - Tags CAN have interrupts! so lets just ignore the dma modifying stuffs (GT4)
{
transferred = transferred >> 2;
vifXch.madr +=(transferred << 4);
vifXch.qwc -= transferred;
}
if (!vifXch.qwc && !vifX.irqoffset) vifX.inprogress &= ~0x1;
if (!vifXch.qwc && !vifX.irqoffset)
{
vifX.inprogress &= ~0x1;
vifX.vifstalled = false;
}
if (vifX.irq && vifX.cmd == 0) {
//DevCon.WriteLn("Vif IRQ!");
if(((vifXRegs.code >> 24) & 0x7f) != 0x7)
{
vifX.vifstalled = true;
vifXRegs.stat.VIS = true; // Note: commenting this out fixes WALL-E?
vifX.vifstalled = true;
}
if (!vifXch.qwc && !vifX.irqoffset) vifX.inprogress &= ~1;
return false;
}
return !vifX.vifstalled;