mirror of https://github.com/PCSX2/pcsx2.git
Fixed Gradius V, had to destroy the templates arcum did a bit to get it to work without ape escape crashing (sorry mate lol. Took out my V3_# discovery, ape escape is getting spikey now, so ill just remove it. Also altered V2_# to work slightly different incase the packet starts on the Y vector, it now wont suffer underrunning (possible bad data)
git-svn-id: http://pcsx2.googlecode.com/svn/trunk@928 96395faa-99c1-11dd-bbfe-3dabce05a288
This commit is contained in:
parent
57f9c2bc64
commit
1250953ff0
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@ -190,6 +190,8 @@ extern bool SrcLog_GPU( const char* fmt, ... );
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#define MEMCARDS_LOG 0&&
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#endif
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//#define VIFUNPACKDEBUG //enable unpack debugging output
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#ifdef VIFUNPACKDEBUG
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#define VIFUNPACK_LOG VIF_LOG
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#else
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108
pcsx2/Vif.cpp
108
pcsx2/Vif.cpp
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@ -333,89 +333,57 @@ static __releaseinline void writeW(u32 &dest, u32 data)
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template <class T>
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static void _UNPACKpart(u32 offnum, u32 &x, T y)
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{
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if (_vifRegs->offset == offnum)
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{
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switch (offnum)
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{
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case OFFSET_X:
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writeX(x,y);
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break;
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case OFFSET_Y:
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writeY(x,y);
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break;
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case OFFSET_Z:
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writeZ(x,y);
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break;
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case OFFSET_W:
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writeW(x,y);
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break;
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default:
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break;
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}
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_vifRegs->offset++;
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}
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}
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template <class T>
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static void _UNPACKpart(u32 offnum, u32 &x, T y, int size)
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{
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if(size == 0) return;
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if (_vifRegs->offset == offnum)
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switch (offnum)
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{
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switch (offnum)
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{
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case OFFSET_X:
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writeX(x,y);
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break;
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case OFFSET_Y:
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writeY(x,y);
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break;
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case OFFSET_Z:
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writeZ(x,y);
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break;
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case OFFSET_W:
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writeW(x,y);
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break;
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default:
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break;
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}
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size--;
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_vifRegs->offset++;
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case OFFSET_X:
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writeX(x,y);
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break;
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case OFFSET_Y:
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writeY(x,y);
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break;
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case OFFSET_Z:
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writeZ(x,y);
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break;
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case OFFSET_W:
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writeW(x,y);
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break;
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default:
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break;
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}
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_vifRegs->offset++;
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}
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template <class T>
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void __fastcall UNPACK_S(u32 *dest, T *data, int size)
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{
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_UNPACKpart(OFFSET_X, *dest++, *data, size);
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_UNPACKpart(OFFSET_Y, *dest++, *data, size);
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_UNPACKpart(OFFSET_Z, *dest++, *data, size);
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_UNPACKpart(OFFSET_W, *dest , *data, size);
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if(size > 0 && _vifRegs->offset == OFFSET_X ) { _UNPACKpart(OFFSET_X, *dest++, *data); size--; }
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if(size > 0 && _vifRegs->offset == OFFSET_Y ) { _UNPACKpart(OFFSET_Y, *dest++, *data); size--; }
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if(size > 0 && _vifRegs->offset == OFFSET_Z ) { _UNPACKpart(OFFSET_Z, *dest++, *data); size--; }
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if(size > 0 && _vifRegs->offset == OFFSET_W ) { _UNPACKpart(OFFSET_W, *dest , *data); size--; }
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if (_vifRegs->offset == 4) _vifRegs->offset = 0;
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}
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template <class T>
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void __fastcall UNPACK_V2(u32 *dest, T *data, int size)
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{
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_UNPACKpart(OFFSET_X, *dest++, *data++, size);
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_UNPACKpart(OFFSET_Y, *dest++, *data--, size);
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_UNPACKpart(OFFSET_Z, *dest++, *data++);
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_UNPACKpart(OFFSET_W, *dest , *data);
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if(size > 0 && _vifRegs->offset == OFFSET_X ) { _UNPACKpart(OFFSET_X, *dest++, *data++); size--; }
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if(size > 0 && _vifRegs->offset == OFFSET_Y ) { _UNPACKpart(OFFSET_Y, *dest++, *data); size--; }
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if( _vifRegs->offset == OFFSET_Z )_UNPACKpart(OFFSET_Z, *dest++, *dest-2);
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if( _vifRegs->offset == OFFSET_W )_UNPACKpart(OFFSET_W, *dest , *data);
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if (_vifRegs->offset == 4) _vifRegs->offset = 0;
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}
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template <class T>
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void __fastcall UNPACK_V3(u32 *dest, T *data, int size)
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{
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_UNPACKpart(OFFSET_X, *dest++, *data++, size);
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_UNPACKpart(OFFSET_Y, *dest++, *data++, size);
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_UNPACKpart(OFFSET_Z, *dest++, *data++, size);
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if(size > 0 && _vifRegs->offset == OFFSET_X ) { _UNPACKpart(OFFSET_X, *dest++, *data++); size--; }
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if(size > 0 && _vifRegs->offset == OFFSET_Y ) { _UNPACKpart(OFFSET_Y, *dest++, *data++); size--; }
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if(size > 0 && _vifRegs->offset == OFFSET_Z ) { _UNPACKpart(OFFSET_Z, *dest++, *data++); size--; }
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//V3-# does some bizzare thing with alignment, every 6qw of data the W becomes 0 (strange console!)
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if((_vif->qwcalign % 24) == 0)
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_UNPACKpart(OFFSET_W, *dest, 0);
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else
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_UNPACKpart(OFFSET_W, *dest, *data);
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//Ape Escape doesnt seem to like it tho (what the hell?) gonna have to investigate
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if( _vifRegs->offset == OFFSET_W )_UNPACKpart(OFFSET_W, *dest, *data);
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if (_vifRegs->offset == 4) _vifRegs->offset = 0;
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}
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@ -423,19 +391,19 @@ void __fastcall UNPACK_V3(u32 *dest, T *data, int size)
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template <class T>
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void __fastcall UNPACK_V4(u32 *dest, T *data , int size)
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{
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_UNPACKpart(OFFSET_X, *dest++, *data++, size);
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_UNPACKpart(OFFSET_Y, *dest++, *data++, size);
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_UNPACKpart(OFFSET_Z, *dest++, *data++, size);
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_UNPACKpart(OFFSET_W, *dest , *data, size);
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if(size > 0 && _vifRegs->offset == OFFSET_X ) { _UNPACKpart(OFFSET_X, *dest++, *data++); size--; }
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if(size > 0 && _vifRegs->offset == OFFSET_Y ) { _UNPACKpart(OFFSET_Y, *dest++, *data++); size--; }
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if(size > 0 && _vifRegs->offset == OFFSET_Z ) { _UNPACKpart(OFFSET_Z, *dest++, *data++); size--; }
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if(size > 0 && _vifRegs->offset == OFFSET_W ) { _UNPACKpart(OFFSET_W, *dest , *data); size--; }
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if (_vifRegs->offset == 4) _vifRegs->offset = 0;
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}
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void __fastcall UNPACK_V4_5(u32 *dest, u32 *data, int size)
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{
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_UNPACKpart(OFFSET_X, *dest++, ((*data & 0x001f) << 3), size);
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_UNPACKpart(OFFSET_Y, *dest++, ((*data & 0x03e0) >> 2), size);
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_UNPACKpart(OFFSET_Z, *dest++, ((*data & 0x7c00) >> 7), size);
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_UNPACKpart(OFFSET_W, *dest, ((*data & 0x8000) >> 8), size);
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if(size > 0 && _vifRegs->offset == OFFSET_X ) { _UNPACKpart(OFFSET_X, *dest++, ((*data & 0x001f) << 3)); size--; }
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if(size > 0 && _vifRegs->offset == OFFSET_Y ) { _UNPACKpart(OFFSET_Y, *dest++, ((*data & 0x03e0) >> 2)); size--; }
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if(size > 0 && _vifRegs->offset == OFFSET_Z ) { _UNPACKpart(OFFSET_Z, *dest++, ((*data & 0x7c00) >> 7)); size--; }
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if(size > 0 && _vifRegs->offset == OFFSET_W ) { _UNPACKpart(OFFSET_W, *dest, ((*data & 0x8000) >> 8)); size--; }
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if (_vifRegs->offset == 4) _vifRegs->offset = 0;
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}
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@ -29,7 +29,7 @@
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using namespace std; // for min / max
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//#define VIFUNPACKDEBUG //enable unpack debugging output
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#define gif ((DMACh*)&PS2MEM_HW[0xA000])
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@ -379,6 +379,7 @@ static void VIFunpack(u32 *data, vifCode *v, int size, const unsigned int VIFdma
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VIF_LOG("VIF%d UNPACK: Mode=%x, v->size=%d, size=%d, v->addr=%x",
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VIFdmanum, v->cmd & 0xf, v->size, size, v->addr);
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VIFUNPACK_LOG("USN %x Masking %x Mask %x Mode %x CL %x WL %x Offset %x", vif->usn, (vifRegs->code & 0x10000000) >> 28, vifRegs->mask, vifRegs->mode, vifRegs->cycle.cl, vifRegs->cycle.wl, vifRegs->offset);
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#ifdef _DEBUG
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if (v->size != size)
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{
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@ -422,6 +423,8 @@ static void VIFunpack(u32 *data, vifCode *v, int size, const unsigned int VIFdma
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VIFUNPACK_LOG("Aligning packet size = %d offset %d addr %x", size, vifRegs->offset, vif->tag.addr);
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if(((size / ft->dsize) + vifRegs->offset) < (u32)ft->qsize)
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VIFUNPACK_LOG("Warning! Size needed to align %x size chunks available %x offset %x", ft->qsize - ((size / ft->dsize) + vifRegs->offset), vifRegs->offset);
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// SSE doesn't handle such small data
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if (v->size != (size >> 2))
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ProcessMemSkip(size, unpackType, VIFdmanum);
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unpacksize = 0;
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Console::WriteLn("Unpack align offset = 0");
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}
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VIFUNPACK_LOG("Increasing dest by %x from offset %x", (4 - ft->qsize) + unpacksize, vifRegs->offset);
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destinc = (4 - ft->qsize) + unpacksize;
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vif->qwcalign += unpacksize * ft->dsize;
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func(dest, (u32*)cdata, unpacksize);
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size -= unpacksize * ft->dsize;
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cdata += unpacksize * ft->dsize;
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while ((size >= ft->gsize) && (vifRegs->num > 0))
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{
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vif->qwcalign += ft->gsize;
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func(dest, (u32*)cdata, ft->qsize);
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cdata += ft->gsize;
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size -= ft->gsize;
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while ((size >= ft->gsize) && (vifRegs->num > 0))
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{
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vif->qwcalign += ft->gsize; //Must do this before the transfer, else the confusing packets dont go right :P
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func(dest, (u32*)cdata, ft->qsize);
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cdata += ft->gsize;
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size -= ft->gsize;
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//VIF_LOG("warning, end with size = %d", size);
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/* unpack one qword */
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vif->qwcalign += (size / ft->dsize) * ft->dsize;
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func(dest, (u32*)cdata, size / ft->dsize);
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size = 0;
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len = ((((32 >> vl) * (vn + 1)) * n) + 31) >> 5;
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}
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vif0.qwcalign = 0;
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vif0.cl = 0;
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vif0.tag.cmd = vif0.cmd;
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vif0.tag.addr &= 0xfff;
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@ -1519,7 +1519,7 @@ static __forceinline void vif1UNPACK(u32 *data)
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else
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vif1.tag.addr = vif1Regs->code & 0x3ff;
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vif1.qwcalign = 0;
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vif1Regs->offset = 0;
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vif1.cl = 0;
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vif1.tag.addr <<= 4;
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vif1.tag.cmd = vif1.cmd;
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