mirror of https://github.com/PCSX2/pcsx2.git
IPU: Pause IPU_TO on tag edge. Stop repeat Interrupts
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@ -539,7 +539,7 @@ __fi void IPUCMD_WRITE(u32 val)
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{
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IPUCoreStatus.WaitingOnIPUFrom = false;
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IPUCoreStatus.WaitingOnIPUTo = false;
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CPU_INT(IPU_PROCESS, 64);
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IPU_INT_PROCESS(64);
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}
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else
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IPUWorker();
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@ -24,7 +24,7 @@
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#define IPU_INT_TO( cycles ) if(!(cpuRegs.interrupt & (1<<4))) CPU_INT( DMAC_TO_IPU, cycles )
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#define IPU_INT_FROM( cycles ) CPU_INT( DMAC_FROM_IPU, cycles )
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#define IPU_INT_PROCESS( cycles ) if(!(cpuRegs.interrupt & (1 << IPU_PROCESS))) CPU_INT( IPU_PROCESS, cycles )
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//
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// Bitfield Structures
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//
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@ -181,11 +181,11 @@ void WriteFIFO_IPUin(const mem128_t* value)
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//committing every 16 bytes
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if( ipu_fifo.in.write(value->_u32, 1) > 0 )
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{
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if (ipuRegs.ctrl.BUSY && IPUCoreStatus.WaitingOnIPUTo)
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if (ipuRegs.ctrl.BUSY /*&& IPUCoreStatus.WaitingOnIPUTo*/)
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{
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IPUCoreStatus.WaitingOnIPUFrom = false;
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IPUCoreStatus.WaitingOnIPUTo = false;
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CPU_INT(IPU_PROCESS, 2 * BIAS);
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IPU_INT_PROCESS(2 * BIAS);
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}
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}
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}
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@ -1126,7 +1126,7 @@ __ri static bool mpeg2sliceIDEC()
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ready_to_decode = false;
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IPUCoreStatus.WaitingOnIPUFrom = false;
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IPUCoreStatus.WaitingOnIPUTo = false;
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CPU_INT(IPU_PROCESS, 64); // Should probably be much higher, but myst 3 doesn't like it right now.
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IPU_INT_PROCESS( 64); // Should probably be much higher, but myst 3 doesn't like it right now.
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ipu_cmd.pos[1] = 2;
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return false;
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}
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@ -1522,7 +1522,7 @@ __fi static bool mpeg2_slice()
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ready_to_decode = false;
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IPUCoreStatus.WaitingOnIPUFrom = false;
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IPUCoreStatus.WaitingOnIPUTo = false;
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CPU_INT(IPU_PROCESS, 64); // Should probably be much higher, but myst 3 doesn't like it right now.
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IPU_INT_PROCESS( 64); // Should probably be much higher, but myst 3 doesn't like it right now.
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return false;
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}
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@ -88,7 +88,7 @@ void IPU1dma()
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if (IPUCoreStatus.WaitingOnIPUTo)
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{
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IPUCoreStatus.WaitingOnIPUTo = false;
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CPU_INT(IPU_PROCESS, 4 * BIAS);
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IPU_INT_PROCESS(4 * BIAS);
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}
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return;
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}
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@ -130,7 +130,7 @@ void IPU1dma()
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totalqwc += IPU1chain();
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// Nothing has been processed except maybe a tag, or the DMA is ending
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if(totalqwc == 0 || (IPU1Status.DMAFinished && !IPU1Status.InProgress) || IPUCoreStatus.DataRequested)
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if(totalqwc == 0 || (IPU1Status.DMAFinished && !IPU1Status.InProgress))
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{
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totalqwc = std::max(4, totalqwc) + tagcycles;
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IPU_INT_TO(totalqwc * BIAS);
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@ -144,7 +144,7 @@ void IPU1dma()
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if (IPUCoreStatus.WaitingOnIPUTo && g_BP.IFC >= 1)
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{
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IPUCoreStatus.WaitingOnIPUTo = false;
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CPU_INT(IPU_PROCESS, totalqwc * BIAS);
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IPU_INT_PROCESS(totalqwc * BIAS);
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}
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IPU_LOG("Completed Call IPU1 DMA QWC Remaining %x Finished %d In Progress %d tadr %x", ipu1ch.qwc, IPU1Status.DMAFinished, IPU1Status.InProgress, ipu1ch.tadr);
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@ -174,7 +174,7 @@ void IPU0dma()
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if (IPUCoreStatus.WaitingOnIPUFrom)
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{
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IPUCoreStatus.WaitingOnIPUFrom = false;
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CPU_INT(IPU_PROCESS, ipuRegs.ctrl.OFC * BIAS);
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IPU_INT_PROCESS(ipuRegs.ctrl.OFC * BIAS);
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}
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return;
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}
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@ -208,7 +208,7 @@ void IPU0dma()
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if (ipuRegs.ctrl.BUSY && IPUCoreStatus.WaitingOnIPUFrom)
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{
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IPUCoreStatus.WaitingOnIPUFrom = false;
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CPU_INT(IPU_PROCESS, readsize * BIAS);
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IPU_INT_PROCESS(readsize * BIAS);
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}
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}
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