ShuriZma
/
pcsx2
mirror of https://github.com/PCSX2/pcsx2.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

IPU: Pause IPU_TO on tag edge. Stop repeat Interrupts

This commit is contained in:
refractionpcsx2 2023-11-04 21:50:51 +00:00
parent b824c2d31a
commit 0fc9fa541f
5 changed files with 11 additions and 11 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
pcsx2/IPU/IPU.cpp
View File

@ -539,7 +539,7 @@ __fi void IPUCMD_WRITE(u32 val)
{ {
IPUCoreStatus.WaitingOnIPUFrom = false; IPUCoreStatus.WaitingOnIPUFrom = false;
IPUCoreStatus.WaitingOnIPUTo = false; IPUCoreStatus.WaitingOnIPUTo = false;
CPU_INT(IPU_PROCESS, 64); IPU_INT_PROCESS(64);
} }
else else
IPUWorker(); IPUWorker();

2
pcsx2/IPU/IPU.h
View File

@ -24,7 +24,7 @@
#define IPU_INT_TO( cycles ) if(!(cpuRegs.interrupt & (1<<4))) CPU_INT( DMAC_TO_IPU, cycles ) #define IPU_INT_TO( cycles ) if(!(cpuRegs.interrupt & (1<<4))) CPU_INT( DMAC_TO_IPU, cycles )
#define IPU_INT_FROM( cycles ) CPU_INT( DMAC_FROM_IPU, cycles ) #define IPU_INT_FROM( cycles ) CPU_INT( DMAC_FROM_IPU, cycles )
#define IPU_INT_PROCESS( cycles ) if(!(cpuRegs.interrupt & (1 << IPU_PROCESS))) CPU_INT( IPU_PROCESS, cycles )
// //
// Bitfield Structures // Bitfield Structures
// //

4
pcsx2/IPU/IPU_Fifo.cpp
View File

@ -181,11 +181,11 @@ void WriteFIFO_IPUin(const mem128_t* value)
//committing every 16 bytes //committing every 16 bytes
if( ipu_fifo.in.write(value->_u32, 1) > 0 ) if( ipu_fifo.in.write(value->_u32, 1) > 0 )
{ {
if (ipuRegs.ctrl.BUSY && IPUCoreStatus.WaitingOnIPUTo) if (ipuRegs.ctrl.BUSY /*&& IPUCoreStatus.WaitingOnIPUTo*/)
{ {
IPUCoreStatus.WaitingOnIPUFrom = false; IPUCoreStatus.WaitingOnIPUFrom = false;
IPUCoreStatus.WaitingOnIPUTo = false; IPUCoreStatus.WaitingOnIPUTo = false;
CPU_INT(IPU_PROCESS, 2 * BIAS); IPU_INT_PROCESS(2 * BIAS);
} }
} }
} }

4
pcsx2/IPU/IPU_MultiISA.cpp
View File

@ -1126,7 +1126,7 @@ __ri static bool mpeg2sliceIDEC()
ready_to_decode = false; ready_to_decode = false;
IPUCoreStatus.WaitingOnIPUFrom = false; IPUCoreStatus.WaitingOnIPUFrom = false;
IPUCoreStatus.WaitingOnIPUTo = false; IPUCoreStatus.WaitingOnIPUTo = false;
CPU_INT(IPU_PROCESS, 64); // Should probably be much higher, but myst 3 doesn't like it right now. IPU_INT_PROCESS( 64); // Should probably be much higher, but myst 3 doesn't like it right now.
ipu_cmd.pos[1] = 2; ipu_cmd.pos[1] = 2;
return false; return false;
} }
@ -1522,7 +1522,7 @@ __fi static bool mpeg2_slice()
ready_to_decode = false; ready_to_decode = false;
IPUCoreStatus.WaitingOnIPUFrom = false; IPUCoreStatus.WaitingOnIPUFrom = false;
IPUCoreStatus.WaitingOnIPUTo = false; IPUCoreStatus.WaitingOnIPUTo = false;
CPU_INT(IPU_PROCESS, 64); // Should probably be much higher, but myst 3 doesn't like it right now. IPU_INT_PROCESS( 64); // Should probably be much higher, but myst 3 doesn't like it right now.
return false; return false;
} }

10
pcsx2/IPU/IPUdma.cpp
View File

@ -88,7 +88,7 @@ void IPU1dma()
if (IPUCoreStatus.WaitingOnIPUTo) if (IPUCoreStatus.WaitingOnIPUTo)
{ {
IPUCoreStatus.WaitingOnIPUTo = false; IPUCoreStatus.WaitingOnIPUTo = false;
CPU_INT(IPU_PROCESS, 4 * BIAS); IPU_INT_PROCESS(4 * BIAS);
} }
return; return;
} }
@ -130,7 +130,7 @@ void IPU1dma()
totalqwc += IPU1chain(); totalqwc += IPU1chain();
// Nothing has been processed except maybe a tag, or the DMA is ending // Nothing has been processed except maybe a tag, or the DMA is ending
if(totalqwc == 0 || (IPU1Status.DMAFinished && !IPU1Status.InProgress) || IPUCoreStatus.DataRequested) if(totalqwc == 0 || (IPU1Status.DMAFinished && !IPU1Status.InProgress))
{ {
totalqwc = std::max(4, totalqwc) + tagcycles; totalqwc = std::max(4, totalqwc) + tagcycles;
IPU_INT_TO(totalqwc * BIAS); IPU_INT_TO(totalqwc * BIAS);
@ -144,7 +144,7 @@ void IPU1dma()
if (IPUCoreStatus.WaitingOnIPUTo && g_BP.IFC >= 1) if (IPUCoreStatus.WaitingOnIPUTo && g_BP.IFC >= 1)
{ {
IPUCoreStatus.WaitingOnIPUTo = false; IPUCoreStatus.WaitingOnIPUTo = false;
CPU_INT(IPU_PROCESS, totalqwc * BIAS); IPU_INT_PROCESS(totalqwc * BIAS);
} }
IPU_LOG("Completed Call IPU1 DMA QWC Remaining %x Finished %d In Progress %d tadr %x", ipu1ch.qwc, IPU1Status.DMAFinished, IPU1Status.InProgress, ipu1ch.tadr); IPU_LOG("Completed Call IPU1 DMA QWC Remaining %x Finished %d In Progress %d tadr %x", ipu1ch.qwc, IPU1Status.DMAFinished, IPU1Status.InProgress, ipu1ch.tadr);
@ -174,7 +174,7 @@ void IPU0dma()
if (IPUCoreStatus.WaitingOnIPUFrom) if (IPUCoreStatus.WaitingOnIPUFrom)
{ {
IPUCoreStatus.WaitingOnIPUFrom = false; IPUCoreStatus.WaitingOnIPUFrom = false;
CPU_INT(IPU_PROCESS, ipuRegs.ctrl.OFC * BIAS); IPU_INT_PROCESS(ipuRegs.ctrl.OFC * BIAS);
} }
return; return;
} }
@ -208,7 +208,7 @@ void IPU0dma()
if (ipuRegs.ctrl.BUSY && IPUCoreStatus.WaitingOnIPUFrom) if (ipuRegs.ctrl.BUSY && IPUCoreStatus.WaitingOnIPUFrom)
{ {
IPUCoreStatus.WaitingOnIPUFrom = false; IPUCoreStatus.WaitingOnIPUFrom = false;
CPU_INT(IPU_PROCESS, readsize * BIAS); IPU_INT_PROCESS(readsize * BIAS);
} }
} }