From 0f81482ed17b3d3aa514f1b6bd8e97a37a8e3170 Mon Sep 17 00:00:00 2001 From: Gregory Hainaut Date: Sun, 7 Feb 2016 13:19:43 +0100 Subject: [PATCH] EE: remove most of MMX allocator code --- pcsx2/x86/iCore.cpp | 2 +- pcsx2/x86/iCore.h | 53 ++------------------------- pcsx2/x86/ix86-32/iCore-32.cpp | 20 +--------- pcsx2/x86/ix86-32/iR5900-32.cpp | 21 +---------- pcsx2/x86/ix86-32/iR5900Templates.cpp | 5 ++- pcsx2/x86/sVU_zerorec.cpp | 1 - 6 files changed, 9 insertions(+), 93 deletions(-) diff --git a/pcsx2/x86/iCore.cpp b/pcsx2/x86/iCore.cpp index 196dbfec4b..d06e4b75bf 100644 --- a/pcsx2/x86/iCore.cpp +++ b/pcsx2/x86/iCore.cpp @@ -33,7 +33,7 @@ u16 g_xmmAllocCounter = 0; EEINST* g_pCurInstInfo = NULL; // used to make sure regs don't get changed while in recompiler -// use FreezeMMXRegs, FreezeXMMRegs +// use FreezeXMMRegs u32 g_recWriteback = 0; _xmmregs xmmregs[iREGCNT_XMM], s_saveXMMregs[iREGCNT_XMM]; diff --git a/pcsx2/x86/iCore.h b/pcsx2/x86/iCore.h index 2bc8efe66a..4fe0296580 100644 --- a/pcsx2/x86/iCore.h +++ b/pcsx2/x86/iCore.h @@ -268,51 +268,6 @@ int _allocCheckFPUtoXMM(EEINST* pinst, int fpureg, int mode); // allocates only if later insts use this register int _allocCheckGPRtoX86(EEINST* pinst, int gprreg, int mode); -//////////////////////////////////////////////////////////////////////////////// -// MMX (64-bit) Register Allocation Tools - -// max is 0x7f, when 0x80 is set, need to flush reg -//#define MMX_GET_CACHE(ptr, index) ((u8*)ptr)[index] -//#define MMX_SET_CACHE(ptr, ind3, ind2, ind1, ind0) ((u32*)ptr)[0] = (ind3<<24)|(ind2<<16)|(ind1<<8)|ind0; -#define MMX_GPR 0 -#define MMX_HI XMMGPR_HI -#define MMX_LO XMMGPR_LO -#define MMX_FPUACC 34 -#define MMX_FPU 64 -#define MMX_COP0 96 -#define MMX_TEMP 0x7f - -static __fi bool MMX_IS32BITS(s32 x) -{ - return (((x >= MMX_FPU) && (x < MMX_COP0 + 32)) || (x == MMX_FPUACC)); -} - -static __fi bool MMX_ISGPR(s32 x) -{ - return ((x >= MMX_GPR) && (x < MMX_GPR + 34)); -} - -static __fi bool MMX_ISGPR(u32 x) -{ - return (x < MMX_GPR + 34); -} - -struct _mmxregs { - u8 inuse; - u8 reg; // value of 0 - not used - u8 mode; - u8 needed; - u16 counter; -}; - -void _initMMXregs(); -u8 _hasFreeMMXreg(); -int _getNumMMXwrite(); - -extern _mmxregs mmxregs[iREGCNT_MMX], s_saveMMXregs[iREGCNT_MMX]; - -// extern void iDumpRegisters(u32 startpc, u32 temp); - ////////////////////////////////////////////////////////////////////////// // iFlushCall / _psxFlushCall Parameters @@ -331,8 +286,6 @@ extern _mmxregs mmxregs[iREGCNT_MMX], s_saveMMXregs[iREGCNT_MMX]; #define FLUSH_CACHED_REGS 0x001 #define FLUSH_FLUSH_XMM 0x002 #define FLUSH_FREE_XMM 0x004 // both flushes and frees -#define FLUSH_FLUSH_MMX 0x008 -#define FLUSH_FREE_MMX 0x010 // both flushes and frees #define FLUSH_FLUSH_ALLX86 0x020 // flush x86 #define FLUSH_FREE_TEMPX86 0x040 // flush and free temporary x86 regs #define FLUSH_FREE_ALLX86 0x080 // free all x86 regs @@ -346,9 +299,9 @@ extern _mmxregs mmxregs[iREGCNT_MMX], s_saveMMXregs[iREGCNT_MMX]; #define FLUSH_INTERPRETER 0xfff #define FLUSH_FULLVTLB FLUSH_NOCONST -// no freeing, used when callee won't destroy mmx/xmm regs -#define FLUSH_NODESTROY (FLUSH_CACHED_REGS|FLUSH_FLUSH_XMM|FLUSH_FLUSH_MMX|FLUSH_FLUSH_ALLX86) +// no freeing, used when callee won't destroy xmm regs +#define FLUSH_NODESTROY (FLUSH_CACHED_REGS|FLUSH_FLUSH_XMM|FLUSH_FLUSH_ALLX86) // used when regs aren't going to be changed be callee -#define FLUSH_NOCONST (FLUSH_FREE_XMM|FLUSH_FREE_MMX|FLUSH_FREE_TEMPX86) +#define FLUSH_NOCONST (FLUSH_FREE_XMM|FLUSH_FREE_TEMPX86) #endif diff --git a/pcsx2/x86/ix86-32/iCore-32.cpp b/pcsx2/x86/ix86-32/iCore-32.cpp index a14f35927b..f0c3521884 100644 --- a/pcsx2/x86/ix86-32/iCore-32.cpp +++ b/pcsx2/x86/ix86-32/iCore-32.cpp @@ -28,8 +28,6 @@ using namespace x86Emitter; // landmass of shared code. (air) extern u32 g_psxConstRegs[32]; -static u16 g_mmxAllocCounter = 0; - // X86 caching static int g_x86checknext; @@ -469,23 +467,7 @@ void _freeX86regs() _freeX86reg(i); } -// MMX Caching -_mmxregs mmxregs[8], s_saveMMXregs[8]; -static int s_mmxchecknext = 0; - -void _initMMXregs() -{ - memzero(mmxregs); - g_mmxAllocCounter = 0; - s_mmxchecknext = 0; -} - -int _getNumMMXwrite() -{ - uint num = 0, i; - - return num; -} +// Misc void _signExtendSFtoM(uptr mem) { diff --git a/pcsx2/x86/ix86-32/iR5900-32.cpp b/pcsx2/x86/ix86-32/iR5900-32.cpp index d981459977..0a4e7a79e0 100644 --- a/pcsx2/x86/ix86-32/iR5900-32.cpp +++ b/pcsx2/x86/ix86-32/iR5900-32.cpp @@ -231,11 +231,6 @@ int _flushXMMunused() return 0; } -int _flushMMXunused() -{ - return 0; -} - int _flushUnusedConstReg() { int i; @@ -906,8 +901,6 @@ void SaveBranchState() s_saveFlushedConstReg = g_cpuFlushedConstReg; s_psaveInstInfo = g_pCurInstInfo; - // save all mmx regs - memcpy(s_saveMMXregs, mmxregs, sizeof(mmxregs)); memcpy(s_saveXMMregs, xmmregs, sizeof(xmmregs)); } @@ -920,8 +913,6 @@ void LoadBranchState() g_cpuFlushedConstReg = s_saveFlushedConstReg; g_pCurInstInfo = s_psaveInstInfo; - // restore all mmx regs - memcpy(mmxregs, s_saveMMXregs, sizeof(mmxregs)); memcpy(xmmregs, s_saveXMMregs, sizeof(xmmregs)); } @@ -1267,15 +1258,6 @@ void recompileNextInstruction(int delayslot) g_pCurInstInfo++; - for(i = 0; i < iREGCNT_MMX; ++i) { - if( mmxregs[i].inuse ) { - pxAssert( MMX_ISGPR(mmxregs[i].reg) ); - count = _recIsRegWritten(g_pCurInstInfo, (s_nEndBlock-pc)/4 + 1, XMMTYPE_GPRREG, mmxregs[i].reg-MMX_GPR); - if( count > 0 ) mmxregs[i].counter = 1000-count; - else mmxregs[i].counter = 0; - } - } - for(i = 0; i < iREGCNT_XMM; ++i) { if( xmmregs[i].inuse ) { count = _recIsRegWritten(g_pCurInstInfo, (s_nEndBlock-pc)/4 + 1, xmmregs[i].type, xmmregs[i].reg); @@ -1332,7 +1314,7 @@ void recompileNextInstruction(int delayslot) if( s_bFlushReg ) { //if( !_flushUnusedConstReg() ) { int flushed = 0; - if( _getNumMMXwrite() > 3 ) flushed = _flushMMXunused(); + if( false ) flushed = 0; // old mmx path. I don't understand why flushed isn't set in the line below if( !flushed && _getNumXMMwrite() > 2 ) _flushXMMunused(); s_bFlushReg = !flushed; // } @@ -1650,7 +1632,6 @@ static void __fastcall recRecompile( const u32 startpc ) _initX86regs(); _initXMMregs(); - _initMMXregs(); if( EmuConfig.Cpu.Recompiler.PreBlockCheckEE ) { diff --git a/pcsx2/x86/ix86-32/iR5900Templates.cpp b/pcsx2/x86/ix86-32/iR5900Templates.cpp index 5af21c90bd..ae65960f86 100644 --- a/pcsx2/x86/ix86-32/iR5900Templates.cpp +++ b/pcsx2/x86/ix86-32/iR5900Templates.cpp @@ -75,8 +75,9 @@ int eeProcessHILO(int reg, int mode, int mmx) return -1; } -#define PROCESS_EE_SETMODES(mmreg) ((mmxregs[mmreg].mode&MODE_WRITE)?PROCESS_EE_MODEWRITES:0) -#define PROCESS_EE_SETMODET(mmreg) ((mmxregs[mmreg].mode&MODE_WRITE)?PROCESS_EE_MODEWRITET:0) +// Strangely this code is used on NOT-MMX path ... +#define PROCESS_EE_SETMODES(mmreg) (/*(mmxregs[mmreg].mode&MODE_WRITE)*/ false ?PROCESS_EE_MODEWRITES:0) +#define PROCESS_EE_SETMODET(mmreg) (/*(mmxregs[mmreg].mode&MODE_WRITE)*/ false ?PROCESS_EE_MODEWRITET:0) // ignores XMMINFO_READS, XMMINFO_READT, and XMMINFO_READD_LO from xmminfo // core of reg caching diff --git a/pcsx2/x86/sVU_zerorec.cpp b/pcsx2/x86/sVU_zerorec.cpp index 6c3668f3d7..5744e7aedb 100644 --- a/pcsx2/x86/sVU_zerorec.cpp +++ b/pcsx2/x86/sVU_zerorec.cpp @@ -2545,7 +2545,6 @@ void SuperVUCleanupProgram(u32 startpc, int vuindex) // Could clear allocation info to prevent possibly bad data being used in other parts of pcsx2; // not doing this because it's slow and not needed (rama) // _initXMMregs(); - // _initMMXregs(); // _initX86regs(); }