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Merge pull request #1535 from PCSX2/clang-tidy-macro-parenthesis 

clang-tidy: use parenthesis around macro parameters
This commit is contained in:
Gregory Hainaut 2016-09-18 18:48:04 +02:00 committed by GitHub
parent 15fbd6fbf4 6e6eae7844
commit 0f387a8e3c
21 changed files with 164 additions and 154 deletions
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98
pcsx2/FPU.cpp
View File

@ -74,23 +74,28 @@
//****************************************************************
// If we have an infinity value, then Overflow has occured.
#define checkOverflow(xReg, cFlagsToSet, shouldReturn) { \
if ( ( xReg & ~0x80000000 ) == PosInfinity ) { \
/*Console.Warning( "FPU OVERFLOW!: Changing to +/-Fmax!!!!!!!!!!!!\n" );*/ \
xReg = ( xReg & 0x80000000 ) | posFmax; \
_ContVal_ |= cFlagsToSet; \
if ( shouldReturn ) { return; } \
} \
bool checkOverflow(u32& xReg, u32 cFlagsToSet)
{
if ( (xReg & ~0x80000000) == PosInfinity ) {
/*Console.Warning( "FPU OVERFLOW!: Changing to +/-Fmax!!!!!!!!!!!!\n" );*/
xReg = (xReg & 0x80000000) | posFmax;
_ContVal_ |= (cFlagsToSet);
return true;
}
return false;
}
// If we have a denormal value, then Underflow has occured.
#define checkUnderflow(xReg, cFlagsToSet, shouldReturn) { \
if ( ( ( xReg & 0x7F800000 ) == 0 ) && ( ( xReg & 0x007FFFFF ) != 0 ) ) { \
/*Console.Warning( "FPU UNDERFLOW!: Changing to +/-0!!!!!!!!!!!!\n" );*/ \
xReg &= 0x80000000; \
_ContVal_ |= cFlagsToSet; \
if ( shouldReturn ) { return; } \
} \
bool checkUnderflow(u32& xReg, u32 cFlagsToSet) {
if ( ( (xReg & 0x7F800000) == 0 ) && ( (xReg & 0x007FFFFF) != 0 ) ) {
/*Console.Warning( "FPU UNDERFLOW!: Changing to +/-0!!!!!!!!!!!!\n" );*/
xReg &= 0x80000000;
_ContVal_ |= (cFlagsToSet);
return true;
}
return false;
}
/* Checks if Divide by Zero will occur. (z/y = x)
@ -98,12 +103,15 @@
cFlagsToSet2 = Flags to set if (z == 0)
( Denormals are counted as "0" )
*/
#define checkDivideByZero(xReg, yDivisorReg, zDividendReg, cFlagsToSet1, cFlagsToSet2, shouldReturn) { \
if ( ( yDivisorReg & 0x7F800000 ) == 0 ) { \
_ContVal_ |= ( ( zDividendReg & 0x7F800000 ) == 0 ) ? cFlagsToSet2 : cFlagsToSet1; \
xReg = ( ( yDivisorReg ^ zDividendReg ) & 0x80000000 ) | posFmax; \
if ( shouldReturn ) { return; } \
} \
bool checkDivideByZero(u32& xReg, u32 yDivisorReg, u32 zDividendReg, u32 cFlagsToSet1, u32 cFlagsToSet2) {
if ( (yDivisorReg & 0x7F800000) == 0 ) {
_ContVal_ |= ( (zDividendReg & 0x7F800000) == 0 ) ? cFlagsToSet2 : cFlagsToSet1;
xReg = ( (yDivisorReg ^ zDividendReg) & 0x80000000 ) | posFmax;
return true;
}
return false;
}
/* Clears the "Cause Flags" of the Control/Status Reg
@ -180,14 +188,14 @@ void ABS_S() {
void ADD_S() {
_FdValf_ = fpuDouble( _FsValUl_ ) + fpuDouble( _FtValUl_ );
checkOverflow( _FdValUl_, FPUflagO | FPUflagSO, 1 );
checkUnderflow( _FdValUl_, FPUflagU | FPUflagSU, 1 );
if (checkOverflow( _FdValUl_, FPUflagO | FPUflagSO)) return;
checkUnderflow( _FdValUl_, FPUflagU | FPUflagSU);
}
void ADDA_S() {
_FAValf_ = fpuDouble( _FsValUl_ ) + fpuDouble( _FtValUl_ );
checkOverflow( _FAValUl_, FPUflagO | FPUflagSO, 1 );
checkUnderflow( _FAValUl_, FPUflagU | FPUflagSU, 1 );
if (checkOverflow( _FAValUl_, FPUflagO | FPUflagSO)) return;
checkUnderflow( _FAValUl_, FPUflagU | FPUflagSU);
}
void BC1F() {
@ -248,10 +256,10 @@ void CVT_W() {
}
void DIV_S() {
checkDivideByZero( _FdValUl_, _FtValUl_, _FsValUl_, FPUflagD | FPUflagSD, FPUflagI | FPUflagSI, 1 );
if (checkDivideByZero( _FdValUl_, _FtValUl_, _FsValUl_, FPUflagD | FPUflagSD, FPUflagI | FPUflagSI)) return;
_FdValf_ = fpuDouble( _FsValUl_ ) / fpuDouble( _FtValUl_ );
checkOverflow( _FdValUl_, 0, 1);
checkUnderflow( _FdValUl_, 0, 1 );
if (checkOverflow( _FdValUl_, 0)) return;
checkUnderflow( _FdValUl_, 0);
}
/* The Instruction Set manual has an overly complicated way of
@ -262,14 +270,14 @@ void MADD_S() {
FPRreg temp;
temp.f = fpuDouble( _FsValUl_ ) * fpuDouble( _FtValUl_ );
_FdValf_ = fpuDouble( _FAValUl_ ) + fpuDouble( temp.UL );
checkOverflow( _FdValUl_, FPUflagO | FPUflagSO, 1 );
checkUnderflow( _FdValUl_, FPUflagU | FPUflagSU, 1 );
if (checkOverflow( _FdValUl_, FPUflagO | FPUflagSO)) return;
checkUnderflow( _FdValUl_, FPUflagU | FPUflagSU);
}
void MADDA_S() {
_FAValf_ += fpuDouble( _FsValUl_ ) * fpuDouble( _FtValUl_ );
checkOverflow( _FAValUl_, FPUflagO | FPUflagSO, 1 );
checkUnderflow( _FAValUl_, FPUflagU | FPUflagSU, 1 );
if (checkOverflow( _FAValUl_, FPUflagO | FPUflagSO)) return;
checkUnderflow( _FAValUl_, FPUflagU | FPUflagSU);
}
void MAX_S() {
@ -295,14 +303,14 @@ void MSUB_S() {
FPRreg temp;
temp.f = fpuDouble( _FsValUl_ ) * fpuDouble( _FtValUl_ );
_FdValf_ = fpuDouble( _FAValUl_ ) - fpuDouble( temp.UL );
checkOverflow( _FdValUl_, FPUflagO | FPUflagSO, 1 );
checkUnderflow( _FdValUl_, FPUflagU | FPUflagSU, 1 );
if (checkOverflow( _FdValUl_, FPUflagO | FPUflagSO)) return;
checkUnderflow( _FdValUl_, FPUflagU | FPUflagSU);
}
void MSUBA_S() {
_FAValf_ -= fpuDouble( _FsValUl_ ) * fpuDouble( _FtValUl_ );
checkOverflow( _FAValUl_, FPUflagO | FPUflagSO, 1 );
checkUnderflow( _FAValUl_, FPUflagU | FPUflagSU, 1 );
if (checkOverflow( _FAValUl_, FPUflagO | FPUflagSO)) return;
checkUnderflow( _FAValUl_, FPUflagU | FPUflagSU);
}
void MTC1() {
@ -311,14 +319,14 @@ void MTC1() {
void MUL_S() {
_FdValf_ = fpuDouble( _FsValUl_ ) * fpuDouble( _FtValUl_ );
checkOverflow( _FdValUl_, FPUflagO | FPUflagSO, 1 );
checkUnderflow( _FdValUl_, FPUflagU | FPUflagSU, 1 );
if (checkOverflow( _FdValUl_, FPUflagO | FPUflagSO)) return;
checkUnderflow( _FdValUl_, FPUflagU | FPUflagSU);
}
void MULA_S() {
_FAValf_ = fpuDouble( _FsValUl_ ) * fpuDouble( _FtValUl_ );
checkOverflow( _FAValUl_, FPUflagO | FPUflagSO, 1 );
checkUnderflow( _FAValUl_, FPUflagU | FPUflagSU, 1 );
if (checkOverflow( _FAValUl_, FPUflagO | FPUflagSO)) return;
checkUnderflow( _FAValUl_, FPUflagU | FPUflagSU);
}
void NEG_S() {
@ -340,8 +348,8 @@ void RSQRT_S() {
}
else { _FdValf_ = fpuDouble( _FsValUl_ ) / sqrt( fpuDouble( _FtValUl_ ) ); } // Ft is positive and not zero
checkOverflow( _FdValUl_, 0, 1 );
checkUnderflow( _FdValUl_, 0, 1 );
if (checkOverflow( _FdValUl_, 0)) return;
checkUnderflow( _FdValUl_, 0);
}
void SQRT_S() {
@ -357,14 +365,14 @@ void SQRT_S() {
void SUB_S() {
_FdValf_ = fpuDouble( _FsValUl_ ) - fpuDouble( _FtValUl_ );
checkOverflow( _FdValUl_, FPUflagO | FPUflagSO, 1 );
checkUnderflow( _FdValUl_, FPUflagU | FPUflagSU, 1 );
if (checkOverflow( _FdValUl_, FPUflagO | FPUflagSO)) return;
checkUnderflow( _FdValUl_, FPUflagU | FPUflagSU);
}
void SUBA_S() {
_FAValf_ = fpuDouble( _FsValUl_ ) - fpuDouble( _FtValUl_ );
checkOverflow( _FAValUl_, FPUflagO | FPUflagSO, 1 );
checkUnderflow( _FAValUl_, FPUflagU | FPUflagSU, 1 );
if (checkOverflow( _FAValUl_, FPUflagO | FPUflagSO)) return;
checkUnderflow( _FAValUl_, FPUflagU | FPUflagSU);
}
} // End Namespace COP1

21
pcsx2/IPU/mpeg2lib/Idct.cpp
View File

@ -38,8 +38,6 @@
#define W5 1609 /* 2048*sqrt (2)*cos (5*pi/16) */
#define W6 1108 /* 2048*sqrt (2)*cos (6*pi/16) */
#define W7 565 /* 2048*sqrt (2)*cos (7*pi/16) */
#define clp(val,res) res = (val < 0) ? 0 : ((val > 255) ? 255 : val);
#define clp2(val,res) res = (val < -255) ? -255 : ((val > 255) ? 255 : val);
/*
* In legal streams, the IDCT output should be between -384 and +384.
@ -51,20 +49,17 @@ static __aligned16 u8 clip_lut[1024];
#define CLIP(i) ((clip_lut+384)[(i)])
static __fi void BUTTERFLY(int& t0, int& t1, int w0, int w1, int d0, int d1)
{
#if 0
#define BUTTERFLY(t0,t1,W0,W1,d0,d1) \
do { \
t0 = W0*d0 + W1*d1; \
t1 = W0*d1 - W1*d0; \
} while (0)
t0 = w0*d0 + w1*d1;
t1 = w0*d1 - w1*d0;
#else
#define BUTTERFLY(t0,t1,W0,W1,d0,d1) \
do { \
int tmp = W0 * (d0 + d1); \
t0 = tmp + (W1 - W0) * d1; \
t1 = tmp - (W1 + W0) * d0; \
} while (0)
int tmp = w0 * (d0 + d1);
t0 = tmp + (w1 - w0) * d1;
t1 = tmp - (w1 + w0) * d0;
#endif
}
static __fi void idct_row (s16 * const block)
{

10
pcsx2/IPU/mpeg2lib/Mpeg.cpp
View File

@ -334,11 +334,11 @@ static __fi int get_chroma_dc_dct_diff()
return dc_diff;
}
#define SATURATE(val) \
do { \
if (((u32)(val + 2048) > 4095)) \
val = (((s32)val) >> 31) ^ 2047; \
} while (0)
static __fi void SATURATE(int& val)
{
if ((u32)(val + 2048) > 4095)
val = (val >> 31) ^ 2047;
}
static bool get_intra_block()
{

10
pcsx2/IPU/yuv2rgb.cpp
View File

@ -28,11 +28,11 @@
// faster or "more accurate" implementation, but this is the precise documented integer method used by
// the hardware and is fast enough with SSE2.
#define IPU_Y_BIAS 16
#define IPU_C_BIAS 128
#define IPU_Y_COEFF 0x95 // 1.1640625
#define IPU_GCR_COEFF -0x68 // -0.8125
#define IPU_GCB_COEFF -0x32 // -0.390625
#define IPU_Y_BIAS 16
#define IPU_C_BIAS 128
#define IPU_Y_COEFF 0x95 // 1.1640625
#define IPU_GCR_COEFF (-0x68) // -0.8125
#define IPU_GCB_COEFF (-0x32) // -0.390625
#define IPU_RCR_COEFF 0xcc // 1.59375
#define IPU_BCB_COEFF 0x102 // 2.015625

4
pcsx2/IopGte.cpp
View File

@ -425,8 +425,8 @@ __inline s32 FNC_OVERFLOW4(s64 x) {
}
#define _LIMX(negv, posv, flagb) { \
if (x < (negv)) { x = (negv); gteFLAG |= (1<<flagb); } else \
if (x > (posv)) { x = (posv); gteFLAG |= (1<<flagb); } return (x); \
if (x < (negv)) { x = (negv); gteFLAG |= (1<<(flagb)); } else \
if (x > (posv)) { x = (posv); gteFLAG |= (1<<(flagb)); } return (x); \
}
__inline double limA1S(double x) { _LIMX(-32768.0, 32767.0, 24); }

4
pcsx2/MTVU.cpp
View File

@ -21,10 +21,12 @@
__aligned16 VU_Thread vu1Thread(CpuVU1, VU1);
#define size_u32(x) (((u32)x+3u)>>2) // Rounds up a size in bytes for size in u32's
#define MTVU_ALWAYS_KICK 0
#define MTVU_SYNC_MODE 0
// Rounds up a size in bytes for size in u32's
static __fi u32 size_u32(u32 x) { return (x + 3) >> 2; }
enum MTVU_EVENT {
MTVU_VU_EXECUTE, // Execute VU program
MTVU_VU_WRITE_MICRO, // Write to VU micro-mem

5
pcsx2/VU0.cpp
View File

@ -35,11 +35,6 @@
#define _Fs_ _Rd_
#define _Fd_ _Sa_
#define _X (cpuRegs.code>>24) & 0x1
#define _Y (cpuRegs.code>>23) & 0x1
#define _Z (cpuRegs.code>>22) & 0x1
#define _W (cpuRegs.code>>21) & 0x1
#define _Fsf_ ((cpuRegs.code >> 21) & 0x03)
#define _Ftf_ ((cpuRegs.code >> 23) & 0x03)

2
pcsx2/VU0micro.cpp
View File

@ -26,8 +26,6 @@
using namespace R5900;
#define VF_VAL(x) ((x==0x80000000)?0:(x))
// This is called by the COP2 as per the CTC instruction
void vu0ResetRegs()
{

2
pcsx2/VU1micro.cpp
View File

@ -27,8 +27,6 @@
u32 vudump = 0;
#endif
#define VF_VAL(x) ((x==0x80000000)?0:(x))
// This is called by the COP2 as per the CTC instruction
void vu1ResetRegs()
{

30
pcsx2/VUops.cpp
View File

@ -2240,7 +2240,7 @@ static __ri void _vuRegs##OP(const VURegs* VU, _VURegsNum *VUregsn) { \
VUregsn->VFr0xyzw= _XYZW; \
VUregsn->VFread1 = 0; \
VUregsn->VIwrite = 0; \
VUregsn->VIread = (1 << REG_I)|(ACC?(1<<REG_ACC_FLAG):0)|GET_VF0_FLAG(_Fs_); \
VUregsn->VIread = (1 << REG_I)|((ACC)?(1<<REG_ACC_FLAG):0)|GET_VF0_FLAG(_Fs_); \
}
#define VUREGS_FDFSQ(OP, ACC) \
@ -2252,7 +2252,7 @@ static __ri void _vuRegs##OP(const VURegs* VU, _VURegsNum *VUregsn) { \
VUregsn->VFr0xyzw= _XYZW; \
VUregsn->VFread1 = 0; \
VUregsn->VIwrite = 0; \
VUregsn->VIread = (1 << REG_Q)|(ACC?(1<<REG_ACC_FLAG):0)|GET_VF0_FLAG(_Fs_); \
VUregsn->VIread = (1 << REG_Q)|((ACC)?(1<<REG_ACC_FLAG):0)|GET_VF0_FLAG(_Fs_); \
}
#define VUREGS_FDFSFT(OP, ACC) \
@ -2265,7 +2265,7 @@ static __ri void _vuRegs##OP(const VURegs* VU, _VURegsNum *VUregsn) { \
VUregsn->VFread1 = _Ft_; \
VUregsn->VFr1xyzw= _XYZW; \
VUregsn->VIwrite = 0; \
VUregsn->VIread = (ACC?(1<<REG_ACC_FLAG):0)|GET_VF0_FLAG(_Fs_)|GET_VF0_FLAG(_Ft_); \
VUregsn->VIread = ((ACC)?(1<<REG_ACC_FLAG):0)|GET_VF0_FLAG(_Fs_)|GET_VF0_FLAG(_Ft_); \
}
#define VUREGS_FDFSFTxyzw(OP, xyzw, ACC) \
@ -2278,7 +2278,7 @@ static __ri void _vuRegs##OP(const VURegs* VU, _VURegsNum *VUregsn) { \
VUregsn->VFread1 = _Ft_; \
VUregsn->VFr1xyzw= xyzw; \
VUregsn->VIwrite = 0; \
VUregsn->VIread = (ACC?(1<<REG_ACC_FLAG):0)|GET_VF0_FLAG(_Fs_)|GET_VF0_FLAG(_Ft_); \
VUregsn->VIread = ((ACC)?(1<<REG_ACC_FLAG):0)|GET_VF0_FLAG(_Fs_)|GET_VF0_FLAG(_Ft_); \
}
#define VUREGS_FDFSFTx(OP, ACC) VUREGS_FDFSFTxyzw(OP, 8, ACC)
@ -2296,7 +2296,7 @@ static __ri void _vuRegs##OP(const VURegs* VU, _VURegsNum *VUregsn) { \
VUregsn->VFr0xyzw= _XYZW; \
VUregsn->VFread1 = 0; \
VUregsn->VIwrite = (1<<REG_ACC_FLAG); \
VUregsn->VIread = (1 << REG_I)|GET_VF0_FLAG(_Fs_)|((readacc||_XYZW!=15)?(1<<REG_ACC_FLAG):0); \
VUregsn->VIread = (1 << REG_I)|GET_VF0_FLAG(_Fs_)|(((readacc)||_XYZW!=15)?(1<<REG_ACC_FLAG):0); \
}
#define VUREGS_ACCFSQ(OP, readacc) \
@ -2308,7 +2308,7 @@ static __ri void _vuRegs##OP(const VURegs* VU, _VURegsNum *VUregsn) { \
VUregsn->VFr0xyzw= _XYZW; \
VUregsn->VFread1 = 0; \
VUregsn->VIwrite = (1<<REG_ACC_FLAG); \
VUregsn->VIread = (1 << REG_Q)|GET_VF0_FLAG(_Fs_)|((readacc||_XYZW!=15)?(1<<REG_ACC_FLAG):0); \
VUregsn->VIread = (1 << REG_Q)|GET_VF0_FLAG(_Fs_)|(((readacc)||_XYZW!=15)?(1<<REG_ACC_FLAG):0); \
}
#define VUREGS_ACCFSFT(OP, readacc) \
@ -2321,7 +2321,7 @@ static __ri void _vuRegs##OP(const VURegs* VU, _VURegsNum *VUregsn) { \
VUregsn->VFread1 = _Ft_; \
VUregsn->VFr1xyzw= _XYZW; \
VUregsn->VIwrite = (1<<REG_ACC_FLAG); \
VUregsn->VIread = GET_VF0_FLAG(_Fs_)|GET_VF0_FLAG(_Ft_)|((readacc||_XYZW!=15)?(1<<REG_ACC_FLAG):0); \
VUregsn->VIread = GET_VF0_FLAG(_Fs_)|GET_VF0_FLAG(_Ft_)|(((readacc)||_XYZW!=15)?(1<<REG_ACC_FLAG):0); \
}
#define VUREGS_ACCFSFTxyzw(OP, xyzw, readacc) \
@ -2334,7 +2334,7 @@ static __ri void _vuRegs##OP(const VURegs* VU, _VURegsNum *VUregsn) { \
VUregsn->VFread1 = _Ft_; \
VUregsn->VFr1xyzw= xyzw; \
VUregsn->VIwrite = (1<<REG_ACC_FLAG); \
VUregsn->VIread = GET_VF0_FLAG(_Fs_)|GET_VF0_FLAG(_Ft_)|((readacc||_XYZW!=15)?(1<<REG_ACC_FLAG):0); \
VUregsn->VIread = GET_VF0_FLAG(_Fs_)|GET_VF0_FLAG(_Ft_)|(((readacc)||_XYZW!=15)?(1<<REG_ACC_FLAG):0); \
}
#define VUREGS_ACCFSFTx(OP, readacc) VUREGS_ACCFSFTxyzw(OP, 8, readacc)
@ -2437,27 +2437,27 @@ VUREGS_ACCFSFTw(SUBAw, 0);
#define VUREGS_FDFSFTxyzw_MUL(OP, ACC, xyzw) \
static __ri void _vuRegs##OP(const VURegs* VU, _VURegsNum *VUregsn) { \
if( _Ft_ == 0 && xyzw > 1 && _XYZW == 0xf ) { /* resetting to 0 */ \
if( _Ft_ == 0 && (xyzw) > 1 && _XYZW == 0xf ) { /* resetting to 0 */ \
VUregsn->pipe = VUPIPE_FMAC; \
VUregsn->VFwrite = ACC?0:_Fd_; \
VUregsn->VFwrite = (ACC)?0:_Fd_; \
VUregsn->VFwxyzw = _XYZW; \
VUregsn->VFread0 = 0; \
VUregsn->VFr0xyzw= _XYZW; \
VUregsn->VFread1 = 0; \
VUregsn->VFr1xyzw= xyzw; \
VUregsn->VIwrite = (ACC?(1<<REG_ACC_FLAG):0); \
VUregsn->VIread = (ACC&&(_XYZW!=15))?(1<<REG_ACC_FLAG):0; \
VUregsn->VIwrite = ((ACC)?(1<<REG_ACC_FLAG):0); \
VUregsn->VIread = ((ACC)&&(_XYZW!=15))?(1<<REG_ACC_FLAG):0; \
} \
else { \
VUregsn->pipe = VUPIPE_FMAC; \
VUregsn->VFwrite = ACC?0:_Fd_; \
VUregsn->VFwrite = (ACC)?0:_Fd_; \
VUregsn->VFwxyzw = _XYZW; \
VUregsn->VFread0 = _Fs_; \
VUregsn->VFr0xyzw= _XYZW; \
VUregsn->VFread1 = _Ft_; \
VUregsn->VFr1xyzw= xyzw; \
VUregsn->VIwrite = (ACC?(1<<REG_ACC_FLAG):0); \
VUregsn->VIread = GET_VF0_FLAG(_Fs_)|((ACC&&(_XYZW!=15))?(1<<REG_ACC_FLAG):0); \
VUregsn->VIwrite = ((ACC)?(1<<REG_ACC_FLAG):0); \
VUregsn->VIread = GET_VF0_FLAG(_Fs_)|(((ACC)&&(_XYZW!=15))?(1<<REG_ACC_FLAG):0); \
} \
}

4
pcsx2/gui/Panels/ConfigurationPanels.h
View File

@ -409,6 +409,10 @@ namespace Panels
void PopulateFields( const wxString& serial=wxEmptyString );
bool WriteFieldsToDB();
void Search_Click( wxCommandEvent& evt );
private:
void placeTextBox(wxFlexGridSizer& sizer1, wxTextCtrl* wxBox, const wxString& txt);
void blankLine(wxFlexGridSizer& sizer1);
};
class SettingsDirPickerPanel : public DirPickerPanel

47
pcsx2/gui/Panels/GameDatabasePanel.cpp
View File

@ -309,18 +309,6 @@ wxListItemAttr* GameDatabaseListView::OnGetItemAttr(long item) const
}
#define blankLine() { \
sizer1+=5; sizer1+=5; sizer1+=Text(wxEmptyString); sizer1+=5; sizer1+=5; \
}
#define placeTextBox(wxBox, txt) { \
sizer1 += Label(_(txt)); \
sizer1 += 5; \
sizer1 += wxBox | pxCenter; \
sizer1 += 5; \
sizer1 += 5; \
}
wxTextCtrl* CreateMultiLineTextCtrl( wxWindow* parent, int digits, long flags = 0 )
{
wxTextCtrl* ctrl = new wxTextCtrl(parent, wxID_ANY, wxEmptyString, wxDefaultPosition, wxDefaultSize, wxTE_MULTILINE);
@ -350,20 +338,20 @@ Panels::GameDatabasePanel::GameDatabasePanel( wxWindow* parent )
wxFlexGridSizer& sizer1(*new wxFlexGridSizer(5, StdPadding, 0));
sizer1.AddGrowableCol(0);
blankLine();
sizer1 += Label(L"Serial: ");
blankLine(sizer1);
sizer1 += Label(L"Serial: ");
sizer1 += 5;
sizer1 += serialBox | pxCenter;
sizer1 += 5;
sizer1 += searchBtn;
placeTextBox(nameBox, "Name: ");
placeTextBox(regionBox, "Region: ");
placeTextBox(compatBox, "Compatibility: ");
placeTextBox(commentBox, "Comments: ");
placeTextBox(patchesBox, "Patches: ");
placeTextBox(sizer1, nameBox, _("Name: "));
placeTextBox(sizer1, regionBox, _("Region: "));
placeTextBox(sizer1, compatBox, _("Compatibility: "));
placeTextBox(sizer1, commentBox, _("Comments: "));
placeTextBox(sizer1, patchesBox, _("Patches: "));
blankLine();
blankLine(sizer1);
wxStaticBoxSizer& sizer2 = *new wxStaticBoxSizer(wxVERTICAL, this, _("Gamefixes"));
wxFlexGridSizer& sizer3(*new wxFlexGridSizer(3, 0, StdPadding*4));
@ -381,6 +369,20 @@ Panels::GameDatabasePanel::GameDatabasePanel( wxWindow* parent )
PopulateFields();
}
void Panels::GameDatabasePanel::blankLine(wxFlexGridSizer& sizer1)
{
sizer1+=5; sizer1+=5; sizer1+=Text(wxEmptyString); sizer1+=5; sizer1+=5;
}
void Panels::GameDatabasePanel::placeTextBox(wxFlexGridSizer& sizer1, wxTextCtrl* wxBox, const wxString& txt)
{
sizer1 += Label(txt);
sizer1 += 5;
sizer1 += wxBox | pxCenter;
sizer1 += 5;
sizer1 += 5;
}
void Panels::GameDatabasePanel::PopulateFields( const wxString& id ) {
IGameDatabase* GameDB = AppHost_GetGameDatabase();
if (!pxAssert(GameDB)) return;
@ -417,11 +419,6 @@ void Panels::GameDatabasePanel::PopulateFields( const wxString& id ) {
}
}
#define writeTextBoxToDB(_key, _value) { \
if (_value.IsEmpty()) GameDB->deleteKey(wxT(_key)); \
else GameDB->writeString(wxT(_key), _value); \
}
// returns True if the database is modified, or FALSE if no changes to save.
bool Panels::GameDatabasePanel::WriteFieldsToDB() {
IGameDatabase* GameDB = AppHost_GetGameDatabase();

31
pcsx2/vtlb.cpp
View File

@ -437,19 +437,29 @@ static __ri void vtlb_BusError(u32 addr,u32 mode)
Console.Error( R5900Exception::TLBMiss( addr, !!mode ).FormatMessage() );
}
#define _tmpl(ret) template<typename OperandType, u32 saddr> ret __fastcall
template<typename OperandType, u32 saddr>
OperandType __fastcall vtlbUnmappedVReadSm(u32 addr) { vtlb_Miss(addr|saddr,0); return 0; }
_tmpl(OperandType) vtlbUnmappedVReadSm(u32 addr) { vtlb_Miss(addr|saddr,0); return 0; }
_tmpl(void) vtlbUnmappedVReadLg(u32 addr,OperandType* data) { vtlb_Miss(addr|saddr,0); }
_tmpl(void) vtlbUnmappedVWriteSm(u32 addr,OperandType data) { vtlb_Miss(addr|saddr,1); }
_tmpl(void) vtlbUnmappedVWriteLg(u32 addr,const OperandType* data) { vtlb_Miss(addr|saddr,1); }
template<typename OperandType, u32 saddr>
void __fastcall vtlbUnmappedVReadLg(u32 addr,OperandType* data) { vtlb_Miss(addr|saddr,0); }
_tmpl(OperandType) vtlbUnmappedPReadSm(u32 addr) { vtlb_BusError(addr|saddr,0); return 0; }
_tmpl(void) vtlbUnmappedPReadLg(u32 addr,OperandType* data) { vtlb_BusError(addr|saddr,0); }
_tmpl(void) vtlbUnmappedPWriteSm(u32 addr,OperandType data) { vtlb_BusError(addr|saddr,1); }
_tmpl(void) vtlbUnmappedPWriteLg(u32 addr,const OperandType* data) { vtlb_BusError(addr|saddr,1); }
template<typename OperandType, u32 saddr>
void __fastcall vtlbUnmappedVWriteSm(u32 addr,OperandType data) { vtlb_Miss(addr|saddr,1); }
#undef _tmpl
template<typename OperandType, u32 saddr>
void __fastcall vtlbUnmappedVWriteLg(u32 addr,const OperandType* data) { vtlb_Miss(addr|saddr,1); }
template<typename OperandType, u32 saddr>
OperandType __fastcall vtlbUnmappedPReadSm(u32 addr) { vtlb_BusError(addr|saddr,0); return 0; }
template<typename OperandType, u32 saddr>
void __fastcall vtlbUnmappedPReadLg(u32 addr,OperandType* data) { vtlb_BusError(addr|saddr,0); }
template<typename OperandType, u32 saddr>
void __fastcall vtlbUnmappedPWriteSm(u32 addr,OperandType data) { vtlb_BusError(addr|saddr,1); }
template<typename OperandType, u32 saddr>
void __fastcall vtlbUnmappedPWriteLg(u32 addr,const OperandType* data) { vtlb_BusError(addr|saddr,1); }
// --------------------------------------------------------------------------------------
// VTLB mapping errors
@ -510,7 +520,6 @@ static void __fastcall vtlbDefaultPhyWrite128(u32 addr,const mem128_t* data)
{
pxFailDev(pxsFmt("(VTLB) Attempted write128 to unmapped physical address @ 0x%08X.", addr));
}
#undef _tmpl
// ===========================================================================================
// VTLB Public API -- Init/Term/RegisterHandler stuff

6
pcsx2/x86/iFPUd.cpp
View File

@ -285,19 +285,19 @@ void SetMaxValue(int regd)
if( info & PROCESS_EE_S ) xMOVSS(xRegisterSSE(sreg), xRegisterSSE(EEREC_S)); \
else xMOVSSZX(xRegisterSSE(sreg), ptr[&fpuRegs.fpr[_Fs_]]); }
#define ALLOC_S(sreg) { sreg = _allocTempXMMreg(XMMT_FPS, -1); GET_S(sreg); }
#define ALLOC_S(sreg) { (sreg) = _allocTempXMMreg(XMMT_FPS, -1); GET_S(sreg); }
#define GET_T(treg) { \
if( info & PROCESS_EE_T ) xMOVSS(xRegisterSSE(treg), xRegisterSSE(EEREC_T)); \
else xMOVSSZX(xRegisterSSE(treg), ptr[&fpuRegs.fpr[_Ft_]]); }
#define ALLOC_T(treg) { treg = _allocTempXMMreg(XMMT_FPS, -1); GET_T(treg); }
#define ALLOC_T(treg) { (treg) = _allocTempXMMreg(XMMT_FPS, -1); GET_T(treg); }
#define GET_ACC(areg) { \
if( info & PROCESS_EE_ACC ) xMOVSS(xRegisterSSE(areg), xRegisterSSE(EEREC_ACC)); \
else xMOVSSZX(xRegisterSSE(areg), ptr[&fpuRegs.ACC]); }
#define ALLOC_ACC(areg) { areg = _allocTempXMMreg(XMMT_FPS, -1); GET_ACC(areg); }
#define ALLOC_ACC(areg) { (areg) = _allocTempXMMreg(XMMT_FPS, -1); GET_ACC(areg); }
#define CLEAR_OU_FLAGS { xAND(ptr32[&fpuRegs.fprc[31]], ~(FPUflagO | FPUflagU)); }

2
pcsx2/x86/iR3000A.cpp
View File

@ -49,7 +49,7 @@ u32 s_psxrecblocks[] = {0};
uptr psxRecLUT[0x10000];
uptr psxhwLUT[0x10000];
#define HWADDR(mem) (psxhwLUT[mem >> 16] + (mem))
static __fi u32 HWADDR(u32 mem) { return psxhwLUT[mem >> 16] + mem; }
static RecompiledCodeReserve* recMem = NULL;

2
pcsx2/x86/ix86-32/iR5900-32.cpp
View File

@ -53,7 +53,7 @@ u32 maxrecmem = 0;
static __aligned16 uptr recLUT[_64kb];
static __aligned16 uptr hwLUT[_64kb];
#define HWADDR(mem) (hwLUT[mem >> 16] + (mem))
static __fi u32 HWADDR(u32 mem) { return hwLUT[mem >> 16] + mem; }
u32 s_nBlockCycles = 0; // cycles of current block recompiling

5
pcsx2/x86/newVif_Dynarec.cpp
View File

@ -68,8 +68,9 @@ VifUnpackSSE_Dynarec::VifUnpackSSE_Dynarec(const nVifStruct& vif_, const nVifBlo
vCL = 0;
}
#define makeMergeMask(x) { \
x = ((x&0x40)>>6) | ((x&0x10)>>3) | (x&4) | ((x&1)<<3); \
__fi void makeMergeMask(u32& x)
{
x = ((x&0x40)>>6) | ((x&0x10)>>3) | (x&4) | ((x&1)<<3);
}
__fi void VifUnpackSSE_Dynarec::SetMasks(int cS) const {

20
plugins/GSdx/GSLocalMemory.cpp
View File

@ -28,20 +28,20 @@
#include "GSLocalMemory.h"
#define ASSERT_BLOCK(r, w, h) \
ASSERT((r).width() >= w && (r).height() >= h && !((r).left & (w - 1)) && !((r).top & (h - 1)) && !((r).right & (w - 1)) && !((r).bottom & (h - 1))); \
ASSERT((r).width() >= (w) && (r).height() >= (h) && !((r).left & ((w) - 1)) && !((r).top & ((h) - 1)) && !((r).right & ((w) - 1)) && !((r).bottom & ((h) - 1))); \
#define FOREACH_BLOCK_START(r, w, h, bpp) \
ASSERT_BLOCK(r, w, h); \
GSVector4i _r = r >> 3; \
uint8* _dst = dst - _r.left * bpp; \
int _offset = dstpitch * h; \
for(int y = _r.top; y < _r.bottom; y += h >> 3, _dst += _offset) \
GSVector4i _r = (r) >> 3; \
uint8* _dst = dst - _r.left * (bpp); \
int _offset = dstpitch * (h); \
for(int y = _r.top; y < _r.bottom; y += (h) >> 3, _dst += _offset) \
{ \
uint32 _base = off->block.row[y]; \
for(int x = _r.left; x < _r.right; x += w >> 3) \
for(int x = _r.left; x < _r.right; x += (w) >> 3) \
{ \
const uint8* src = BlockPtr(_base + off->block.col[x]); \
uint8* read_dst = &_dst[x * bpp]; \
uint8* read_dst = &_dst[x * (bpp)]; \
#define FOREACH_BLOCK_END }}
@ -1037,8 +1037,10 @@ void GSLocalMemory::WriteImage(int& tx, int& ty, const uint8* src, int len, GIFR
}
#define IsTopLeftAligned(dsax, tx, ty, bw, bh) \
((((int)dsax) & ((bw)-1)) == 0 && ((tx) & ((bw)-1)) == 0 && ((int)dsax) == (tx) && ((ty) & ((bh)-1)) == 0)
static bool IsTopLeftAligned(int dsax, int tx, int ty, int bw, int bh)
{
return ((dsax & (bw-1)) == 0 && (tx & (bw-1)) == 0 && dsax == tx && (ty & (bh-1)) == 0);
}
void GSLocalMemory::WriteImage24(int& tx, int& ty, const uint8* src, int len, GIFRegBITBLTBUF& BITBLTBUF, GIFRegTRXPOS& TRXPOS, GIFRegTRXREG& TRXREG)
{

2
plugins/spu2-x/src/ADSR.cpp
View File

@ -38,8 +38,6 @@ void InitADSR() // INIT ADSR
}
}
#define VOL(x) (((s32)x)) //24.8 volume
// Returns the linear slide value for AR and SR inputs.
// (currently not used, it's buggy)
static int GetLinearSrAr( uint SrAr )

5
plugins/spu2-x/src/Spu2replay.cpp
View File

@ -35,7 +35,10 @@ void s2r_write32(u32 data)
fwrite(&data,4,1,s2rfile);
}
#define EMITC(i,a) s2r_write32(((u32)(i&0x7)<<29)|(a&0x1FFFFFFF))
static void EMITC(u32 i, u32 a)
{
s2r_write32(((i&0x7u)<<29u)|(a&0x1FFFFFFFu));
}
int s2r_open(u32 ticks, char *filename)
{

8
plugins/spu2-x/src/spu2sys.cpp
View File

@ -990,8 +990,8 @@ static void __fastcall RegWrite_Core( u16 value )
SetLoWord( thiscore.Regs.reg_out, value ); \
if( result == thiscore.Regs.reg_out ) break; \
\
const uint start_bit = hiword ? 16 : 0; \
const uint end_bit = hiword ? 24 : 16; \
const uint start_bit = (hiword) ? 16 : 0; \
const uint end_bit = (hiword) ? 24 : 16; \
for (uint vc=start_bit, vx=1; vc<end_bit; ++vc, vx<<=1) \
thiscore.VoiceGates[vc].mask_out = (value & vx) ? -1 : 0; \
}
@ -1264,10 +1264,10 @@ static void __fastcall RegWrite_Null( u16 value )
#define CoreParamsPair( core, omem ) \
RegWrite_Core<core, omem>, RegWrite_Core<core, (omem+2)>
RegWrite_Core<core, omem>, RegWrite_Core<core, ((omem)+2)>
#define ReverbPair( core, mem ) \
RegWrite_Reverb<core, mem>, RegWrite_Core<core, (mem+2)>
RegWrite_Reverb<core, mem>, RegWrite_Core<core, ((mem)+2)>
#define REGRAW(addr) RegWrite_Raw<addr>