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microVU: minor changes 

git-svn-id: http://pcsx2.googlecode.com/svn/trunk@1629 96395faa-99c1-11dd-bbfe-3dabce05a288
This commit is contained in:
cottonvibes 2009-08-16 00:49:34 +00:00
parent 233f4348bc
commit 0efb1c534f
8 changed files with 27 additions and 27 deletions
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2
pcsx2/x86/microVU.h
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@ -88,7 +88,7 @@ public:
&& (linkI->block->pState.vi15 == pState->vi15)
&& (linkI->block->pState.flags == pState->flags)
&& (linkI->block->pState.xgkick == pState->xgkick)
&& !(linkI->block->pState.needExactMatch & 0xf0f)) { return linkI->block; }
&& !(linkI->block->pState.needExactMatch & 5)) { return linkI->block; }
linkI = linkI->next;
}
}

6
pcsx2/x86/microVU_Analyze.inl
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@ -297,7 +297,7 @@ microVUt(void) mVUanalyzeSflag(mV, int It) {
mVUsFlagHack = 0; // Don't Optimize Out Status Flags for this block
mVUinfo.swapOps = 1;
flagSet(mVU, 0);
if (mVUcount < 4) { mVUpBlock->pState.needExactMatch |= 0xf; }
if (mVUcount < 4) { mVUpBlock->pState.needExactMatch |= 1; }
}
}
@ -318,7 +318,7 @@ microVUt(void) mVUanalyzeMflag(mV, int Is, int It) {
else { // Need set _doMac for 4 previous Ops (need to do all 4 because stalls could change the result needed)
mVUinfo.swapOps = 1;
flagSet(mVU, 1);
if (mVUcount < 4) { mVUpBlock->pState.needExactMatch |= 0xf << 4; }
if (mVUcount < 4) { mVUpBlock->pState.needExactMatch |= 2; }
}
}
@ -329,7 +329,7 @@ microVUt(void) mVUanalyzeMflag(mV, int Is, int It) {
microVUt(void) mVUanalyzeCflag(mV, int It) {
mVUinfo.swapOps = 1;
mVUlow.readFlags = 1;
if (mVUcount < 4) { mVUpBlock->pState.needExactMatch |= 0xf << 8; }
if (mVUcount < 4) { mVUpBlock->pState.needExactMatch |= 4; }
analyzeVIreg2(It, mVUlow.VI_write, 1);
}

4
pcsx2/x86/microVU_Branch.inl
View File

@ -22,8 +22,8 @@ microVUt(void) mVUincCycles(mV, int x);
microVUr(void*) mVUcompile(microVU* mVU, u32 startPC, uptr pState);
#define blockCreate(addr) { if (!mVUblocks[addr]) mVUblocks[addr] = new microBlockManager(); }
#define sI ((mVUpBlock->pState.needExactMatch & 0x000f) ? 0 : ((mVUpBlock->pState.flags >> 0) & 3))
#define cI ((mVUpBlock->pState.needExactMatch & 0x0f00) ? 0 : ((mVUpBlock->pState.flags >> 2) & 3))
#define sI ((mVUpBlock->pState.needExactMatch & 1) ? 3 : ((mVUpBlock->pState.flags >> 0) & 3))
#define cI ((mVUpBlock->pState.needExactMatch & 4) ? 3 : ((mVUpBlock->pState.flags >> 2) & 3))
microVUt(void) mVUendProgram(mV, microFlagCycles* mFC, int isEbit) {

10
pcsx2/x86/microVU_Flags.inl
View File

@ -100,21 +100,21 @@ microVUt(void) mVUsetFlags(mV, microFlagCycles& mFC) {
mFC.xClip [i] = i;
}
if (!(mVUpBlock->pState.needExactMatch & 0x00f)) {
if (!(mVUpBlock->pState.needExactMatch & 1)) {
xS = (mVUpBlock->pState.flags >> 0) & 3;
mFC.xStatus[0] = -1; mFC.xStatus[1] = -1;
mFC.xStatus[2] = -1; mFC.xStatus[3] = -1;
mFC.xStatus[(xS-1)&3] = 0;
}
if (!(mVUpBlock->pState.needExactMatch & 0xf00)) {
if (!(mVUpBlock->pState.needExactMatch & 4)) {
xC = (mVUpBlock->pState.flags >> 2) & 3;
mFC.xClip[0] = -1; mFC.xClip[1] = -1;
mFC.xClip[2] = -1; mFC.xClip[3] = -1;
mFC.xClip[(xC-1)&3] = 0;
}
if (!(mVUpBlock->pState.needExactMatch & 0x0f0)) {
if (!(mVUpBlock->pState.needExactMatch & 2)) {
mFC.xMac[0] = -1; mFC.xMac[1] = -1;
mFC.xMac[2] = -1; mFC.xMac[3] = -1;
}
@ -248,7 +248,7 @@ void mVUflagPass(mV, u32 startPC, u32 xCount) {
if (mVUbranch) { branch = ((mVUbranch>8)?(5):((mVUbranch<3)?3:4)); aBranchAddr = branchAddr; mVUbranch = 0; }
incPC(1);
}
if (mVUcount < 4) { mVUflagInfo |= 0xfff; }
if (mVUcount < 4) { mVUflagInfo |= 0x7; }
iPC = oldPC;
mVUcount = oldCount;
mVUbranch = oldBranch;
@ -263,7 +263,7 @@ void mVUflagPass(mV, u32 startPC, u32 xCount) {
microVUt(void) mVUsetFlagInfo(mV) {
branchType1 { incPC(-1); mVUflagPass(mVU, branchAddr, 4); incPC(1); }
branchType2 {
if (!mVUlow.constJump.isValid) { mVUflagInfo |= 0xfff; }
if (!mVUlow.constJump.isValid) { mVUflagInfo |= 0x7; }
else { mVUflagPass(mVU, (mVUlow.constJump.regValue*8)&(mVU->microMemSize-8), 4); }
}
branchType3 {

4
pcsx2/x86/microVU_IR.h
View File

@ -34,8 +34,8 @@ union regInfo {
#endif
__declspec(align(16)) struct microRegInfo { // Ordered for Faster Compares
u32 needExactMatch; // If set, block needs an exact match of pipeline state
u32 vi15; // Constant Prop Info for vi15 (only valid if sign-bit set)
u8 needExactMatch; // If set, block needs an exact match of pipeline state
u8 q;
u8 p;
u8 r;
@ -43,7 +43,7 @@ __declspec(align(16)) struct microRegInfo { // Ordered for Faster Compares
u8 VI[16];
regInfo VF[32];
u8 flags; // clip x2 :: status x2
u8 padding[3]; // 160 bytes
u8 padding[6]; // 160 bytes
#if defined(_MSC_VER)
};
#else

20
pcsx2/x86/microVU_Lower.inl
View File

@ -458,7 +458,7 @@ mVUop(mVU_FCAND) {
mVUallocVIb(mVU, gprT1, 1);
}
pass3 { mVUlog("FCAND vi01, $%x", _Imm24_); }
pass4 { mVUflagInfo |= 0xf << 8; }
pass4 { mVUflagInfo |= 4; }
}
mVUop(mVU_FCEQ) {
@ -471,7 +471,7 @@ mVUop(mVU_FCEQ) {
mVUallocVIb(mVU, gprT1, 1);
}
pass3 { mVUlog("FCEQ vi01, $%x", _Imm24_); }
pass4 { mVUflagInfo |= 0xf << 8; }
pass4 { mVUflagInfo |= 4; }
}
mVUop(mVU_FCGET) {
@ -482,7 +482,7 @@ mVUop(mVU_FCGET) {
mVUallocVIb(mVU, gprT1, _It_);
}
pass3 { mVUlog("FCGET vi%02d", _Ft_); }
pass4 { mVUflagInfo |= 0xf << 8; }
pass4 { mVUflagInfo |= 4; }
}
mVUop(mVU_FCOR) {
@ -495,7 +495,7 @@ mVUop(mVU_FCOR) {
mVUallocVIb(mVU, gprT1, 1);
}
pass3 { mVUlog("FCOR vi01, $%x", _Imm24_); }
pass4 { mVUflagInfo |= 0xf << 8; }
pass4 { mVUflagInfo |= 4; }
}
mVUop(mVU_FCSET) {
@ -520,7 +520,7 @@ mVUop(mVU_FMAND) {
mVUallocVIb(mVU, gprT1, _It_);
}
pass3 { mVUlog("FMAND vi%02d, vi%02d", _Ft_, _Fs_); }
pass4 { mVUflagInfo |= 0xf << 4; }
pass4 { mVUflagInfo |= 2; }
}
mVUop(mVU_FMEQ) {
@ -534,7 +534,7 @@ mVUop(mVU_FMEQ) {
mVUallocVIb(mVU, gprT1, _It_);
}
pass3 { mVUlog("FMEQ vi%02d, vi%02d", _Ft_, _Fs_); }
pass4 { mVUflagInfo |= 0xf << 4; }
pass4 { mVUflagInfo |= 2; }
}
mVUop(mVU_FMOR) {
@ -546,7 +546,7 @@ mVUop(mVU_FMOR) {
mVUallocVIb(mVU, gprT1, _It_);
}
pass3 { mVUlog("FMOR vi%02d, vi%02d", _Ft_, _Fs_); }
pass4 { mVUflagInfo |= 0xf << 4; }
pass4 { mVUflagInfo |= 2; }
}
//------------------------------------------------------------------
@ -561,7 +561,7 @@ mVUop(mVU_FSAND) {
mVUallocVIb(mVU, gprT1, _It_);
}
pass3 { mVUlog("FSAND vi%02d, $%x", _Ft_, _Imm12_); }
pass4 { mVUflagInfo |= 0xf; }
pass4 { mVUflagInfo |= 1; }
}
mVUop(mVU_FSOR) {
@ -572,7 +572,7 @@ mVUop(mVU_FSOR) {
mVUallocVIb(mVU, gprT1, _It_);
}
pass3 { mVUlog("FSOR vi%02d, $%x", _Ft_, _Imm12_); }
pass4 { mVUflagInfo |= 0xf; }
pass4 { mVUflagInfo |= 1; }
}
mVUop(mVU_FSEQ) {
@ -604,7 +604,7 @@ mVUop(mVU_FSEQ) {
mVUallocVIb(mVU, gprT1, _It_);
}
pass3 { mVUlog("FSEQ vi%02d, $%x", _Ft_, _Imm12_); }
pass4 { mVUflagInfo |= 0xf; }
pass4 { mVUflagInfo |= 1; }
}
mVUop(mVU_FSSET) {

6
pcsx2/x86/microVU_Misc.h
View File

@ -222,9 +222,9 @@ typedef u32 (__fastcall *mVUCall)(void*, void*);
#define shuffleSS(x) ((x==1)?(0x27):((x==2)?(0xc6):((x==4)?(0xe1):(0xe4))))
// Flag Info
#define __Status (mVUflagInfo & (0xf<<0))
#define __Mac (mVUflagInfo & (0xf<<4))
#define __Clip (mVUflagInfo & (0xf<<8))
#define __Status (mVUflagInfo & 1)
#define __Mac (mVUflagInfo & 2)
#define __Clip (mVUflagInfo & 4)
// Pass 3 Helper Macros
#define _Fsf_String ((_Fsf_ == 3) ? "w" : ((_Fsf_ == 2) ? "z" : ((_Fsf_ == 1) ? "y" : "x")))