mirror of https://github.com/PCSX2/pcsx2.git
Reverted most changes from r326, the excessive code will get used later. Also removed some dead code that's been in the eerec for ages.
git-svn-id: http://pcsx2-playground.googlecode.com/svn/trunk@329 a6443dda-0b58-4228-96e9-037be469359c
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@ -78,9 +78,7 @@ static __forceinline void cpuRcntSet() {
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// This must be done regardless of if the hblank/vblank counters updated since
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// cpuRegs.cycle changes, even if sCycle hasn't!
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//fixme : HBLANK_TIME_ and HRENDER_TIME_ are both SCANLINE_NTSC (or _PAL) / 2.. was that intended? (rama)
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//u32 counter4CycleT = ( counters[4].mode == MODE_HBLANK ) ? HBLANK_TIME_ : HRENDER_TIME_;
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u32 counter4CycleT = HBLANK_TIME_;
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u32 counter4CycleT = ( counters[4].mode == MODE_HBLANK ) ? HBLANK_TIME_ : HRENDER_TIME_;
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u32 counter5CycleT = VSYNC_HALF_ - (cpuRegs.cycle - counters[5].sCycle);
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counter4CycleT -= (cpuRegs.cycle - counters[4].sCycle);
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@ -36,8 +36,6 @@ typedef struct {
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// NTSC Timing Information!!! (some scanline info is guessed)
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//------------------------------------------------------------------
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#define SCANLINE_NTSC (u32)(PS2CLK / 15734.25)//18743 //when using 59.94005994 it rounds to 15734.27 :p (rama)
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// fixme : Both, HRENDER_TIME_NTSC and HBLANK_TIME_NTSC the same?
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// also see cpuRcntSet() and possibly hScanline() for this issue (rama)
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#define HRENDER_TIME_NTSC (u32)(SCANLINE_NTSC / 2)//15528 //time from hblank end to hblank start (PS2CLK / 18991.368423051722991900181367568)
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#define HBLANK_TIME_NTSC (u32)(SCANLINE_NTSC / 2)//3215 //time from hblank start to hblank end (PS2CLK / 91738.91105912572817760653181028)
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#define VSYNC_NTSC (u32)(PS2CLK / 59.94) //hz //59.94005994 is more precise
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@ -55,8 +53,6 @@ typedef struct {
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// PAL Timing Information!!! (some scanline info is guessed)
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//------------------------------------------------------------------
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#define SCANLINE_PAL (u32)(PS2CLK / 15625)//18874
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// fixme : Both, HRENDER_TIME_PAL and HBLANK_TIME_PAL the same?
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// also see cpuRcntSet() and possibly hScanline() for this issue (rama)
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#define HRENDER_TIME_PAL (u32)(SCANLINE_PAL / 2)//15335 //time from hblank end to hblank start
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#define HBLANK_TIME_PAL (u32)(SCANLINE_PAL / 2)//3539 //time from hblank start to hblank end
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#define VSYNC_PAL (u32)(PS2CLK / 50) //hz
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@ -81,8 +81,7 @@ u32 g_EEFreezeRegs = 0; // if set, should freeze the regs
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static BASEBLOCK* s_pCurBlock = NULL;
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static BASEBLOCKEX* s_pCurBlockEx = NULL;
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static BASEBLOCK* s_pDispatchBlock = NULL;
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static u32 s_nEndBlock = 0; // what pc the current block ends
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static u32 s_nHasDelay = 0;
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static u32 s_nEndBlock = 0; // what pc the current block ends
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static u32 s_nNextBlock = 0; // next free block in recBlocks
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@ -2914,7 +2913,6 @@ void recRecompile( u32 startpc )
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// go until the next branch
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i = startpc;
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s_nEndBlock = 0xffffffff;
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s_nHasDelay = 0;
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while(1) {
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BASEBLOCK* pblock = PC_GETBLOCK(i);
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@ -2935,7 +2933,6 @@ void recRecompile( u32 startpc )
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if( _Funct_ == 8 || _Funct_ == 9 ) { // JR, JALR
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s_nEndBlock = i + 8;
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s_nHasDelay = 1;
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goto StartRecomp;
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}
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@ -2944,8 +2941,6 @@ void recRecompile( u32 startpc )
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if( _Rt_ < 4 || (_Rt_ >= 16 && _Rt_ < 20) ) {
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// branches
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if( _Rt_ == 2 || _Rt_ == 3 || _Rt_ == 18 || _Rt_ == 19 ) s_nHasDelay = 1;
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else s_nHasDelay = 2;
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branchTo = _Imm_ * 4 + i + 4;
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if( branchTo > startpc && branchTo < i ) s_nEndBlock = branchTo;
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@ -2958,7 +2953,6 @@ void recRecompile( u32 startpc )
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case 2: // J
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case 3: // JAL
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s_nHasDelay = 1;
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s_nEndBlock = i + 8;
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goto StartRecomp;
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@ -2966,9 +2960,6 @@ void recRecompile( u32 startpc )
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case 4: case 5: case 6: case 7:
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case 20: case 21: case 22: case 23:
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if( (cpuRegs.code >> 26) >= 20 ) s_nHasDelay = 1;
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else s_nHasDelay = 2;
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branchTo = _Imm_ * 4 + i + 4;
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if( branchTo > startpc && branchTo < i ) s_nEndBlock = branchTo;
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else s_nEndBlock = i+8;
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@ -2989,8 +2980,6 @@ void recRecompile( u32 startpc )
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if( _Rs_ == 8 ) {
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// BC1F, BC1T, BC1FL, BC1TL
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// BC2F, BC2T, BC2FL, BC2TL
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if( _Rt_ >= 2 ) s_nHasDelay = 1;
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else s_nHasDelay = 2;
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branchTo = _Imm_ * 4 + i + 4;
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if( branchTo > startpc && branchTo < i ) s_nEndBlock = branchTo;
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