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Uninitialized variable fix in ScopedLock as found by Gregory, and a few more minor -> to . conversions. 

git-svn-id: http://pcsx2.googlecode.com/svn/trunk@3708 96395faa-99c1-11dd-bbfe-3dabce05a288
This commit is contained in:
Jake.Stine 2010-08-31 16:40:25 +00:00
parent 1edb900405
commit 0bb377511b
3 changed files with 17 additions and 15 deletions
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4
common/src/Utilities/Mutex.cpp
View File

@ -253,11 +253,13 @@ Threading::ScopedLock::~ScopedLock() throw()
Threading::ScopedLock::ScopedLock( const Mutex* locker ) Threading::ScopedLock::ScopedLock( const Mutex* locker )
{ {
m_IsLocked = false;
AssignAndLock( locker ); AssignAndLock( locker );
} }
Threading::ScopedLock::ScopedLock( const Mutex& locker ) Threading::ScopedLock::ScopedLock( const Mutex& locker )
{ {
m_IsLocked = false;
AssignAndLock( locker ); AssignAndLock( locker );
} }
@ -268,6 +270,8 @@ void Threading::ScopedLock::AssignAndLock( const Mutex& locker )
void Threading::ScopedLock::AssignAndLock( const Mutex* locker ) void Threading::ScopedLock::AssignAndLock( const Mutex* locker )
{ {
pxAssume(!m_IsLocked); // if we're already locked, changing the lock is bad mojo.
m_lock = const_cast<Mutex*>(locker); m_lock = const_cast<Mutex*>(locker);
if( !m_lock ) return; if( !m_lock ) return;

2
pcsx2/Memory.h
View File

@ -111,8 +111,6 @@ static __fi void ZeroQWC( u128& dest )
#define psSu64(mem) (*(u64 *)&eeMem->Scratch[(mem) & 0x3fff]) #define psSu64(mem) (*(u64 *)&eeMem->Scratch[(mem) & 0x3fff])
#define psSu128(mem) (*(u128*)&eeMem->Scratch[(mem) & 0x3fff]) #define psSu128(mem) (*(u128*)&eeMem->Scratch[(mem) & 0x3fff])
#define psH_DMACh(mem) (*(DMACh*)&eeHw[(mem) & 0xffff])
extern void memAlloc(); extern void memAlloc();
extern void memReset(); // clears PS2 ram and loads the bios. Throws Exception::FileNotFound on error. extern void memReset(); // clears PS2 ram and loads the bios. Throws Exception::FileNotFound on error.
extern void memShutdown(); extern void memShutdown();

26
pcsx2/ps2/LegacyDmac.cpp
View File

@ -25,9 +25,9 @@
static bool QuickDmaExec( void (*func)(), u32 mem) static bool QuickDmaExec( void (*func)(), u32 mem)
{ {
bool ret = false; bool ret = false;
DMACh *reg = &psH_DMACh(mem); DMACh& reg = (DMACh&)psHu32(mem);
if (reg->chcr.STR && dmacRegs.ctrl.DMAE && !psHu8(DMAC_ENABLER+2)) if (reg.chcr.STR && dmacRegs.ctrl.DMAE && !psHu8(DMAC_ENABLER+2))
{ {
func(); func();
ret = true; ret = true;
@ -56,11 +56,11 @@ static void StartQueuedDMA()
static __ri void DmaExec( void (*func)(), u32 mem, u32 value ) static __ri void DmaExec( void (*func)(), u32 mem, u32 value )
{ {
DMACh *reg = &psH_DMACh(mem); DMACh& reg = (DMACh&)psHu32(mem);
tDMA_CHCR chcr(value); tDMA_CHCR chcr(value);
//It's invalid for the hardware to write a DMA while it is active, not without Suspending the DMAC //It's invalid for the hardware to write a DMA while it is active, not without Suspending the DMAC
if (reg->chcr.STR) if (reg.chcr.STR)
{ {
const uint channel = ChannelNumber(mem); const uint channel = ChannelNumber(mem);
@ -86,10 +86,10 @@ static __ri void DmaExec( void (*func)(), u32 mem, u32 value )
} }
//Sanity Check for possible future bug fix0rs ;p //Sanity Check for possible future bug fix0rs ;p
//Spams on Persona 4 opening. //Spams on Persona 4 opening.
//if(reg->chcr.TAG != chcr.TAG) DevCon.Warning(L"32bit CHCR Tag on %s changed to %x from %x QWC = %x Channel Active", ChcrName(mem), chcr.TAG, reg->chcr.TAG, reg->qwc); //if(reg.chcr.TAG != chcr.TAG) DevCon.Warning(L"32bit CHCR Tag on %s changed to %x from %x QWC = %x Channel Active", ChcrName(mem), chcr.TAG, reg.chcr.TAG, reg.qwc);
//Here we update the LOWER CHCR, if a chain is stopped half way through, it can be manipulated in to a different mode //Here we update the LOWER CHCR, if a chain is stopped half way through, it can be manipulated in to a different mode
//But we need to preserve the existing tag for now //But we need to preserve the existing tag for now
reg->chcr.set((reg->chcr.TAG << 16) | chcr.lower()); reg.chcr.set((reg.chcr.TAG << 16) | chcr.lower());
return; return;
} }
else //Else the DMA is running (Not Suspended), so we cant touch it! else //Else the DMA is running (Not Suspended), so we cant touch it!
@ -100,8 +100,8 @@ static __ri void DmaExec( void (*func)(), u32 mem, u32 value )
if(chcr.STR == 0) if(chcr.STR == 0)
{ {
//DevCon.Warning(L"32bit Force Stopping %s (Current CHCR %x) while DMA active", ChcrName(mem), reg->chcr._u32, chcr._u32); //DevCon.Warning(L"32bit Force Stopping %s (Current CHCR %x) while DMA active", ChcrName(mem), reg.chcr._u32, chcr._u32);
reg->chcr.STR = 0; reg.chcr.STR = 0;
//We need to clear any existing DMA loops that are in progress else they will continue! //We need to clear any existing DMA loops that are in progress else they will continue!
if(channel == 1) if(channel == 1)
@ -118,21 +118,21 @@ static __ri void DmaExec( void (*func)(), u32 mem, u32 value )
cpuClearInt( channel ); cpuClearInt( channel );
QueuedDMA._u16 &= ~(1 << channel); //Clear any queued DMA requests for this channel QueuedDMA._u16 &= ~(1 << channel); //Clear any queued DMA requests for this channel
} }
//else DevCon.Warning(L"32bit Attempted to change %s CHCR (Currently %x) with %x while DMA active, ignoring QWC = %x", ChcrName(mem), reg->chcr._u32, chcr._u32, reg->qwc); //else DevCon.Warning(L"32bit Attempted to change %s CHCR (Currently %x) with %x while DMA active, ignoring QWC = %x", ChcrName(mem), reg.chcr._u32, chcr._u32, reg.qwc);
return; return;
} }
} }
//if(reg->chcr.TAG != chcr.TAG && chcr.MOD == CHAIN_MODE) DevCon.Warning(L"32bit CHCR Tag on %s changed to %x from %x QWC = %x Channel Not Active", ChcrName(mem), chcr.TAG, reg->chcr.TAG, reg->qwc); //if(reg.chcr.TAG != chcr.TAG && chcr.MOD == CHAIN_MODE) DevCon.Warning(L"32bit CHCR Tag on %s changed to %x from %x QWC = %x Channel Not Active", ChcrName(mem), chcr.TAG, reg.chcr.TAG, reg.qwc);
reg->chcr.set(value); reg.chcr.set(value);
if (reg->chcr.STR && dmacRegs.ctrl.DMAE && !psHu8(DMAC_ENABLER+2)) if (reg.chcr.STR && dmacRegs.ctrl.DMAE && !psHu8(DMAC_ENABLER+2))
{ {
func(); func();
} }
else if(reg->chcr.STR) else if(reg.chcr.STR)
{ {
//DevCon.Warning(L"32bit %s DMA Start while DMAC Disabled\n", ChcrName(mem)); //DevCon.Warning(L"32bit %s DMA Start while DMAC Disabled\n", ChcrName(mem));
QueuedDMA._u16 |= (1 << ChannelNumber(mem)); //Queue the DMA up to be started then the DMA's are Enabled and or the Suspend is lifted QueuedDMA._u16 |= (1 << ChannelNumber(mem)); //Queue the DMA up to be started then the DMA's are Enabled and or the Suspend is lifted