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microVU: Missed a couple things from my prev commit, and removed some legacy forceinline stuff (we no longer depend on const-prop to select between VU0 and VU1). 

git-svn-id: http://pcsx2.googlecode.com/svn/trunk@3409 96395faa-99c1-11dd-bbfe-3dabce05a288
This commit is contained in:
Jake.Stine 2010-07-07 07:15:45 +00:00
parent 641c3b56cf
commit 096ec601ad
7 changed files with 61 additions and 62 deletions
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46
pcsx2/x86/microVU_Alloc.inl
View File

@ -23,17 +23,11 @@
// Flag Allocators
//------------------------------------------------------------------
_f static x32 getFlagReg(int fInst)
_f static const x32& getFlagReg(uint fInst)
{
if (fInst >= 0 && fInst < 4)
{
return gprF[fInst];
}
else
{
Console.Error("microVU Error: fInst = %d", fInst);
return gprF[0];
}
static const x32* const gprF_crap[4] = { &gprF0, &gprF1, &gprF2, &gprF3 };
pxAssume(fInst < 4);
return *gprF_crap[fInst];
}
_f void setBitSFLAG(const x32& reg, const x32& regT, int bitTest, int bitSet)
@ -79,31 +73,31 @@ _f void mVUallocSFLAGc(const x32& reg, const x32& regT, int fInstance)
// Denormalizes Status Flag
_f void mVUallocSFLAGd(u32* memAddr, bool setAllflags) {
// Cannot use EBP (gprF[1]) here; as this function is used by mVU0 macro and
// Cannot use EBP (gprF1) here; as this function is used by mVU0 macro and
// the EErec needs EBP preserved.
xMOV(gprF[0], ptr32[memAddr]);
xMOV(gprF[3], gprF[0]);
xSHR(gprF[3], 3);
xAND(gprF[3], 0x18);
xMOV(gprF0, ptr32[memAddr]);
xMOV(gprF3, gprF0);
xSHR(gprF3, 3);
xAND(gprF3, 0x18);
xMOV(gprF[2], gprF[0]);
xSHL(gprF[2], 11);
xAND(gprF[2], 0x1800);
xOR (gprF[3], gprF[2]);
xMOV(gprF2, gprF0);
xSHL(gprF2, 11);
xAND(gprF2, 0x1800);
xOR (gprF3, gprF2);
xSHL(gprF[0], 14);
xAND(gprF[0], 0x3cf0000);
xOR (gprF[3], gprF[0]);
xSHL(gprF0, 14);
xAND(gprF0, 0x3cf0000);
xOR (gprF3, gprF0);
if (setAllflags) {
// this code should be run in mVU micro mode only, so writing to
// EBP (gprF[1]) is ok (and needed for vuMicro optimizations).
// EBP (gprF1) is ok (and needed for vuMicro optimizations).
xMOV(gprF[0], gprF[3]);
xMOV(gprF[1], gprF[3]);
xMOV(gprF[2], gprF[3]);
xMOV(gprF0, gprF3);
xMOV(gprF1, gprF3);
xMOV(gprF2, gprF3);
}
}

10
pcsx2/x86/microVU_Branch.inl
View File

@ -15,9 +15,9 @@
#pragma once
_f bool doEarlyExit (microVU* mVU);
_f void mVUincCycles(microVU* mVU, int x);
_r void* mVUcompile (microVU* mVU, u32 startPC, uptr pState);
extern bool doEarlyExit (microVU* mVU);
extern void mVUincCycles(microVU* mVU, int x);
extern void* mVUcompile (microVU* mVU, u32 startPC, uptr pState);
#define blockCreate(addr) { if (!mVUblocks[addr]) mVUblocks[addr] = new microBlockManager(); }
#define sI ((mVUpBlock->pState.needExactMatch & 1) ? 3 : ((mVUpBlock->pState.flags >> 0) & 3))
@ -26,7 +26,7 @@ _r void* mVUcompile (microVU* mVU, u32 startPC, uptr pState);
void mVU0clearlpStateJIT() { if (!microVU0.prog.cleared) memzero(microVU0.prog.lpState); }
void mVU1clearlpStateJIT() { if (!microVU1.prog.cleared) memzero(microVU1.prog.lpState); }
_f void mVUendProgram(mV, microFlagCycles* mFC, int isEbit) {
void mVUendProgram(mV, microFlagCycles* mFC, int isEbit) {
int fStatus = (isEbit) ? findFlagInst(mFC->xStatus, 0x7fffffff) : sI;
int fMac = (isEbit) ? findFlagInst(mFC->xMac, 0x7fffffff) : 0;
@ -86,7 +86,7 @@ _f void mVUendProgram(mV, microFlagCycles* mFC, int isEbit) {
}
// Recompiles Code for Proper Flags and Q/P regs on Block Linkings
_f void mVUsetupBranch(mV, microFlagCycles& mFC) {
void mVUsetupBranch(mV, microFlagCycles& mFC) {
mVU->regAlloc->flushAll(); // Flush Allocated Regs
mVUsetupFlags(mVU, mFC); // Shuffle Flag Instances

4
pcsx2/x86/microVU_Compile.inl
View File

@ -232,7 +232,7 @@ _f void mVUoptimizePipeState(mV) {
mVUregs.r = 0; // There are no stalls on the R-reg, so its Safe to discard info
}
void mVUincCycles(mV, int x) {
_f void mVUincCycles(mV, int x) {
mVUcycles += x;
for (int z = 31; z > 0; z--) {
calcCycles(mVUregs.VF[z].x, x);
@ -390,7 +390,7 @@ _f void mVUinitFirstPass(microVU* mVU, uptr pState, u8* thisPtr) {
// Recompiler
//------------------------------------------------------------------
_r void* mVUcompile(microVU* mVU, u32 startPC, uptr pState) {
void* mVUcompile(microVU* mVU, u32 startPC, uptr pState) {
microFlagCycles mFC;
u8* thisPtr = x86Ptr;

8
pcsx2/x86/microVU_Execute.inl
View File

@ -43,10 +43,10 @@ void mVUdispatcherA(mV) {
// Load Regs
#if 1 // CHECK_MACROVU0 - Always on now
xMOV(gprF[0], ptr32[&mVU->regs->VI[REG_STATUS_FLAG].UL]);
xMOV(gprF[1], gprF[0]);
xMOV(gprF[2], gprF[0]);
xMOV(gprF[3], gprF[0]);
xMOV(gprF0, ptr32[&mVU->regs->VI[REG_STATUS_FLAG].UL]);
xMOV(gprF1, gprF0);
xMOV(gprF2, gprF0);
xMOV(gprF3, gprF0);
#else
mVUallocSFLAGd((uptr)&mVU->regs->VI[REG_STATUS_FLAG].UL, 1);
#endif

32
pcsx2/x86/microVU_Flags.inl
View File

@ -172,35 +172,35 @@ _f void mVUsetupFlags(mV, microFlagCycles& mFC) {
// DevCon::Status("sortRegs = %d", params sortRegs);
// Note: Emitter will optimize out mov(reg1, reg1) cases...
if (sortRegs == 1) {
xMOV(gprF[0], getFlagReg(bStatus[0]));
xMOV(gprF[1], getFlagReg(bStatus[1]));
xMOV(gprF[2], getFlagReg(bStatus[2]));
xMOV(gprF[3], getFlagReg(bStatus[3]));
xMOV(gprF0, getFlagReg(bStatus[0]));
xMOV(gprF1, getFlagReg(bStatus[1]));
xMOV(gprF2, getFlagReg(bStatus[2]));
xMOV(gprF3, getFlagReg(bStatus[3]));
}
else if (sortRegs == 2) {
xMOV(gprT1, getFlagReg (bStatus[3]));
xMOV(gprF[0], getFlagReg (bStatus[0]));
xMOV(gprF[1], getFlagReg2(bStatus[1]));
xMOV(gprF[2], getFlagReg2(bStatus[2]));
xMOV(gprF[3], gprT1);
xMOV(gprF0, getFlagReg (bStatus[0]));
xMOV(gprF1, getFlagReg2(bStatus[1]));
xMOV(gprF2, getFlagReg2(bStatus[2]));
xMOV(gprF3, gprT1);
}
else if (sortRegs == 3) {
int gFlag = (bStatus[0] == bStatus[1]) ? bStatus[2] : bStatus[1];
xMOV(gprT1, getFlagReg (gFlag));
xMOV(gprT2, getFlagReg (bStatus[3]));
xMOV(gprF[0], getFlagReg (bStatus[0]));
xMOV(gprF[1], getFlagReg3(bStatus[1]));
xMOV(gprF[2], getFlagReg4(bStatus[2]));
xMOV(gprF[3], gprT2);
xMOV(gprF0, getFlagReg (bStatus[0]));
xMOV(gprF1, getFlagReg3(bStatus[1]));
xMOV(gprF2, getFlagReg4(bStatus[2]));
xMOV(gprF3, gprT2);
}
else {
xMOV(gprT1, getFlagReg(bStatus[0]));
xMOV(gprT2, getFlagReg(bStatus[1]));
xMOV(gprT3, getFlagReg(bStatus[2]));
xMOV(gprF[3], getFlagReg(bStatus[3]));
xMOV(gprF[0], gprT1);
xMOV(gprF[1], gprT2);
xMOV(gprF[2], gprT3);
xMOV(gprF3, getFlagReg(bStatus[3]));
xMOV(gprF0, gprT1);
xMOV(gprF1, gprT2);
xMOV(gprF2, gprT3);
}
}

10
pcsx2/x86/microVU_Macro.inl
View File

@ -51,7 +51,7 @@ void setupMacroOp(int mode, const char* opName) {
microVU0.prog.IRinfo.info[0].sFlag.lastWrite = 0;
microVU0.prog.IRinfo.info[0].mFlag.doFlag = 1;
microVU0.prog.IRinfo.info[0].mFlag.write = 0xff;
xMOV(gprF[0], ptr32[&microVU0.regs->VI[REG_STATUS_FLAG].UL]);
xMOV(gprF0, ptr32[&microVU0.regs->VI[REG_STATUS_FLAG].UL]);
}
}
@ -60,7 +60,7 @@ void endMacroOp(int mode) {
xMOVSS(ptr32[&microVU0.regs->VI[REG_Q].UL], xmmPQ);
}
if (mode & 0x10) { // Status/Mac Flags were Updated
xMOV(ptr32[&microVU0.regs->VI[REG_STATUS_FLAG].UL], gprF[0]);
xMOV(ptr32[&microVU0.regs->VI[REG_STATUS_FLAG].UL], gprF0);
}
microVU0.regAlloc->flushAll();
microVU0.cop2 = 0;
@ -269,8 +269,8 @@ static void recCFC2() {
iFlushCall(FLUSH_EVERYTHING);
if (_Rd_ == REG_STATUS_FLAG) { // Normalize Status Flag
xMOV(gprF[0], ptr32[&microVU0.regs->VI[REG_STATUS_FLAG].UL]);
mVUallocSFLAGc(eax, gprF[0], 0);
xMOV(gprF0, ptr32[&microVU0.regs->VI[REG_STATUS_FLAG].UL]);
mVUallocSFLAGc(eax, gprF0, 0);
}
else xMOV(eax, ptr32[&microVU0.regs->VI[_Rd_].UL]);
@ -305,7 +305,7 @@ static void recCTC2() {
case REG_STATUS_FLAG:
if (_Rt_) { // Denormalizes flag into gprF1
mVUallocSFLAGd(&cpuRegs.GPR.r[_Rt_].UL[0], 0);
xMOV(ptr32[&microVU0.regs->VI[_Rd_].UL], gprF[1]);
xMOV(ptr32[&microVU0.regs->VI[_Rd_].UL], gprF1);
}
else xMOV(ptr32[&microVU0.regs->VI[_Rd_].UL], 0);
break;

7
pcsx2/x86/microVU_Misc.h
View File

@ -106,7 +106,12 @@ typedef xRegister32 x32;
#define gprT2 ecx // ecx - Temp Reg
#define gprT3 edx // edx - Temp Reg
const x32 gprF[4] = {x32(3), x32(5), x32(6), x32(7)}; // ebx, ebp, esi, edi - Status Flags
//const x32 gprF[4] = {x32(3), x32(5), x32(6), x32(7)}; // ebx, ebp, esi, edi - Status Flags
#define gprF0 ebx
#define gprF1 ebp
#define gprF2 esi
#define gprF3 edi
// Function Params
#define mP microVU* mVU, int recPass