microVU: Added some const qualifiers to the instruction/opcode function LUTs

git-svn-id: http://pcsx2.googlecode.com/svn/trunk@3548 96395faa-99c1-11dd-bbfe-3dabce05a288
This commit is contained in:
Jake.Stine 2010-07-22 05:05:18 +00:00
parent 9c22dc4f73
commit 095e46246d
4 changed files with 23 additions and 17 deletions

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@ -223,6 +223,7 @@ extern VIFregisters *vifRegs;
#define vifXRegs (idx ? (vif1Regs) : (vif0Regs)) #define vifXRegs (idx ? (vif1Regs) : (vif0Regs))
#define vifXCode (idx ? (vif1Code) : (vif0Code)) #define vifXCode (idx ? (vif1Code) : (vif0Code))
#define _f __forceinline #define _f __forceinline
#define _ri __releaseinline
extern void dmaVIF0(); extern void dmaVIF0();
extern void dmaVIF1(); extern void dmaVIF1();

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@ -60,8 +60,8 @@ struct GIFTAG
{ {
u32 NLOOP : 15; u32 NLOOP : 15;
u32 EOP : 1; u32 EOP : 1;
u32 dummy0 : 16; u32 _dummy0 : 16;
u32 dummy1 : 14; u32 _dummy1 : 14;
u32 PRE : 1; u32 PRE : 1;
u32 PRIM : 11; u32 PRIM : 11;
u32 FLG : 2; u32 FLG : 2;

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@ -17,6 +17,11 @@
using namespace x86Emitter; using namespace x86Emitter;
typedef xRegisterSSE xmm;
typedef xRegister32 x32;
struct microVU;
//------------------------------------------------------------------ //------------------------------------------------------------------
// Global Variables // Global Variables
//------------------------------------------------------------------ //------------------------------------------------------------------
@ -34,9 +39,6 @@ struct mVU_Globals {
extern const __aligned(32) mVU_Globals mVUglob; extern const __aligned(32) mVU_Globals mVUglob;
typedef xRegisterSSE xmm;
typedef xRegister32 x32;
//------------------------------------------------------------------ //------------------------------------------------------------------
// Helper Macros // Helper Macros
//------------------------------------------------------------------ //------------------------------------------------------------------
@ -120,6 +122,9 @@ typedef xRegister32 x32;
#define mF int recPass #define mF int recPass
#define mX mVU, recPass #define mX mVU, recPass
typedef void __fastcall Fntype_mVUrecInst( microVU* mVU, int recPass );
typedef Fntype_mVUrecInst* Fnptr_mVUrecInst;
// Recursive Inline // Recursive Inline
#ifndef __LINUX__ #ifndef __LINUX__
#define __recInline __releaseinline #define __recInline __releaseinline
@ -129,7 +134,7 @@ typedef xRegister32 x32;
// Function/Template Stuff // Function/Template Stuff
#define mVUx (vuIndex ? &microVU1 : &microVU0) #define mVUx (vuIndex ? &microVU1 : &microVU0)
#define mVUop(opName) static void opName (mP) #define mVUop(opName) static void __fastcall opName (mP)
#define _mVUt template<int vuIndex> #define _mVUt template<int vuIndex>
#define _r static __recInline #define _r static __recInline

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@ -33,7 +33,7 @@ mVUop(mVUunknown);
//------------------------------------------------------------------ //------------------------------------------------------------------
// Opcode Tables // Opcode Tables
//------------------------------------------------------------------ //------------------------------------------------------------------
void (*mVULOWER_OPCODE [128])(mP) = { static const Fnptr_mVUrecInst mVULOWER_OPCODE[128] = {
mVU_LQ , mVU_SQ , mVUunknown , mVUunknown, mVU_LQ , mVU_SQ , mVUunknown , mVUunknown,
mVU_ILW , mVU_ISW , mVUunknown , mVUunknown, mVU_ILW , mVU_ISW , mVUunknown , mVUunknown,
mVU_IADDIU , mVU_ISUBIU , mVUunknown , mVUunknown, mVU_IADDIU , mVU_ISUBIU , mVUunknown , mVUunknown,
@ -68,7 +68,7 @@ void (*mVULOWER_OPCODE [128])(mP) = {
mVUunknown , mVUunknown , mVUunknown , mVUunknown, mVUunknown , mVUunknown , mVUunknown , mVUunknown,
}; };
void (*mVULowerOP_T3_00_OPCODE [32])(mP) = { static const Fnptr_mVUrecInst mVULowerOP_T3_00_OPCODE[32] = {
mVUunknown , mVUunknown , mVUunknown , mVUunknown, mVUunknown , mVUunknown , mVUunknown , mVUunknown,
mVUunknown , mVUunknown , mVUunknown , mVUunknown, mVUunknown , mVUunknown , mVUunknown , mVUunknown,
mVUunknown , mVUunknown , mVUunknown , mVUunknown, mVUunknown , mVUunknown , mVUunknown , mVUunknown,
@ -79,7 +79,7 @@ void (*mVULowerOP_T3_00_OPCODE [32])(mP) = {
mVU_ESADD , mVU_EATANxy , mVU_ESQRT , mVU_ESIN, mVU_ESADD , mVU_EATANxy , mVU_ESQRT , mVU_ESIN,
}; };
void (*mVULowerOP_T3_01_OPCODE [32])(mP) = { static const Fnptr_mVUrecInst mVULowerOP_T3_01_OPCODE[32] = {
mVUunknown , mVUunknown , mVUunknown , mVUunknown, mVUunknown , mVUunknown , mVUunknown , mVUunknown,
mVUunknown , mVUunknown , mVUunknown , mVUunknown, mVUunknown , mVUunknown , mVUunknown , mVUunknown,
mVUunknown , mVUunknown , mVUunknown , mVUunknown, mVUunknown , mVUunknown , mVUunknown , mVUunknown,
@ -90,7 +90,7 @@ void (*mVULowerOP_T3_01_OPCODE [32])(mP) = {
mVU_ERSADD , mVU_EATANxz , mVU_ERSQRT , mVU_EATAN, mVU_ERSADD , mVU_EATANxz , mVU_ERSQRT , mVU_EATAN,
}; };
void (*mVULowerOP_T3_10_OPCODE [32])(mP) = { static const Fnptr_mVUrecInst mVULowerOP_T3_10_OPCODE[32] = {
mVUunknown , mVUunknown , mVUunknown , mVUunknown, mVUunknown , mVUunknown , mVUunknown , mVUunknown,
mVUunknown , mVUunknown , mVUunknown , mVUunknown, mVUunknown , mVUunknown , mVUunknown , mVUunknown,
mVUunknown , mVUunknown , mVUunknown , mVUunknown, mVUunknown , mVUunknown , mVUunknown , mVUunknown,
@ -101,7 +101,7 @@ void (*mVULowerOP_T3_10_OPCODE [32])(mP) = {
mVU_ELENG , mVU_ESUM , mVU_ERCPR , mVU_EEXP, mVU_ELENG , mVU_ESUM , mVU_ERCPR , mVU_EEXP,
}; };
void (*mVULowerOP_T3_11_OPCODE [32])(mP) = { const Fnptr_mVUrecInst mVULowerOP_T3_11_OPCODE [32] = {
mVUunknown , mVUunknown , mVUunknown , mVUunknown, mVUunknown , mVUunknown , mVUunknown , mVUunknown,
mVUunknown , mVUunknown , mVUunknown , mVUunknown, mVUunknown , mVUunknown , mVUunknown , mVUunknown,
mVUunknown , mVUunknown , mVUunknown , mVUunknown, mVUunknown , mVUunknown , mVUunknown , mVUunknown,
@ -112,7 +112,7 @@ void (*mVULowerOP_T3_11_OPCODE [32])(mP) = {
mVU_ERLENG , mVUunknown , mVU_WAITP , mVUunknown, mVU_ERLENG , mVUunknown , mVU_WAITP , mVUunknown,
}; };
void (*mVULowerOP_OPCODE [64])(mP) = { static const Fnptr_mVUrecInst mVULowerOP_OPCODE[64] = {
mVUunknown , mVUunknown , mVUunknown , mVUunknown, mVUunknown , mVUunknown , mVUunknown , mVUunknown,
mVUunknown , mVUunknown , mVUunknown , mVUunknown, mVUunknown , mVUunknown , mVUunknown , mVUunknown,
mVUunknown , mVUunknown , mVUunknown , mVUunknown, mVUunknown , mVUunknown , mVUunknown , mVUunknown,
@ -131,7 +131,7 @@ void (*mVULowerOP_OPCODE [64])(mP) = {
mVULowerOP_T3_00, mVULowerOP_T3_01, mVULowerOP_T3_10, mVULowerOP_T3_11, mVULowerOP_T3_00, mVULowerOP_T3_01, mVULowerOP_T3_10, mVULowerOP_T3_11,
}; };
void (*mVU_UPPER_OPCODE [64])(mP) = { static const Fnptr_mVUrecInst mVU_UPPER_OPCODE[64] = {
mVU_ADDx , mVU_ADDy , mVU_ADDz , mVU_ADDw, mVU_ADDx , mVU_ADDy , mVU_ADDz , mVU_ADDw,
mVU_SUBx , mVU_SUBy , mVU_SUBz , mVU_SUBw, mVU_SUBx , mVU_SUBy , mVU_SUBz , mVU_SUBw,
mVU_MADDx , mVU_MADDy , mVU_MADDz , mVU_MADDw, mVU_MADDx , mVU_MADDy , mVU_MADDz , mVU_MADDw,
@ -150,7 +150,7 @@ void (*mVU_UPPER_OPCODE [64])(mP) = {
mVU_UPPER_FD_00, mVU_UPPER_FD_01, mVU_UPPER_FD_10, mVU_UPPER_FD_11, mVU_UPPER_FD_00, mVU_UPPER_FD_01, mVU_UPPER_FD_10, mVU_UPPER_FD_11,
}; };
void (*mVU_UPPER_FD_00_TABLE [32])(mP) = { static const Fnptr_mVUrecInst mVU_UPPER_FD_00_TABLE [32] = {
mVU_ADDAx , mVU_SUBAx , mVU_MADDAx , mVU_MSUBAx, mVU_ADDAx , mVU_SUBAx , mVU_MADDAx , mVU_MSUBAx,
mVU_ITOF0 , mVU_FTOI0 , mVU_MULAx , mVU_MULAq, mVU_ITOF0 , mVU_FTOI0 , mVU_MULAx , mVU_MULAq,
mVU_ADDAq , mVU_SUBAq , mVU_ADDA , mVU_SUBA, mVU_ADDAq , mVU_SUBAq , mVU_ADDA , mVU_SUBA,
@ -161,7 +161,7 @@ void (*mVU_UPPER_FD_00_TABLE [32])(mP) = {
mVUunknown , mVUunknown , mVUunknown , mVUunknown, mVUunknown , mVUunknown , mVUunknown , mVUunknown,
}; };
void (* mVU_UPPER_FD_01_TABLE [32])(mP) = { static const Fnptr_mVUrecInst mVU_UPPER_FD_01_TABLE [32] = {
mVU_ADDAy , mVU_SUBAy , mVU_MADDAy , mVU_MSUBAy, mVU_ADDAy , mVU_SUBAy , mVU_MADDAy , mVU_MSUBAy,
mVU_ITOF4 , mVU_FTOI4 , mVU_MULAy , mVU_ABS, mVU_ITOF4 , mVU_FTOI4 , mVU_MULAy , mVU_ABS,
mVU_MADDAq , mVU_MSUBAq , mVU_MADDA , mVU_MSUBA, mVU_MADDAq , mVU_MSUBAq , mVU_MADDA , mVU_MSUBA,
@ -172,7 +172,7 @@ void (* mVU_UPPER_FD_01_TABLE [32])(mP) = {
mVUunknown , mVUunknown , mVUunknown , mVUunknown, mVUunknown , mVUunknown , mVUunknown , mVUunknown,
}; };
void (* mVU_UPPER_FD_10_TABLE [32])(mP) = { static const Fnptr_mVUrecInst mVU_UPPER_FD_10_TABLE [32] = {
mVU_ADDAz , mVU_SUBAz , mVU_MADDAz , mVU_MSUBAz, mVU_ADDAz , mVU_SUBAz , mVU_MADDAz , mVU_MSUBAz,
mVU_ITOF12 , mVU_FTOI12 , mVU_MULAz , mVU_MULAi, mVU_ITOF12 , mVU_FTOI12 , mVU_MULAz , mVU_MULAi,
mVU_ADDAi , mVU_SUBAi , mVU_MULA , mVU_OPMULA, mVU_ADDAi , mVU_SUBAi , mVU_MULA , mVU_OPMULA,
@ -183,7 +183,7 @@ void (* mVU_UPPER_FD_10_TABLE [32])(mP) = {
mVUunknown , mVUunknown , mVUunknown , mVUunknown, mVUunknown , mVUunknown , mVUunknown , mVUunknown,
}; };
void (* mVU_UPPER_FD_11_TABLE [32])(mP) = { static const Fnptr_mVUrecInst mVU_UPPER_FD_11_TABLE [32] = {
mVU_ADDAw , mVU_SUBAw , mVU_MADDAw , mVU_MSUBAw, mVU_ADDAw , mVU_SUBAw , mVU_MADDAw , mVU_MSUBAw,
mVU_ITOF15 , mVU_FTOI15 , mVU_MULAw , mVU_CLIP, mVU_ITOF15 , mVU_FTOI15 , mVU_MULAw , mVU_CLIP,
mVU_MADDAi , mVU_MSUBAi , mVUunknown , mVU_NOP, mVU_MADDAi , mVU_MSUBAi , mVUunknown , mVU_NOP,