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Core: Warning fixes for clang-cl

This commit is contained in:
Stenzek 2022-12-25 15:59:04 +10:00 committed by refractionpcsx2
parent a1ffe4deff
commit 07789f5dad
13 changed files with 60 additions and 68 deletions
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2
pcsx2/Dmac.cpp
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@ -305,7 +305,7 @@ __fi u32 dmacRead32( u32 mem )
if (++counter == 8) if (++counter == 8)
counter = 2; counter = 2;
// Set OPH and APATH from counter, cycling paths and alternating OPH // Set OPH and APATH from counter, cycling paths and alternating OPH
return gifRegs.stat._u32 & ~(7 << 9) | (counter & 1 ? counter << 9 : 0); return gifRegs.stat._u32 & (~(7 << 9) | (counter & 1 ? counter << 9 : 0));
} }
return psHu32(mem); return psHu32(mem);

3
pcsx2/Gif.cpp
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@ -403,6 +403,8 @@ static __fi tDMA_TAG* ReadTag()
return ptag; return ptag;
} }
#if 0
// Not used
static __fi tDMA_TAG* ReadTag2() static __fi tDMA_TAG* ReadTag2()
{ {
tDMA_TAG* ptag = dmaGetAddr(gifch.tadr, false); // Set memory pointer to TADR tDMA_TAG* ptag = dmaGetAddr(gifch.tadr, false); // Set memory pointer to TADR
@ -413,6 +415,7 @@ static __fi tDMA_TAG* ReadTag2()
gif.gspath3done = hwDmacSrcChainWithStack(gifch, ptag->ID); gif.gspath3done = hwDmacSrcChainWithStack(gifch, ptag->ID);
return ptag; return ptag;
} }
#endif
void GIFdma() void GIFdma()
{ {

5
pcsx2/Interpreter.cpp
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@ -478,11 +478,6 @@ static void intReserve()
// fixme : detect cpu for use the optimize asm code // fixme : detect cpu for use the optimize asm code
} }
static void intAlloc()
{
// Nothing to do!
}
static void intReset() static void intReset()
{ {
cpuRegs.branch = 0; cpuRegs.branch = 0;

3
pcsx2/IopCounters.cpp
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@ -75,12 +75,15 @@ u8 psxvblankgate = 0;
// which ensures they stay 100% in sync with the EE's hblank counters. // which ensures they stay 100% in sync with the EE's hblank counters.
#define PSXHBLANK 0x2001 #define PSXHBLANK 0x2001
#if 0
// Unused
static void psxRcntReset(int index) static void psxRcntReset(int index)
{ {
psxCounters[index].count = 0; psxCounters[index].count = 0;
psxCounters[index].mode &= ~0x18301C00; psxCounters[index].mode &= ~0x18301C00;
psxCounters[index].sCycleT = psxRegs.cycle; psxCounters[index].sCycleT = psxRegs.cycle;
} }
#endif
static void _rcntSet(int cntidx) static void _rcntSet(int cntidx)
{ {

18
pcsx2/MemoryCardProtocol.cpp
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@ -132,41 +132,41 @@ void MemoryCardProtocol::GetSpecs()
{ {
MC_LOG.WriteLn("%s", __FUNCTION__); MC_LOG.WriteLn("%s", __FUNCTION__);
PS1_FAIL(); PS1_FAIL();
u8 checksum = 0x00; //u8 checksum = 0x00;
McdSizeInfo info; McdSizeInfo info;
mcd->GetSizeInfo(info); mcd->GetSizeInfo(info);
fifoOut.push_back(0x2b); fifoOut.push_back(0x2b);
const u8 sectorSizeLSB = (info.SectorSize & 0xff); const u8 sectorSizeLSB = (info.SectorSize & 0xff);
checksum ^= sectorSizeLSB; //checksum ^= sectorSizeLSB;
fifoOut.push_back(sectorSizeLSB); fifoOut.push_back(sectorSizeLSB);
const u8 sectorSizeMSB = (info.SectorSize >> 8); const u8 sectorSizeMSB = (info.SectorSize >> 8);
checksum ^= sectorSizeMSB; //checksum ^= sectorSizeMSB;
fifoOut.push_back(sectorSizeMSB); fifoOut.push_back(sectorSizeMSB);
const u8 eraseBlockSizeLSB = (info.EraseBlockSizeInSectors & 0xff); const u8 eraseBlockSizeLSB = (info.EraseBlockSizeInSectors & 0xff);
checksum ^= eraseBlockSizeLSB; //checksum ^= eraseBlockSizeLSB;
fifoOut.push_back(eraseBlockSizeLSB); fifoOut.push_back(eraseBlockSizeLSB);
const u8 eraseBlockSizeMSB = (info.EraseBlockSizeInSectors >> 8); const u8 eraseBlockSizeMSB = (info.EraseBlockSizeInSectors >> 8);
checksum ^= eraseBlockSizeMSB; //checksum ^= eraseBlockSizeMSB;
fifoOut.push_back(eraseBlockSizeMSB); fifoOut.push_back(eraseBlockSizeMSB);
const u8 sectorCountLSB = (info.McdSizeInSectors & 0xff); const u8 sectorCountLSB = (info.McdSizeInSectors & 0xff);
checksum ^= sectorCountLSB; //checksum ^= sectorCountLSB;
fifoOut.push_back(sectorCountLSB); fifoOut.push_back(sectorCountLSB);
const u8 sectorCount2nd = (info.McdSizeInSectors >> 8); const u8 sectorCount2nd = (info.McdSizeInSectors >> 8);
checksum ^= sectorCount2nd; //checksum ^= sectorCount2nd;
fifoOut.push_back(sectorCount2nd); fifoOut.push_back(sectorCount2nd);
const u8 sectorCount3rd = (info.McdSizeInSectors >> 16); const u8 sectorCount3rd = (info.McdSizeInSectors >> 16);
checksum ^= sectorCount3rd; //checksum ^= sectorCount3rd;
fifoOut.push_back(sectorCount3rd); fifoOut.push_back(sectorCount3rd);
const u8 sectorCountMSB = (info.McdSizeInSectors >> 24); const u8 sectorCountMSB = (info.McdSizeInSectors >> 24);
checksum ^= sectorCountMSB; //checksum ^= sectorCountMSB;
fifoOut.push_back(sectorCountMSB); fifoOut.push_back(sectorCountMSB);
fifoOut.push_back(info.Xor); fifoOut.push_back(info.Xor);

2
pcsx2/Recording/InputRecording.cpp
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@ -251,7 +251,7 @@ void InputRecording::incFrameCounter()
return; return;
} }
if (m_frame_counter >= std::numeric_limits<u64>::max()) if (m_frame_counter == std::numeric_limits<u32>::max())
{ {
// TODO - log the incredible achievment of playing for longer than 4 billion years, and end the recording // TODO - log the incredible achievment of playing for longer than 4 billion years, and end the recording
stop(); stop();

10
pcsx2/Sio.cpp
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@ -44,14 +44,6 @@ Sio2 sio2;
_mcd mcds[2][4]; _mcd mcds[2][4];
_mcd *mcd; _mcd *mcd;
// Currently only check if pad wants mtap to be active.
// Could lets PCSX2 have its own options, if anyone ever
// wants to add support for using the extra memcard slots.
static bool IsMtapPresent( uint port )
{
return EmuConfig.MultitapEnabled( port );
}
// ============================================================================ // ============================================================================
// SIO0 // SIO0
// ============================================================================ // ============================================================================
@ -177,7 +169,7 @@ void Sio0::SetTxData(u8 value)
stat |= SIO0_STAT::TX_READY | SIO0_STAT::TX_EMPTY; stat |= SIO0_STAT::TX_READY | SIO0_STAT::TX_EMPTY;
stat |= (SIO0_STAT::RX_FIFO_NOT_EMPTY); stat |= (SIO0_STAT::RX_FIFO_NOT_EMPTY);
if (!ctrl & SIO0_CTRL::TX_ENABLE) if (!(ctrl & SIO0_CTRL::TX_ENABLE))
{ {
Console.Warning("%s(%02X) CTRL in illegal state, exiting instantly", __FUNCTION__, value); Console.Warning("%s(%02X) CTRL in illegal state, exiting instantly", __FUNCTION__, value);
return; return;

72
pcsx2/SourceLog.cpp
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@ -133,8 +133,8 @@ SysConsoleLogPack::SysConsoleLogPack()
// -------------------------------------------------------------------------------------- // --------------------------------------------------------------------------------------
static const SysTraceLogDescriptor static const SysTraceLogDescriptor
TLD_SIF = { TLD_SIF = {
"SIF", "SIF (EE <-> IOP)", {"SIF", "SIF (EE <-> IOP)",
"", ""},
"SIF"}; "SIF"};
// ---------------------------- // ----------------------------
@ -143,45 +143,45 @@ static const SysTraceLogDescriptor
static const SysTraceLogDescriptor static const SysTraceLogDescriptor
TLD_EE_Bios = { TLD_EE_Bios = {
"Bios", "Bios", {"Bios", "Bios",
"SYSCALL and DECI2 activity.", "SYSCALL and DECI2 activity."},
"EE"}, "EE"},
TLD_EE_Memory = {"Memory", "Memory", "Direct memory accesses to unknown or unmapped EE memory space.", "eMem"}, TLD_EE_Memory = {{"Memory", "Memory", "Direct memory accesses to unknown or unmapped EE memory space."}, "eMem"},
TLD_EE_R5900 = {"R5900", "R5900 Core", "Disasm of executing core instructions (excluding COPs and CACHE).", "eDis"}, TLD_EE_R5900 = {{"R5900", "R5900 Core", "Disasm of executing core instructions (excluding COPs and CACHE)."}, "eDis"},
TLD_EE_COP0 = {"COP0", "COP0", "Disasm of COP0 instructions (MMU, cpu and dma status, etc).", "eDis"}, TLD_EE_COP0 = {{"COP0", "COP0", "Disasm of COP0 instructions (MMU, cpu and dma status, etc)."}, "eDis"},
TLD_EE_COP1 = {"FPU", "COP1/FPU", "Disasm of the EE's floating point unit (FPU) only.", "eDis"}, TLD_EE_COP1 = {{"FPU", "COP1/FPU", "Disasm of the EE's floating point unit (FPU) only."}, "eDis"},
TLD_EE_COP2 = {"VUmacro", "COP2/VUmacro", "Disasm of the EE's VU0macro co-processor instructions.", "eDis"}, TLD_EE_COP2 = {{"VUmacro", "COP2/VUmacro", "Disasm of the EE's VU0macro co-processor instructions."}, "eDis"},
TLD_EE_Cache = {"Cache", "Cache", "Execution of EE cache instructions.", "eDis"}, TLD_EE_Cache = {{"Cache", "Cache", "Execution of EE cache instructions."}, "eDis"},
TLD_EE_KnownHw = {"HwRegs", "Hardware Regs", "All known hardware register accesses (very slow!); not including sub filter options below.", "eReg"}, TLD_EE_KnownHw = {{"HwRegs", "Hardware Regs", "All known hardware register accesses (very slow!); not including sub filter options below."}, "eReg"},
TLD_EE_UnknownHw = {"UnknownRegs", "Unknown Regs", "Logs only unknown, unmapped, or unimplemented register accesses.", "eReg"}, TLD_EE_UnknownHw = {{"UnknownRegs", "Unknown Regs", "Logs only unknown, unmapped, or unimplemented register accesses."}, "eReg"},
TLD_EE_DMAhw = {"DmaRegs", "DMA Regs", "Logs only DMA-related registers.", "eReg"}, TLD_EE_DMAhw = {{"DmaRegs", "DMA Regs", "Logs only DMA-related registers."}, "eReg"},
TLD_EE_IPU = {"IPU", "IPU", "IPU activity: hardware registers, decoding operations, DMA status, etc.", "IPU"}, TLD_EE_IPU = {{"IPU", "IPU", "IPU activity: hardware registers, decoding operations, DMA status, etc."}, "IPU"},
TLD_EE_GIFtag = {"GIFtags", "GIFtags", "All GIFtag parse activity; path index, tag type, etc.", "GIF"}, TLD_EE_GIFtag = {{"GIFtags", "GIFtags", "All GIFtag parse activity; path index, tag type, etc."}, "GIF"},
TLD_EE_VIFcode = {"VIFcodes", "VIFcodes", "All VIFcode processing; command, tag style, interrupts.", "VIF"}, TLD_EE_VIFcode = {{"VIFcodes", "VIFcodes", "All VIFcode processing; command, tag style, interrupts."}, "VIF"},
TLD_EE_MSKPATH3 = {"MSKPATH3", "MSKPATH3", "All processing involved in Path3 Masking.", "MSKPATH3"}, TLD_EE_MSKPATH3 = {{"MSKPATH3", "MSKPATH3", "All processing involved in Path3 Masking."}, "MSKPATH3"},
TLD_EE_SPR = {"MFIFO", "Scratchpad MFIFO", "Scratchpad's MFIFO activity.", "SPR"}, TLD_EE_SPR = {{"MFIFO", "Scratchpad MFIFO", "Scratchpad's MFIFO activity."}, "SPR"},
TLD_EE_DMAC = {"DmaCtrl", "DMA Controller", "Actual data transfer logs, bus right arbitration, stalls, etc.", "eDmaC"}, TLD_EE_DMAC = {{"DmaCtrl", "DMA Controller", "Actual data transfer logs, bus right arbitration, stalls, etc."}, "eDmaC"},
TLD_EE_Counters = {"Counters", "Counters", "Tracks all EE counters events and some counter register activity.", "eCnt"}, TLD_EE_Counters = {{"Counters", "Counters", "Tracks all EE counters events and some counter register activity."}, "eCnt"},
TLD_EE_VIF = {"VIF", "VIF", "Dumps various VIF and VIFcode processing data.", "VIF"}, TLD_EE_VIF = {{"VIF", "VIF", "Dumps various VIF and VIFcode processing data."}, "VIF"},
TLD_EE_GIF = {"GIF", "GIF", "Dumps various GIF and GIFtag parsing data.", "GIF"}; TLD_EE_GIF = {{"GIF", "GIF", "Dumps various GIF and GIFtag parsing data."}, "GIF"};
// ---------------------------------- // ----------------------------------
// IOP - Input / Output Processor // IOP - Input / Output Processor
@ -189,33 +189,33 @@ static const SysTraceLogDescriptor
static const SysTraceLogDescriptor static const SysTraceLogDescriptor
TLD_IOP_Bios = { TLD_IOP_Bios = {
"Bios", "Bios", {"Bios", "Bios",
"SYSCALL and IRX activity.", "SYSCALL and IRX activity."},
"IOP"}, "IOP"},
TLD_IOP_Memory = {"Memory", "Memory", "Direct memory accesses to unknown or unmapped IOP memory space.", "iMem"}, TLD_IOP_Memory = {{"Memory", "Memory", "Direct memory accesses to unknown or unmapped IOP memory space."}, "iMem"},
TLD_IOP_R3000A = {"R3000A", "R3000A Core", "Disasm of executing core instructions (excluding COPs and CACHE).", "iDis"}, TLD_IOP_R3000A = {{"R3000A", "R3000A Core", "Disasm of executing core instructions (excluding COPs and CACHE)."}, "iDis"},
TLD_IOP_COP2 = {"COP2/GPU", "COP2", "Disasm of the IOP's GPU co-processor instructions.", "iDis"}, TLD_IOP_COP2 = {{"COP2/GPU", "COP2", "Disasm of the IOP's GPU co-processor instructions."}, "iDis"},
TLD_IOP_KnownHw = {"HwRegs", "Hardware Regs", "All known hardware register accesses, not including the sub-filters below.", "iReg"}, TLD_IOP_KnownHw = {{"HwRegs", "Hardware Regs", "All known hardware register accesses, not including the sub-filters below."}, "iReg"},
TLD_IOP_UnknownHw = {"UnknownRegs", "Unknown Regs", "Logs only unknown, unmapped, or unimplemented register accesses.", "iReg"}, TLD_IOP_UnknownHw = {{"UnknownRegs", "Unknown Regs", "Logs only unknown, unmapped, or unimplemented register accesses."}, "iReg"},
TLD_IOP_DMAhw = {"DmaRegs", "DMA Regs", "Logs only DMA-related registers.", "iReg"}, TLD_IOP_DMAhw = {{"DmaRegs", "DMA Regs", "Logs only DMA-related registers."}, "iReg"},
TLD_IOP_Memcards = {"Memorycards", "Memorycards", "Memorycard reads, writes, erases, terminators, and other processing.", "Mcd"}, TLD_IOP_Memcards = {{"Memorycards", "Memorycards", "Memorycard reads, writes, erases, terminators, and other processing."}, "Mcd"},
TLD_IOP_PAD = {"Pad", "Pad", "Gamepad activity on the SIO.", "Pad"}, TLD_IOP_PAD = {{"Pad", "Pad", "Gamepad activity on the SIO."}, "Pad"},
TLD_IOP_DMAC = {"DmaCrl", "DMA Controller", "Actual DMA event processing and data transfer logs.", "iDmaC"}, TLD_IOP_DMAC = {{"DmaCrl", "DMA Controller", "Actual DMA event processing and data transfer logs."}, "iDmaC"},
TLD_IOP_Counters = {"Counters", "Counters", "Tracks all IOP counters events and some counter register activity.", "iCnt"}, TLD_IOP_Counters = {{"Counters", "Counters", "Tracks all IOP counters events and some counter register activity."}, "iCnt"},
TLD_IOP_CDVD = {"CDVD", "CDVD", "Detailed logging of CDVD hardware.", "CDVD"}, TLD_IOP_CDVD = {{"CDVD", "CDVD", "Detailed logging of CDVD hardware."}, "CDVD"},
TLD_IOP_MDEC = {"MDEC", "MDEC", "Detailed logging of the Motion (FMV) Decoder hardware unit.", "MDEC"}; TLD_IOP_MDEC = {{"MDEC", "MDEC", "Detailed logging of the Motion (FMV) Decoder hardware unit."}, "MDEC"};
SysTraceLogPack::SysTraceLogPack() SysTraceLogPack::SysTraceLogPack()
: SIF(&TLD_SIF) : SIF(&TLD_SIF)

3
pcsx2/VUops.cpp
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@ -2090,6 +2090,8 @@ As an example for setting the polynomial variable correctly, the 23-bit M-series
would be specified as (1 << 14). would be specified as (1 << 14).
*/ */
// Unused
#if 0
//The two-tap 23 stage M-series polynomials are x23+x18 and x23+x14 ((1 << 18) and (1 << 14), respectively). //The two-tap 23 stage M-series polynomials are x23+x18 and x23+x14 ((1 << 18) and (1 << 14), respectively).
//The reverse sequences can be generated by x23+x(23-18) and x23+x(23-14) ((1 << 9) and (1 << 5), respectively) //The reverse sequences can be generated by x23+x(23-18) and x23+x(23-14) ((1 << 9) and (1 << 5), respectively)
static u32 poly = 1 << 5; static u32 poly = 1 << 5;
@ -2098,6 +2100,7 @@ static __ri void SetPoly(u32 newPoly)
{ {
poly = poly & ~1; poly = poly & ~1;
} }
#endif
static __ri void AdvanceLFSR(VURegs* VU) static __ri void AdvanceLFSR(VURegs* VU)
{ {

2
pcsx2/Vif1_MFIFO.cpp
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@ -113,7 +113,7 @@ static __fi bool mfifoVIF1rbTransfer()
static __fi void mfifo_VIF1chain() static __fi void mfifo_VIF1chain()
{ {
/* Is QWC = 0? if so there is nothing to transfer */ /* Is QWC = 0? if so there is nothing to transfer */
if ((vif1ch.qwc == 0)) if (vif1ch.qwc == 0)
{ {
vif1.inprogress &= ~1; vif1.inprogress &= ~1;
return; return;

2
pcsx2/ps2/Iop/IopHwWrite.cpp
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@ -342,7 +342,7 @@ static __fi void _HwWrite_16or32_Page1( u32 addr, T val )
mcase(HW_IREG): mcase(HW_IREG):
psxHu(addr) &= val; psxHu(addr) &= val;
if ((val == 0xffffffff) ) { if (val == 0xffffffff) {
psxHu32(addr) |= 1 << 2; psxHu32(addr) |= 1 << 2;
psxHu32(addr) |= 1 << 3; psxHu32(addr) |= 1 << 3;
} }

2
pcsx2/ps2/Iop/PsxBios.cpp
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@ -67,7 +67,7 @@ bool psxBiosCall()
// TODO: Tracing // TODO: Tracing
// TODO (maybe, psx is hardly a priority): HLE framework // TODO (maybe, psx is hardly a priority): HLE framework
switch ((psxRegs.pc & 0x1FFFFFFFU) << 4 & 0xf00 | psxRegs.GPR.n.t1 & 0xff) { switch (((psxRegs.pc << 4) & 0xf00) | (psxRegs.GPR.n.t1 & 0xff)) {
case 0xa03: case 0xa03:
case 0xb35: case 0xb35:
// write(fd, data, size) // write(fd, data, size)

4
pcsx2/vtlb.cpp
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@ -1304,10 +1304,6 @@ void vtlb_Core_Free()
s_fastmem_area.reset(); s_fastmem_area.reset();
} }
static std::string GetHostVmErrorMsg()
{
return "Your system is too low on virtual resources for PCSX2 to run. This can be caused by having a small or disabled swapfile, or by other programs that are hogging resources.";
}
// -------------------------------------------------------------------------------------- // --------------------------------------------------------------------------------------
// VtlbMemoryReserve (implementations) // VtlbMemoryReserve (implementations)
// -------------------------------------------------------------------------------------- // --------------------------------------------------------------------------------------