mirror of https://github.com/PCSX2/pcsx2.git
Fix for games which start VIF1 off while the DMA is paused (Crash of the Titans being one of them)
git-svn-id: http://pcsx2.googlecode.com/svn/trunk@704 96395faa-99c1-11dd-bbfe-3dabce05a288
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@ -83,6 +83,8 @@ static void DmaExec( void (*func)(), u32 mem, u32 value )
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if ((psHu32(mem) & 0x100) && (psHu32(DMAC_CTRL) & 0x1))
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if ((psHu32(mem) & 0x100) && (psHu32(DMAC_CTRL) & 0x1))
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func();
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func();
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}
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}
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@ -155,6 +157,7 @@ void hwWrite8(u32 mem, u8 value) {
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case 0x10009001: // dma1 - vif1
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case 0x10009001: // dma1 - vif1
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DMA_LOG("VIF1dma EXECUTE, value=0x%x\n", value);
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DMA_LOG("VIF1dma EXECUTE, value=0x%x\n", value);
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if(value & 0x1) vif1.done = 0; //This must be done here! some games (ala Crash of the Titans) pause the dma to start MFIFO
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DmaExec8(dmaVIF1, mem, value);
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DmaExec8(dmaVIF1, mem, value);
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break;
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break;
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@ -261,6 +264,7 @@ __forceinline void hwWrite16(u32 mem, u16 value)
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case 0x10009000: // dma1 - vif1 - chcr
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case 0x10009000: // dma1 - vif1 - chcr
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DMA_LOG("VIF1dma CHCR %lx\n", value);
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DMA_LOG("VIF1dma CHCR %lx\n", value);
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if(value & 0x100) vif1.done = 0; //This must be done here! some games (ala Crash of the Titans) pause the dma to start MFIFO
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DmaExec16(dmaVIF1, mem, value);
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DmaExec16(dmaVIF1, mem, value);
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break;
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break;
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@ -680,6 +684,10 @@ void __fastcall hwWrite32_generic( u32 mem, u32 value )
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//------------------------------------------------------------------
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//------------------------------------------------------------------
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case D1_CHCR: // dma1 - vif1 - chcr
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case D1_CHCR: // dma1 - vif1 - chcr
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DMA_LOG("VIF1dma EXECUTE, value=0x%x\n", value);
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DMA_LOG("VIF1dma EXECUTE, value=0x%x\n", value);
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if(value & 0x100)
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{
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vif1.done = 0; //This must be done here! some games (ala Crash of the Titans) pause the dma to start MFIFO
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}
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DmaExec(dmaVIF1, mem, value);
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DmaExec(dmaVIF1, mem, value);
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return;
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return;
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@ -499,7 +499,7 @@ void mfifoVIF1transfer(int qwc) {
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if(qwc > 0){
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if(qwc > 0){
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vifqwc += qwc;
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vifqwc += qwc;
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SPR_LOG("Added %x qw to mfifo, total now %x\n", qwc, vifqwc);
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SPR_LOG("Added %x qw to mfifo, total now %x - Vif CHCR %x Stalled %x done %x\n", qwc, vifqwc, vif1ch->chcr, vif1.vifstalled, vif1.done);
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if((vif1ch->chcr & 0x100) == 0 || vif1.vifstalled == 1 || vif1.done == 1) return;
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if((vif1ch->chcr & 0x100) == 0 || vif1.vifstalled == 1 || vif1.done == 1) return;
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}
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}
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@ -589,6 +589,8 @@ void mfifoVIF1transfer(int qwc) {
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void vifMFIFOInterrupt()
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void vifMFIFOInterrupt()
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{
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{
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g_vifCycles = 0;
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if(vif1.irq && vif1.tag.size == 0) {
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if(vif1.irq && vif1.tag.size == 0) {
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vif1Regs->stat|= VIF1_STAT_INT;
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vif1Regs->stat|= VIF1_STAT_INT;
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hwIntcIrq(INTC_VIF1);
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hwIntcIrq(INTC_VIF1);
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@ -617,6 +619,7 @@ void vifMFIFOInterrupt()
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vifqwc = 0;
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vifqwc = 0;
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vif1.done = 1;
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vif1.done = 1;
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g_vifCycles = 0;
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vif1ch->chcr &= ~0x100;
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vif1ch->chcr &= ~0x100;
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hwDmacIrq(DMAC_VIF1);
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hwDmacIrq(DMAC_VIF1);
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VIF_LOG("vif mfifo dma end\n");
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VIF_LOG("vif mfifo dma end\n");
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@ -2023,6 +2023,7 @@ __forceinline void vif1Interrupt() {
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prevviftag = NULL;
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prevviftag = NULL;
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prevvifcycles = 0;
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prevvifcycles = 0;
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vif1ch->chcr &= ~0x100;
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vif1ch->chcr &= ~0x100;
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g_vifCycles = 0;
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hwDmacIrq(DMAC_VIF1);
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hwDmacIrq(DMAC_VIF1);
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if(vif1Regs->mskpath3 == 0 || (vif1ch->chcr & 0x1) == 0x1)vif1Regs->stat&= ~0x1F000000; // FQC=0
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if(vif1Regs->mskpath3 == 0 || (vif1ch->chcr & 0x1) == 0x1)vif1Regs->stat&= ~0x1F000000; // FQC=0
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}
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}
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@ -2036,7 +2037,7 @@ void dmaVIF1()
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vif1ch->chcr, vif1ch->madr, vif1ch->qwc,
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vif1ch->chcr, vif1ch->madr, vif1ch->qwc,
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vif1ch->tadr, vif1ch->asr0, vif1ch->asr1 );
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vif1ch->tadr, vif1ch->asr0, vif1ch->asr1 );
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vif1.done = 0;
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g_vifCycles = 0;
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g_vifCycles = 0;
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if (((psHu32(DMAC_CTRL) & 0xC) == 0x8)) { // VIF MFIFO
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if (((psHu32(DMAC_CTRL) & 0xC) == 0x8)) { // VIF MFIFO
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