2009-04-16 01:39:38 +00:00
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/* Pcsx2 - Pc Ps2 Emulator
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* Copyright (C) 2002-2009 Pcsx2 Team
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA
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*/
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#pragma once
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2009-04-16 14:45:13 +00:00
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// Implementations here cover SHLD and SHRD.
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2009-04-16 01:39:38 +00:00
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// Note: This header is meant to be included from within the x86Emitter::Internal namespace.
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// -------------------------------------------------------------------
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// Optimization Note: Imm shifts by 0 are ignore (no code generated). This is a safe optimization
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// because shifts by 0 do *not* affect flags status.
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template< typename ImmType, bool isShiftRight >
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class DwordShiftImpl
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{
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public:
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static const uint OperandSize = sizeof(ImmType);
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DwordShiftImpl() {} // because GCC doesn't like static classes
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protected:
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static bool Is8BitOperand() { return OperandSize == 1; }
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static void prefix16() { if( OperandSize == 2 ) iWrite<u8>( 0x66 ); }
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static void basesibform( bool isCL )
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{
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prefix16();
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write8( 0x0f );
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write8( (isCL ? 0xa5 : 0xa4) | (isShiftRight ? 0x8 : 0) );
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}
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public:
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static __emitinline void Emit( const iRegister<OperandSize>& to, const iRegister<OperandSize>& from )
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{
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prefix16();
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write16( 0xa50f | (isShiftRight ? 0x800 : 0) );
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2009-04-16 14:45:13 +00:00
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ModRM_Direct( from.Id, to.Id );
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2009-04-16 01:39:38 +00:00
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}
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static __emitinline void Emit( const iRegister<OperandSize>& to, const iRegister<OperandSize>& from, u8 imm )
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{
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if( imm == 0 ) return;
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prefix16();
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write16( 0xa40f | (isShiftRight ? 0x800 : 0) );
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2009-04-16 14:45:13 +00:00
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ModRM_Direct( from.Id, to.Id );
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2009-04-16 01:39:38 +00:00
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write8( imm );
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}
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static __emitinline void Emit( const ModSibBase& sibdest, const iRegister<OperandSize>& from, __unused const iRegisterCL& clreg )
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{
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basesibform();
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EmitSibMagic( from.Id, sibdest );
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}
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static __emitinline void Emit( const ModSibBase& sibdest, const iRegister<OperandSize>& from, u8 imm )
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{
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basesibform();
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EmitSibMagic( from.Id, sibdest );
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write8( imm );
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}
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// dest data type is inferred from the 'from' register, so we can do void* resolution :)
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static __emitinline void Emit( void* dest, const iRegister<OperandSize>& from, __unused const iRegisterCL& clreg )
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{
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basesibform();
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iWriteDisp( from.Id, dest );
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}
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// dest data type is inferred from the 'from' register, so we can do void* resolution :)
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static __emitinline void Emit( void* dest, const iRegister<OperandSize>& from, u8 imm )
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{
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basesibform();
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iWriteDisp( from.Id, dest );
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write8( imm );
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}
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};
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// -------------------------------------------------------------------
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//
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template< bool isShiftRight >
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class DwordShiftImplAll
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{
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protected:
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typedef DwordShiftImpl<u32, isShiftRight> m_32;
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typedef DwordShiftImpl<u16, isShiftRight> m_16;
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// (Note: I'm not going to macro this since it would likely clobber intellisense parameter resolution)
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public:
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// ---------- 32 Bit Interface -----------
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__forceinline void operator()( const iRegister32& to, const iRegister32& from, __unused const iRegisterCL& clreg ) const { m_32::Emit( to, from ); }
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__forceinline void operator()( void* dest, const iRegister32& from, __unused const iRegisterCL& clreg ) const { m_32::Emit( dest, from ); }
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__noinline void operator()( const ModSibBase& sibdest, const iRegister32& from, __unused const iRegisterCL& clreg ) const { m_32::Emit( sibdest, from ); }
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__forceinline void operator()( const iRegister32& to, const iRegister32& from, u8 imm ) const { m_32::Emit( to, from, imm ); }
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__forceinline void operator()( void* dest, const iRegister32& from, u8 imm ) const { m_32::Emit( dest, from, imm ); }
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__noinline void operator()( const ModSibBase& sibdest, const iRegister32& from, u8 imm ) const { m_32::Emit( sibdest, from ); }
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// ---------- 16 Bit Interface -----------
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__forceinline void operator()( const iRegister16& to, const iRegister16& from, __unused const iRegisterCL& clreg ) const { m_16::Emit( to, from ); }
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__forceinline void operator()( void* dest, const iRegister16& from, __unused const iRegisterCL& clreg ) const { m_16::Emit( dest, from ); }
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__noinline void operator()( const ModSibBase& sibdest, const iRegister16& from, __unused const iRegisterCL& clreg ) const { m_16::Emit( sibdest, from ); }
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__forceinline void operator()( const iRegister16& to, const iRegister16& from, u8 imm ) const { m_16::Emit( to, from, imm ); }
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__forceinline void operator()( void* dest, const iRegister16& from, u8 imm ) const { m_16::Emit( dest, from, imm ); }
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__noinline void operator()( const ModSibBase& sibdest, const iRegister16& from, u8 imm ) const { m_16::Emit( sibdest, from ); }
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DwordShiftImplAll() {} // Why does GCC need these?
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};
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