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27 lines
2.3 KiB
Plaintext
27 lines
2.3 KiB
Plaintext
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Table 2. Throughput of Native Arithmetic Instructions. (Number of Operations per Clock Cycle per Multiprocessor) Compute Capability
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Architecture , FER , FER , KPL , MAX
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32-bit floating-point add multiply multiply-add , 32 , 48 , 192 , 128
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64-bit floating-point add multiply multiply-add , 16 , 4 , 8 , 1
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32-bit floating-point reciprocal reciprocal square root log2f/exp2f/sine/cosine , 4 , 8 , 32 , 32
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32-bit integer add extended-precision add subtract extended-precision subtract , 32 , 48 , 160 , 128
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32-bit integer multiply multiply-add extended-precision multiply-add , 16 , 16 , 32 , Multiple instructions
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32-bit integer shift , 16 , 16 , 32 , 64
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compare minimum maximum , 32 , 48 , 160 , 64
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32-bit integer bit reverse bit field extract/insert , 16 , 16 , 32 , 64
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32-bit bitwise AND / OR / XOR , 32 , 160 , 160 , 128
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count of leading zeros most significant non-sign bit , 16 , 16 , 32 , Multiple instructions
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population count , 16 , 16 , 32 , 32
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warp shuffle , N/A , N/A , 32 , 32
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sum of absolute difference , 16 , 16 , 32 , 64
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SIMD video instructions vabsdiff2 , N/A , N/A , 160 , Multiple instructions
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SIMD video instructions vabsdiff4 , N/A , N/A , 160 , Multiple instructions
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All other SIMD video instructions , 16 , 16 , 32 , Multiple instructions
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Type conversions from 8/16-bit integer to 32-bit types , 16 , 16 , 128 , 32
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Type conversions from and to 64-bit types , 16 , 4 , 8 , 4
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All other type conversions , 16 , 16 , 32 , 32
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Some tips:
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* bit field operations are as fast as shift operations.
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