2009-09-08 12:08:10 +00:00
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/* PCSX2 - PS2 Emulator for PCs
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2010-05-03 14:08:02 +00:00
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* Copyright (C) 2002-2010 PCSX2 Dev Team
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2010-04-25 00:31:27 +00:00
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*
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2009-09-08 12:08:10 +00:00
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* PCSX2 is free software: you can redistribute it and/or modify it under the terms
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* of the GNU Lesser General Public License as published by the Free Software Found-
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* ation, either version 3 of the License, or (at your option) any later version.
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2009-07-03 00:49:40 +00:00
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*
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2009-09-08 12:08:10 +00:00
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* PCSX2 is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY;
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* without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
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* PURPOSE. See the GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License along with PCSX2.
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* If not, see <http://www.gnu.org/licenses/>.
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2009-07-03 00:49:40 +00:00
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*/
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2021-09-01 20:31:46 +00:00
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#include "common/emitter/legacy_internal.h"
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2009-07-03 00:49:40 +00:00
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//------------------------------------------------------------------
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// FPU instructions
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//------------------------------------------------------------------
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/* fld m32 to fpu reg stack */
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2016-11-12 15:28:37 +00:00
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emitterT void FLD32(u32 from)
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2009-07-03 00:49:40 +00:00
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{
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2021-09-06 18:28:26 +00:00
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xWrite8(0xD9);
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ModRM(0, 0x0, DISP32);
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xWrite32(MEMADDR(from, 4));
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2009-07-03 00:49:40 +00:00
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}
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// fld st(i)
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2016-11-12 15:28:37 +00:00
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emitterT void FLD(int st) { xWrite16(0xc0d9 + (st << 8)); }
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emitterT void FLD1() { xWrite16(0xe8d9); }
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emitterT void FLDL2E() { xWrite16(0xead9); }
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2009-07-03 00:49:40 +00:00
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/* fstp m32 from fpu reg stack */
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2016-11-12 15:28:37 +00:00
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emitterT void FSTP32(u32 to)
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2009-07-03 00:49:40 +00:00
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{
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2021-09-06 18:28:26 +00:00
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xWrite8(0xD9);
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ModRM(0, 0x3, DISP32);
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xWrite32(MEMADDR(to, 4));
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2009-07-03 00:49:40 +00:00
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}
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// fstp st(i)
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2016-11-12 15:28:37 +00:00
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emitterT void FSTP(int st) { xWrite16(0xd8dd + (st << 8)); }
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2009-07-03 00:49:40 +00:00
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2016-11-12 15:28:37 +00:00
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emitterT void FRNDINT() { xWrite16(0xfcd9); }
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emitterT void FXCH(int st) { xWrite16(0xc8d9 + (st << 8)); }
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emitterT void F2XM1() { xWrite16(0xf0d9); }
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emitterT void FSCALE() { xWrite16(0xfdd9); }
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emitterT void FPATAN(void) { xWrite16(0xf3d9); }
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emitterT void FSIN(void) { xWrite16(0xfed9); }
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2009-07-03 00:49:40 +00:00
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/* fadd ST(0) to fpu reg stack ST(src) */
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2016-11-12 15:28:37 +00:00
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emitterT void FADD320toR(x86IntRegType src)
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2009-07-03 00:49:40 +00:00
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{
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2021-09-06 18:28:26 +00:00
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xWrite8(0xDC);
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xWrite8(0xC0 + src);
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2009-07-03 00:49:40 +00:00
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}
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/* fsub ST(src) to fpu reg stack ST(0) */
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2016-11-12 15:28:37 +00:00
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emitterT void FSUB32Rto0(x86IntRegType src)
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2009-07-03 00:49:40 +00:00
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{
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2021-09-06 18:28:26 +00:00
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xWrite8(0xD8);
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xWrite8(0xE0 + src);
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2009-07-03 00:49:40 +00:00
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}
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/* fmul m32 to fpu reg stack */
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2016-11-12 15:28:37 +00:00
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emitterT void FMUL32(u32 from)
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2009-07-03 00:49:40 +00:00
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{
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2021-09-06 18:28:26 +00:00
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xWrite8(0xD8);
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ModRM(0, 0x1, DISP32);
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xWrite32(MEMADDR(from, 4));
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2009-07-03 00:49:40 +00:00
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}
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