2009-09-08 12:08:10 +00:00
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/* PCSX2 - PS2 Emulator for PCs
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2010-05-03 14:08:02 +00:00
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* Copyright (C) 2002-2010 PCSX2 Dev Team
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2010-04-25 00:31:27 +00:00
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*
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2009-09-08 12:08:10 +00:00
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* PCSX2 is free software: you can redistribute it and/or modify it under the terms
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* of the GNU Lesser General Public License as published by the Free Software Found-
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* ation, either version 3 of the License, or (at your option) any later version.
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2009-04-14 01:26:57 +00:00
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*
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2009-09-08 12:08:10 +00:00
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* PCSX2 is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY;
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* without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
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* PURPOSE. See the GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License along with PCSX2.
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* If not, see <http://www.gnu.org/licenses/>.
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2009-04-14 01:26:57 +00:00
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*/
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2009-04-07 21:54:50 +00:00
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#pragma once
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2009-07-03 00:49:40 +00:00
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#include "x86types.h"
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#include "instructions.h"
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2009-11-06 21:45:30 +00:00
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namespace x86Emitter {
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2010-07-05 19:15:19 +00:00
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#define OpWriteSSE( pre, op ) xOpWrite0F( pre, op, to, from )
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2009-11-07 17:15:37 +00:00
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2010-07-05 19:15:19 +00:00
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extern void SimdPrefix( u8 prefix, u16 opcode );
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extern void EmitSibMagic( uint regfield, const void* address );
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extern void EmitSibMagic( uint regfield, const xIndirectVoid& info );
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extern void EmitSibMagic( uint reg1, const xRegisterBase& reg2 );
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extern void EmitSibMagic( const xRegisterBase& reg1, const xRegisterBase& reg2 );
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extern void EmitSibMagic( const xRegisterBase& reg1, const void* src );
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extern void EmitSibMagic( const xRegisterBase& reg1, const xIndirectVoid& sib );
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2009-11-06 21:45:30 +00:00
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2010-07-05 19:15:19 +00:00
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extern void _xMovRtoR( const xRegisterInt& to, const xRegisterInt& from );
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2009-11-06 21:45:30 +00:00
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2010-07-05 19:15:19 +00:00
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template< typename T > inline
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void xWrite( T val )
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{
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*(T*)x86Ptr = val;
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x86Ptr += sizeof(T);
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}
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2009-11-06 21:45:30 +00:00
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2010-07-05 19:15:19 +00:00
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template< typename T1, typename T2 > __emitinline
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void xOpWrite( u8 prefix, u8 opcode, const T1& param1, const T2& param2 )
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{
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if( prefix != 0 )
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xWrite16( (opcode<<8) | prefix );
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else
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xWrite8( opcode );
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EmitSibMagic( param1, param2 );
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}
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template< typename T1, typename T2 > __emitinline
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void xOpWrite0F( u8 prefix, u16 opcode, const T1& param1, const T2& param2 )
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{
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SimdPrefix( prefix, opcode );
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EmitSibMagic( param1, param2 );
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}
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template< typename T1, typename T2 > __emitinline
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void xOpWrite0F( u8 prefix, u16 opcode, const T1& param1, const T2& param2, u8 imm8 )
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{
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xOpWrite0F( prefix, opcode, param1, param2 );
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xWrite8( imm8 );
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}
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2009-11-06 21:45:30 +00:00
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2010-07-05 19:15:19 +00:00
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template< typename T1, typename T2 > __emitinline
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void xOpWrite0F( u16 opcode, const T1& param1, const T2& param2 ) { xOpWrite0F( 0, opcode, param1, param2 ); }
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2009-11-06 21:45:30 +00:00
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2010-07-05 19:15:19 +00:00
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template< typename T1, typename T2 > __emitinline
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void xOpWrite0F( u16 opcode, const T1& param1, const T2& param2, u8 imm8 ) { xOpWrite0F( 0, opcode, param1, param2, imm8 ); }
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2009-11-06 21:45:30 +00:00
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2015-12-09 22:51:04 +00:00
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// VEX 2 Bytes Prefix
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template< typename T1, typename T2, typename T3 > __emitinline
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void xOpWriteC5( u8 prefix, u8 opcode, const T1& param1, const T2& param2, const T3& param3 )
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{
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pxAssert( prefix == 0 || prefix == 0x66 || prefix == 0xF3 || prefix == 0xF2 );
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const xRegisterInt& reg = param1.IsReg() ? param1 : param2;
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#ifdef __x86_64__
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u8 nR = reg.IsExtended() ? 0x00 : 0x80;
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#else
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u8 nR = 0x80;
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#endif
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u8 L = reg.IsWideSIMD() ? 4 : 0;
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u8 nv = (~param2.GetId() & 0xF) << 3;
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u8 p =
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prefix == 0xF2 ? 3 :
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prefix == 0xF3 ? 2 :
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prefix == 0x66 ? 1 : 0;
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xWrite8( 0xC5 );
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xWrite8( nR | nv | L | p );
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xWrite8( opcode );
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EmitSibMagic( param1, param3 );
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}
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// VEX 3 Bytes Prefix
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template< typename T1, typename T2, typename T3 > __emitinline
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void xOpWriteC4( u8 prefix, u8 mb_prefix, u8 opcode, const T1& param1, const T2& param2, const T3& param3, int w = -1 )
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{
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pxAssert( prefix == 0 || prefix == 0x66 || prefix == 0xF3 || prefix == 0xF2 );
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pxAssert( mb_prefix == 0x0F || mb_prefix == 0x38 || mb_prefix == 0x3A );
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const xRegisterInt& reg = param1.IsReg() ? param1 : param2;
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#ifdef __x86_64__
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u8 nR = reg.IsExtended() ? 0x00 : 0x80;
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u8 nB = param3.IsExtended() ? 0x00 : 0x20;
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u8 nX = 0x40; // likely unused so hardwired to disabled
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#else
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u8 nR = 0x80;
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u8 nB = 0x20;
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u8 nX = 0x40;
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#endif
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u8 L = reg.IsWideSIMD() ? 4 : 0;
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u8 W = (w == -1) ? (reg.GetOperandSize() == 8 ? 0x80 : 0) : // autodetect the size
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0x80 * w; // take directly the W value
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u8 nv = (~param2.GetId() & 0xF) << 3;
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u8 p =
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prefix == 0xF2 ? 3 :
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prefix == 0xF3 ? 2 :
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prefix == 0x66 ? 1 : 0;
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u8 m =
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mb_prefix == 0x3A ? 3 :
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mb_prefix == 0x38 ? 2 : 1;
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xWrite8( 0xC4 );
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xWrite8( nR | nX | nB | m );
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xWrite8( W | nv | L | p );
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xWrite8( opcode );
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EmitSibMagic( param1, param3 );
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}
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2009-11-06 21:45:30 +00:00
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}
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