2009-09-08 12:08:10 +00:00
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/* PCSX2 - PS2 Emulator for PCs
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2010-05-03 14:08:02 +00:00
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* Copyright (C) 2002-2010 PCSX2 Dev Team
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2010-04-25 00:31:27 +00:00
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*
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2009-09-08 12:08:10 +00:00
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* PCSX2 is free software: you can redistribute it and/or modify it under the terms
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* of the GNU Lesser General Public License as published by the Free Software Found-
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* ation, either version 3 of the License, or (at your option) any later version.
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2009-04-14 01:26:57 +00:00
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*
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2009-09-08 12:08:10 +00:00
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* PCSX2 is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY;
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* without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
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* PURPOSE. See the GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License along with PCSX2.
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* If not, see <http://www.gnu.org/licenses/>.
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2009-04-14 01:26:57 +00:00
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*/
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#pragma once
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2019-08-23 21:40:33 +00:00
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//#define SPAM_DEPRECATION_WARNINGS
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#if defined(__linux__) && defined(__clang__) && defined(SPAM_DEPRECATION_WARNINGS)
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2015-11-19 23:47:46 +00:00
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#define ATTR_DEP [[deprecated]]
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#else
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#define ATTR_DEP
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#endif
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2021-12-25 02:26:47 +00:00
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#ifdef FSCALE
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# undef FSCALE // Defined in a macOS header
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#endif
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2009-04-14 01:26:57 +00:00
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//------------------------------------------------------------------
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// legacy jump/align functions
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//------------------------------------------------------------------
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2021-09-06 18:28:26 +00:00
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ATTR_DEP extern void x86SetJ8(u8* j8);
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ATTR_DEP extern void x86SetJ8A(u8* j8);
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ATTR_DEP extern void x86SetJ16(u16* j16);
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ATTR_DEP extern void x86SetJ16A(u16* j16);
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ATTR_DEP extern void x86SetJ32(u32* j32);
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ATTR_DEP extern void x86SetJ32A(u32* j32);
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2009-04-14 01:26:57 +00:00
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//------------------------------------------------------------------
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////////////////////////////////////
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// jump instructions //
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////////////////////////////////////
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2010-04-25 00:31:27 +00:00
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// jmp rel8
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2021-09-06 18:28:26 +00:00
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ATTR_DEP extern u8* JMP8(u8 to);
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2009-04-14 01:26:57 +00:00
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2010-04-25 00:31:27 +00:00
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// jmp rel32
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2021-09-06 18:28:26 +00:00
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ATTR_DEP extern u32* JMP32(uptr to);
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2009-04-14 01:26:57 +00:00
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2010-04-25 00:31:27 +00:00
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// jp rel8
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2021-09-06 18:28:26 +00:00
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ATTR_DEP extern u8* JP8(u8 to);
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2010-04-25 00:31:27 +00:00
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// jnp rel8
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2021-09-06 18:28:26 +00:00
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ATTR_DEP extern u8* JNP8(u8 to);
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2010-04-25 00:31:27 +00:00
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// je rel8
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2021-09-06 18:28:26 +00:00
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ATTR_DEP extern u8* JE8(u8 to);
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2010-04-25 00:31:27 +00:00
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// jz rel8
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2021-09-06 18:28:26 +00:00
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ATTR_DEP extern u8* JZ8(u8 to);
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2010-04-25 00:31:27 +00:00
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// jg rel8
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2021-09-06 18:28:26 +00:00
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ATTR_DEP extern u8* JG8(u8 to);
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2010-04-25 00:31:27 +00:00
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// jge rel8
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2021-09-06 18:28:26 +00:00
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ATTR_DEP extern u8* JGE8(u8 to);
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2010-04-25 00:31:27 +00:00
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// js rel8
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2021-09-06 18:28:26 +00:00
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ATTR_DEP extern u8* JS8(u8 to);
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2010-04-25 00:31:27 +00:00
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// jns rel8
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2021-09-06 18:28:26 +00:00
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ATTR_DEP extern u8* JNS8(u8 to);
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2010-04-25 00:31:27 +00:00
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// jl rel8
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2021-09-06 18:28:26 +00:00
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ATTR_DEP extern u8* JL8(u8 to);
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2010-04-25 00:31:27 +00:00
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// ja rel8
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2021-09-06 18:28:26 +00:00
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ATTR_DEP extern u8* JA8(u8 to);
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2010-04-25 00:31:27 +00:00
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// jae rel8
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2021-09-06 18:28:26 +00:00
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ATTR_DEP extern u8* JAE8(u8 to);
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2010-04-25 00:31:27 +00:00
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// jb rel8
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2021-09-06 18:28:26 +00:00
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ATTR_DEP extern u8* JB8(u8 to);
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2010-04-25 00:31:27 +00:00
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// jbe rel8
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2021-09-06 18:28:26 +00:00
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ATTR_DEP extern u8* JBE8(u8 to);
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2010-04-25 00:31:27 +00:00
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// jle rel8
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2021-09-06 18:28:26 +00:00
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ATTR_DEP extern u8* JLE8(u8 to);
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2010-04-25 00:31:27 +00:00
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// jne rel8
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2021-09-06 18:28:26 +00:00
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ATTR_DEP extern u8* JNE8(u8 to);
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2010-04-25 00:31:27 +00:00
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// jnz rel8
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2021-09-06 18:28:26 +00:00
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ATTR_DEP extern u8* JNZ8(u8 to);
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2010-04-25 00:31:27 +00:00
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// jng rel8
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2021-09-06 18:28:26 +00:00
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ATTR_DEP extern u8* JNG8(u8 to);
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2010-04-25 00:31:27 +00:00
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// jnge rel8
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2021-09-06 18:28:26 +00:00
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ATTR_DEP extern u8* JNGE8(u8 to);
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2010-04-25 00:31:27 +00:00
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// jnl rel8
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2021-09-06 18:28:26 +00:00
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ATTR_DEP extern u8* JNL8(u8 to);
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2010-04-25 00:31:27 +00:00
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// jnle rel8
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2021-09-06 18:28:26 +00:00
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ATTR_DEP extern u8* JNLE8(u8 to);
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2010-04-25 00:31:27 +00:00
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// jo rel8
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2021-09-06 18:28:26 +00:00
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ATTR_DEP extern u8* JO8(u8 to);
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2010-04-25 00:31:27 +00:00
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// jno rel8
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2021-09-06 18:28:26 +00:00
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ATTR_DEP extern u8* JNO8(u8 to);
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2009-04-14 01:26:57 +00:00
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/*
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// jb rel16
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2015-11-19 23:47:46 +00:00
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ATTR_DEP extern u16* JA16( u16 to );
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2009-04-14 01:26:57 +00:00
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// jb rel16
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2015-11-19 23:47:46 +00:00
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ATTR_DEP extern u16* JB16( u16 to );
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2009-04-14 01:26:57 +00:00
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// je rel16
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2015-11-19 23:47:46 +00:00
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ATTR_DEP extern u16* JE16( u16 to );
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2009-04-14 01:26:57 +00:00
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// jz rel16
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2015-11-19 23:47:46 +00:00
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ATTR_DEP extern u16* JZ16( u16 to );
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2009-04-14 01:26:57 +00:00
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*/
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2010-04-25 00:31:27 +00:00
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// jns rel32
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2021-09-06 18:28:26 +00:00
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ATTR_DEP extern u32* JNS32(u32 to);
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2010-04-25 00:31:27 +00:00
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// js rel32
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2021-09-06 18:28:26 +00:00
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ATTR_DEP extern u32* JS32(u32 to);
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2009-04-14 01:26:57 +00:00
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2010-04-25 00:31:27 +00:00
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// jb rel32
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2021-09-06 18:28:26 +00:00
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ATTR_DEP extern u32* JB32(u32 to);
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2010-04-25 00:31:27 +00:00
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// je rel32
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2021-09-06 18:28:26 +00:00
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ATTR_DEP extern u32* JE32(u32 to);
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2010-04-25 00:31:27 +00:00
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// jz rel32
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2021-09-06 18:28:26 +00:00
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ATTR_DEP extern u32* JZ32(u32 to);
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2010-04-25 00:31:27 +00:00
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// jg rel32
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2021-09-06 18:28:26 +00:00
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ATTR_DEP extern u32* JG32(u32 to);
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2010-04-25 00:31:27 +00:00
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// jge rel32
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2021-09-06 18:28:26 +00:00
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ATTR_DEP extern u32* JGE32(u32 to);
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2010-04-25 00:31:27 +00:00
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// jl rel32
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2021-09-06 18:28:26 +00:00
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ATTR_DEP extern u32* JL32(u32 to);
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2010-04-25 00:31:27 +00:00
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// jle rel32
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2021-09-06 18:28:26 +00:00
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ATTR_DEP extern u32* JLE32(u32 to);
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2010-04-25 00:31:27 +00:00
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// jae rel32
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2021-09-06 18:28:26 +00:00
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ATTR_DEP extern u32* JAE32(u32 to);
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2010-04-25 00:31:27 +00:00
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// jne rel32
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2021-09-06 18:28:26 +00:00
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ATTR_DEP extern u32* JNE32(u32 to);
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2010-04-25 00:31:27 +00:00
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// jnz rel32
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2021-09-06 18:28:26 +00:00
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ATTR_DEP extern u32* JNZ32(u32 to);
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2010-04-25 00:31:27 +00:00
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// jng rel32
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2021-09-06 18:28:26 +00:00
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ATTR_DEP extern u32* JNG32(u32 to);
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2010-04-25 00:31:27 +00:00
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// jnge rel32
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2021-09-06 18:28:26 +00:00
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ATTR_DEP extern u32* JNGE32(u32 to);
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2010-04-25 00:31:27 +00:00
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// jnl rel32
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2021-09-06 18:28:26 +00:00
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ATTR_DEP extern u32* JNL32(u32 to);
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2010-04-25 00:31:27 +00:00
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// jnle rel32
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2021-09-06 18:28:26 +00:00
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ATTR_DEP extern u32* JNLE32(u32 to);
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2010-04-25 00:31:27 +00:00
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// jo rel32
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2021-09-06 18:28:26 +00:00
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ATTR_DEP extern u32* JO32(u32 to);
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2010-04-25 00:31:27 +00:00
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// jno rel32
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2021-09-06 18:28:26 +00:00
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ATTR_DEP extern u32* JNO32(u32 to);
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2009-04-14 01:26:57 +00:00
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// js rel32
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2021-09-06 18:28:26 +00:00
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ATTR_DEP extern u32* JS32(u32 to);
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2009-04-14 01:26:57 +00:00
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//******************
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2010-04-25 00:31:27 +00:00
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// FPU instructions
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2009-04-14 01:26:57 +00:00
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//******************
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2010-04-25 00:31:27 +00:00
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// fld m32 to fpu reg stack
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2016-11-12 15:28:37 +00:00
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ATTR_DEP extern void FLD32(u32 from);
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2009-04-14 01:26:57 +00:00
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// fld st(i)
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2015-11-19 23:47:46 +00:00
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ATTR_DEP extern void FLD(int st);
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2009-04-14 01:26:57 +00:00
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// fld1 (push +1.0f on the stack)
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2015-11-19 23:47:46 +00:00
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ATTR_DEP extern void FLD1();
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2009-04-14 01:26:57 +00:00
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// fld1 (push log_2 e on the stack)
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2015-11-19 23:47:46 +00:00
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ATTR_DEP extern void FLDL2E();
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2010-04-25 00:31:27 +00:00
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// fstp m32 from fpu reg stack
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2016-11-12 15:28:37 +00:00
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ATTR_DEP extern void FSTP32(u32 to);
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2009-04-14 01:26:57 +00:00
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// fstp st(i)
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2015-11-19 23:47:46 +00:00
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ATTR_DEP extern void FSTP(int st);
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2009-04-14 01:26:57 +00:00
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// frndint
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2015-11-19 23:47:46 +00:00
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ATTR_DEP extern void FRNDINT();
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ATTR_DEP extern void FXCH(int st);
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ATTR_DEP extern void F2XM1();
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ATTR_DEP extern void FSCALE();
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2009-04-14 01:26:57 +00:00
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2010-04-25 00:31:27 +00:00
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// fadd ST(0) to fpu reg stack ST(src)
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2016-11-12 15:28:37 +00:00
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ATTR_DEP extern void FADD320toR(x86IntRegType src);
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2010-04-25 00:31:27 +00:00
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// fsub ST(src) to fpu reg stack ST(0)
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2016-11-12 15:28:37 +00:00
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ATTR_DEP extern void FSUB32Rto0(x86IntRegType src);
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2009-04-14 01:26:57 +00:00
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2010-04-25 00:31:27 +00:00
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// fmul m32 to fpu reg stack
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2016-11-12 15:28:37 +00:00
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ATTR_DEP extern void FMUL32(u32 from);
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2010-04-25 00:31:27 +00:00
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// fdiv m32 to fpu reg stack
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2016-11-12 15:28:37 +00:00
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ATTR_DEP extern void FDIV32(u32 from);
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2010-04-25 00:31:27 +00:00
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// ftan fpu reg stack
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2016-11-12 15:28:37 +00:00
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ATTR_DEP extern void FPATAN(void);
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2010-04-25 00:31:27 +00:00
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// fsin fpu reg stack
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2016-11-12 15:28:37 +00:00
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ATTR_DEP extern void FSIN(void);
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2009-04-14 01:26:57 +00:00
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//*********************
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// SSE instructions *
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//*********************
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2016-11-12 15:28:37 +00:00
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ATTR_DEP extern void SSE_MAXSS_XMM_to_XMM(x86SSERegType to, x86SSERegType from);
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ATTR_DEP extern void SSE_MINSS_XMM_to_XMM(x86SSERegType to, x86SSERegType from);
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ATTR_DEP extern void SSE_ADDSS_XMM_to_XMM(x86SSERegType to, x86SSERegType from);
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ATTR_DEP extern void SSE_SUBSS_XMM_to_XMM(x86SSERegType to, x86SSERegType from);
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2009-04-14 01:26:57 +00:00
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//*********************
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// SSE 2 Instructions*
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//*********************
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2016-11-12 15:28:37 +00:00
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ATTR_DEP extern void SSE2_MAXSD_XMM_to_XMM(x86SSERegType to, x86SSERegType from);
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ATTR_DEP extern void SSE2_MINSD_XMM_to_XMM(x86SSERegType to, x86SSERegType from);
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ATTR_DEP extern void SSE2_ADDSD_XMM_to_XMM(x86SSERegType to, x86SSERegType from);
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ATTR_DEP extern void SSE2_SUBSD_XMM_to_XMM(x86SSERegType to, x86SSERegType from);
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