2023-12-22 11:57:49 +00:00
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// SPDX-FileCopyrightText: 2002-2023 PCSX2 Dev Team
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// SPDX-License-Identifier: LGPL-3.0+
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2009-04-16 22:38:55 +00:00
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#pragma once
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2016-11-12 15:28:37 +00:00
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namespace x86Emitter
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2009-04-16 22:38:55 +00:00
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{
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2016-11-12 15:28:37 +00:00
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2021-09-06 18:28:26 +00:00
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enum G3Type
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{
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G3Type_NOT = 2,
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G3Type_NEG = 3,
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G3Type_MUL = 4,
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G3Type_iMUL = 5, // partial implementation, iMul has additional forms in ix86.cpp
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G3Type_DIV = 6,
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G3Type_iDIV = 7
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};
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// --------------------------------------------------------------------------------------
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// xImpl_Group3
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// --------------------------------------------------------------------------------------
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struct xImpl_Group3
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{
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G3Type InstType;
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2009-04-16 22:38:55 +00:00
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2021-09-06 18:28:26 +00:00
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void operator()(const xRegisterInt& from) const;
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void operator()(const xIndirect64orLess& from) const;
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2009-07-03 00:49:40 +00:00
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2009-11-06 21:45:30 +00:00
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#if 0
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template< typename T >
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void operator()( const xDirectOrIndirect<T>& from ) const
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2009-07-03 00:49:40 +00:00
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{
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_DoI_helpermess( *this, from );
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}
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2009-11-06 21:45:30 +00:00
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#endif
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2021-09-06 18:28:26 +00:00
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};
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// --------------------------------------------------------------------------------------
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// xImpl_MulDivBase
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// --------------------------------------------------------------------------------------
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// This class combines x86 and SSE/SSE2 instructions for iMUL and iDIV.
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//
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struct xImpl_MulDivBase
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{
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G3Type InstType;
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u16 OpcodeSSE;
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void operator()(const xRegisterInt& from) const;
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void operator()(const xIndirect64orLess& from) const;
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const xImplSimd_DestRegSSE PS;
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const xImplSimd_DestRegSSE PD;
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const xImplSimd_DestRegSSE SS;
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const xImplSimd_DestRegSSE SD;
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};
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// --------------------------------------------------------------------------------------
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// xImpl_iDiv
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// --------------------------------------------------------------------------------------
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struct xImpl_iDiv
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{
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void operator()(const xRegisterInt& from) const;
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void operator()(const xIndirect64orLess& from) const;
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const xImplSimd_DestRegSSE PS;
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const xImplSimd_DestRegSSE PD;
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const xImplSimd_DestRegSSE SS;
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const xImplSimd_DestRegSSE SD;
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};
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// --------------------------------------------------------------------------------------
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// xImpl_iMul
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// --------------------------------------------------------------------------------------
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//
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struct xImpl_iMul
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{
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void operator()(const xRegisterInt& from) const;
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void operator()(const xIndirect64orLess& from) const;
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// The following iMul-specific forms are valid for 16 and 32 bit register operands only!
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void operator()(const xRegister32& to, const xRegister32& from) const;
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void operator()(const xRegister32& to, const xIndirectVoid& src) const;
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void operator()(const xRegister16& to, const xRegister16& from) const;
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void operator()(const xRegister16& to, const xIndirectVoid& src) const;
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void operator()(const xRegister32& to, const xRegister32& from, s32 imm) const;
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void operator()(const xRegister32& to, const xIndirectVoid& from, s32 imm) const;
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void operator()(const xRegister16& to, const xRegister16& from, s16 imm) const;
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void operator()(const xRegister16& to, const xIndirectVoid& from, s16 imm) const;
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const xImplSimd_DestRegSSE PS;
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const xImplSimd_DestRegSSE PD;
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const xImplSimd_DestRegSSE SS;
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const xImplSimd_DestRegSSE SD;
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};
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} // namespace x86Emitter
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