2024-07-30 11:42:36 +00:00
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// SPDX-FileCopyrightText: 2002-2024 PCSX2 Dev Team
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// SPDX-License-Identifier: GPL-3.0+
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2009-04-15 21:00:32 +00:00
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#pragma once
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2016-11-12 15:28:37 +00:00
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namespace x86Emitter
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2009-04-15 21:00:32 +00:00
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{
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2016-11-12 15:28:37 +00:00
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2021-09-06 18:28:26 +00:00
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enum G2Type
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{
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G2Type_ROL = 0,
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G2Type_ROR,
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G2Type_RCL,
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G2Type_RCR,
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G2Type_SHL,
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G2Type_SHR,
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G2Type_Unused,
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G2Type_SAR
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};
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// --------------------------------------------------------------------------------------
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// xImpl_Group2
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// --------------------------------------------------------------------------------------
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// Group 2 (shift) instructions have no Sib/ModRM forms.
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// Optimization Note: For Imm forms, we ignore the instruction if the shift count is zero.
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// This is a safe optimization since any zero-value shift does not affect any flags.
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//
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struct xImpl_Group2
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{
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G2Type InstType;
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2009-04-15 21:00:32 +00:00
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2021-09-06 18:28:26 +00:00
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void operator()(const xRegisterInt& to, const xRegisterCL& from) const;
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void operator()(const xIndirect64orLess& to, const xRegisterCL& from) const;
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void operator()(const xRegisterInt& to, u8 imm) const;
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void operator()(const xIndirect64orLess& to, u8 imm) const;
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2009-04-15 21:00:32 +00:00
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2009-11-06 21:45:30 +00:00
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#if 0
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2009-07-03 00:49:40 +00:00
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// ------------------------------------------------------------------------
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template< typename T > __noinline void operator()( const xDirectOrIndirect<T>& to, u8 imm ) const
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{
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_DoI_helpermess( *this, to, imm );
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}
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template< typename T > __noinline void operator()( const xDirectOrIndirect<T>& to, const xRegisterCL& from ) const
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{
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_DoI_helpermess( *this, to, from );
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}
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2009-11-06 21:45:30 +00:00
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#endif
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2021-09-06 18:28:26 +00:00
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};
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2009-11-06 21:45:30 +00:00
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} // End namespace x86Emitter
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