2024-07-30 11:42:36 +00:00
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// SPDX-FileCopyrightText: 2002-2024 PCSX2 Dev Team
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// SPDX-License-Identifier: GPL-3.0+
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2015-12-09 22:51:51 +00:00
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#pragma once
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// Implement BMI1/BMI2 instruction set
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2016-11-12 15:28:37 +00:00
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namespace x86Emitter
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{
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2021-09-06 18:28:26 +00:00
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struct xImplBMI_RVM
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{
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u8 Prefix;
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u8 MbPrefix;
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u8 Opcode;
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// RVM
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// MULX Unsigned multiply without affecting flags, and arbitrary destination registers
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// PDEP Parallel bits deposit
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// PEXT Parallel bits extract
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// ANDN Logical and not ~x & y
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void operator()(const xRegisterInt& to, const xRegisterInt& from1, const xRegisterInt& from2) const;
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void operator()(const xRegisterInt& to, const xRegisterInt& from1, const xIndirectVoid& from2) const;
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2015-12-09 22:51:51 +00:00
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#if 0
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// RMV
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// BEXTR Bit field extract (with register) (src >> start) & ((1 << len)-1)[9]
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// BZHI Zero high bits starting with specified bit position
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// SARX Shift arithmetic right without affecting flags
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// SHRX Shift logical right without affecting flags
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// SHLX Shift logical left without affecting flags
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// FIXME: WARNING same as above but V and M are inverted
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//void operator()( const xRegisterInt& to, const xRegisterInt& from1, const xRegisterInt& from2) const;
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//void operator()( const xRegisterInt& to, const xIndirectVoid& from1, const xRegisterInt& from2) const;
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// VM
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// BLSI Extract lowest set isolated bit x & -x
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// BLSMSK Get mask up to lowest set bit x ^ (x - 1)
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// BLSR Reset lowest set bit x & (x - 1)
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void operator()( const xRegisterInt& to, const xRegisterInt& from) const;
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void operator()( const xRegisterInt& to, const xIndirectVoid& from) const;
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// RMI
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//RORX Rotate right logical without affecting flags
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void operator()( const xRegisterInt& to, const xRegisterInt& from, u8 imm) const;
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void operator()( const xRegisterInt& to, const xIndirectVoid& from, u8 imm) const;
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#endif
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2021-09-06 18:28:26 +00:00
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};
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} // namespace x86Emitter
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