Jeffrey Pfau
|
86c228f2e4
|
Implement SMLAL
|
2013-05-02 00:29:06 -07:00 |
Jeffrey Pfau
|
61c6b7186e
|
Implement UMLAL
|
2013-05-01 23:11:00 -07:00 |
Jeffrey Pfau
|
cd73c562ea
|
Implement addressing mode 1 LSL/LSR with register
|
2013-05-01 23:08:22 -07:00 |
Jeffrey Pfau
|
da489b90f8
|
Ensure shifter carry-out gets bits set right
|
2013-04-30 21:02:56 -07:00 |
Jeffrey Pfau
|
118c393d1b
|
Fix addressing mode 2 register post-indexed
|
2013-04-30 02:43:12 -07:00 |
Jeffrey Pfau
|
337d4dc1e6
|
Implement addressing mode 1 ROR with register
|
2013-04-30 02:42:54 -07:00 |
Jeffrey Pfau
|
e1963c6e60
|
Implement SMULL
|
2013-04-30 01:42:24 -07:00 |
Jeffrey Pfau
|
e86f7d79fb
|
Clean up and fix conditions for CPSR V
|
2013-04-28 00:19:15 -07:00 |
Jeffrey Pfau
|
19f9b72c33
|
Fix CPSR C being written
|
2013-04-28 00:06:13 -07:00 |
Jeffrey Pfau
|
682684cb6d
|
Output MUL into the right register
|
2013-04-27 23:44:33 -07:00 |
Jeffrey Pfau
|
2c8786ae4c
|
Use LE instead of GE where appropriate
|
2013-04-27 23:44:17 -07:00 |
Jeffrey Pfau
|
2e78381e55
|
Implement SWI
|
2013-04-27 02:56:34 -07:00 |
Jeffrey Pfau
|
6c44cf8dfc
|
Implement BL
|
2013-04-27 02:54:16 -07:00 |
Jeffrey Pfau
|
2fc5474d91
|
Implement addressing mode 1 ROR immediate
|
2013-04-27 01:54:57 -07:00 |
Jeffrey Pfau
|
13c95a2aae
|
Build fixes for linux
|
2013-04-26 03:08:59 -07:00 |
Jeffrey Pfau
|
18fae08450
|
Fix Load/store shifters
|
2013-04-20 14:21:42 -07:00 |
Jeffrey Pfau
|
cd0f75c83f
|
Implement MLA
|
2013-04-20 13:36:42 -07:00 |
Jeffrey Pfau
|
bf54a68b0e
|
Implement UMULL
|
2013-04-20 13:22:10 -07:00 |
Jeffrey Pfau
|
adfd8f6872
|
Make sure if we reset the CPSR to the SPSR that we check if we get tossed into Thumb
|
2013-04-19 21:26:00 -07:00 |
Jeffrey Pfau
|
5f1f6088bd
|
Implement MUL
|
2013-04-18 01:35:48 -07:00 |
Jeffrey Pfau
|
0048de2108
|
Fix addressing mode 3 immediate
|
2013-04-18 01:06:19 -07:00 |
Jeffrey Pfau
|
062e09ccf5
|
Implement MSRI
|
2013-04-18 00:09:28 -07:00 |
Jeffrey Pfau
|
fdf36f5820
|
Implement MRS
|
2013-04-18 00:06:48 -07:00 |
Jeffrey Pfau
|
b3832205fc
|
Fix some MRS/MSR encoding problems
|
2013-04-18 00:03:39 -07:00 |
Jeffrey Pfau
|
6608ae282c
|
Ensure loads to PC work
|
2013-04-17 23:54:31 -07:00 |
Jeffrey Pfau
|
cb03781a5b
|
Implement LDM, STM
|
2013-04-17 23:44:35 -07:00 |
Jeffrey Pfau
|
bc9d0690bb
|
Clean up extra backslashes
|
2013-04-16 19:29:00 -07:00 |
Jeffrey Pfau
|
ecc4775c31
|
Start implementing instruction timing
|
2013-04-14 23:12:03 -07:00 |
Jeffrey Pfau
|
1ca6487151
|
Create subdirs
|
2013-04-14 13:04:24 -07:00 |