Commit Graph

37 Commits

Author SHA1 Message Date
Jeffrey Pfau 823b97603a Properly account for LDR I cycles (fixes #90) 2014-07-19 00:39:51 -07:00
Jeffrey Pfau e89a705419 Revise macros for stricter C99 conformance 2014-07-15 23:30:55 -07:00
Jeffrey Pfau 939c349533 Slightly more accurate waitstate emulation 2014-07-13 22:21:37 -07:00
Jeffrey Pfau aefa5f0ab8 Merge branch 'decoder'
Conflicts:
	src/debugger/cli-debugger.c
2014-07-12 00:40:40 -07:00
Jeffrey Pfau 0f68dbc832 Redo component model/type punning 2014-04-20 00:19:55 -07:00
Jeffrey Pfau c0eb7c81f7 Remove ARMMemory and ARMBoard shims 2014-04-19 18:14:17 -07:00
Jeffrey Pfau 5d19919df2 Extract emittor macros into headers 2014-03-29 22:59:39 -07:00
Jeffrey Pfau 52808da265 Inline CPU stepping 2014-01-21 22:36:40 -08:00
Jeffrey Pfau a969d70de3 Handle illegal and stub opcodes separately 2014-01-18 00:39:51 -08:00
Jeffrey Pfau 915b04dded Add support for PowerPC to the memory and CPU interfaces 2013-10-26 01:53:13 -04:00
Jeffrey Pfau 3e3bb58ae5 Minor timing fixes 2013-10-08 02:10:43 -07:00
Jeffrey Pfau 25885e1e82 Invalid memory reads 2013-09-27 23:48:56 -07:00
Jeffrey Pfau 99769695d7 Fix ADCS C bit 2013-09-26 00:25:48 -07:00
Jeffrey Pfau a6d87bbfb9 Better cycle counting for STR 2013-05-11 18:01:16 -07:00
Jeffrey Pfau b6361cdfa9 Start LDM/STM timings 2013-05-11 17:05:57 -07:00
Jeffrey Pfau f6592b17b8 Implement MUL timings 2013-05-11 14:35:10 -07:00
Jeffrey Pfau fc7aec557b Count cycles for load/store singles 2013-05-04 23:57:12 -07:00
Jeffrey Pfau 13a46429e2 Remove -Wno-unused and fix resulting errors 2013-05-02 00:35:32 -07:00
Jeffrey Pfau 6450ce16b2 Fix LDR(3) 2013-04-28 01:33:45 -07:00
Jeffrey Pfau 19f9b72c33 Fix CPSR C being written 2013-04-28 00:06:13 -07:00
Jeffrey Pfau bd9714b540 Implement STR(2)/STRH(2) 2013-04-27 02:42:42 -07:00
Jeffrey Pfau 13c95a2aae Build fixes for linux 2013-04-26 03:08:59 -07:00
Jeffrey Pfau 301c07dda3 Implement ADC, SBC 2013-04-26 01:25:31 -07:00
Jeffrey Pfau 65e0445375 Implement TST 2013-04-25 00:56:43 -07:00
Jeffrey Pfau cfc3ec4f3b Implement ROR 2013-04-25 00:53:24 -07:00
Jeffrey Pfau 21490dcf51 Implement CMN 2013-04-25 00:48:35 -07:00
Jeffrey Pfau 190f9b41e6 Implement STRB(2) 2013-04-23 02:13:59 -07:00
Jeffrey Pfau 67d25794e1 Fix LDMIA/STMIA 2013-04-20 18:03:59 -07:00
Jeffrey Pfau 14100f19d1 Implement LSL(2) 2013-04-20 18:03:48 -07:00
Jeffrey Pfau e272481ccd Implement LDR(2) 2013-04-20 02:57:20 -07:00
Jeffrey Pfau 783b2a3e09 Implement ADD(5) 2013-04-18 01:24:46 -07:00
Jeffrey Pfau c143dec77d Fix ADD(4) and MOV(3) 2013-04-16 23:52:30 -07:00
Jeffrey Pfau 4b4914afb6 Implement MUL 2013-04-16 23:26:49 -07:00
Jeffrey Pfau 6b07dd33af Implement ASR(1) 2013-04-16 23:24:19 -07:00
Jeffrey Pfau bc9d0690bb Clean up extra backslashes 2013-04-16 19:29:00 -07:00
Jeffrey Pfau ecc4775c31 Start implementing instruction timing 2013-04-14 23:12:03 -07:00
Jeffrey Pfau 1ca6487151 Create subdirs 2013-04-14 13:04:24 -07:00