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Remove checks for ARM writeback operations that fail on real hardware

This commit is contained in:
Jeffrey Pfau 2014-01-20 15:10:41 -08:00
parent 35a5e83465
commit fede211874
1 changed files with 1 additions and 8 deletions
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9
src/arm/isa-arm.c
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@ -532,7 +532,6 @@ void ARMStep(struct ARMCore* cpu) {
DEFINE_INSTRUCTION_ARM(NAME, \ DEFINE_INSTRUCTION_ARM(NAME, \
int rn = (opcode >> 16) & 0xF; \ int rn = (opcode >> 16) & 0xF; \
int rs = opcode & 0x0000FFFF; \ int rs = opcode & 0x0000FFFF; \
int writeback = 1; \
int m; \ int m; \
int i; \ int i; \
int total = 0; \ int total = 0; \
@ -542,9 +541,7 @@ void ARMStep(struct ARMCore* cpu) {
S_POST; \ S_POST; \
currentCycles += cpu->memory->waitMultiple(cpu->memory, addr, total); \ currentCycles += cpu->memory->waitMultiple(cpu->memory, addr, total); \
POST_BODY; \ POST_BODY; \
if (writeback) { \ WRITEBACK;)
WRITEBACK; \
})
#define DEFINE_LOAD_STORE_MULTIPLE_INSTRUCTION_ARM(NAME, BODY, POST_BODY) \ #define DEFINE_LOAD_STORE_MULTIPLE_INSTRUCTION_ARM(NAME, BODY, POST_BODY) \
@ -703,10 +700,6 @@ DEFINE_LOAD_STORE_MULTIPLE_INSTRUCTION_ARM(LDM,
++currentCycles; ++currentCycles;
if (rs & 0x8000) { if (rs & 0x8000) {
ARM_WRITE_PC; ARM_WRITE_PC;
}
int rnx = 1 << rn;
if (rnx & rs && ((rnx - 1) & rs)) {
writeback = 0;
}) })
DEFINE_LOAD_STORE_MULTIPLE_INSTRUCTION_ARM(STM, DEFINE_LOAD_STORE_MULTIPLE_INSTRUCTION_ARM(STM,