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EEPROM only works in DMAs

This commit is contained in:
Jeffrey Pfau 2013-04-27 20:39:14 -07:00
parent 4380ec0260
commit f4fa423135
1 changed files with 33 additions and 12 deletions
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27
src/gba/gba-memory.c
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@ -129,7 +129,9 @@ int32_t GBALoad32(struct ARMMemory* memory, uint32_t address) {
case BASE_CART1_EX: case BASE_CART1_EX:
case BASE_CART2: case BASE_CART2:
case BASE_CART2_EX: case BASE_CART2_EX:
if ((address & (SIZE_CART0 - 1)) < gbaMemory->romSize) {
return gbaMemory->rom[(address & (SIZE_CART0 - 1)) >> 2]; return gbaMemory->rom[(address & (SIZE_CART0 - 1)) >> 2];
}
case BASE_CART_SRAM: case BASE_CART_SRAM:
break; break;
default: default:
@ -163,7 +165,9 @@ int16_t GBALoad16(struct ARMMemory* memory, uint32_t address) {
case BASE_CART1_EX: case BASE_CART1_EX:
case BASE_CART2: case BASE_CART2:
case BASE_CART2_EX: case BASE_CART2_EX:
if ((address & (SIZE_CART0 - 1)) < gbaMemory->romSize) {
return ((int16_t*) gbaMemory->rom)[(address & (SIZE_CART0 - 1)) >> 1]; return ((int16_t*) gbaMemory->rom)[(address & (SIZE_CART0 - 1)) >> 1];
}
case BASE_CART_SRAM: case BASE_CART_SRAM:
break; break;
default: default:
@ -196,12 +200,9 @@ uint16_t GBALoadU16(struct ARMMemory* memory, uint32_t address) {
case BASE_CART1: case BASE_CART1:
case BASE_CART1_EX: case BASE_CART1_EX:
case BASE_CART2: case BASE_CART2:
return ((uint16_t*) gbaMemory->rom)[(address & (SIZE_CART0 - 1)) >> 1];
case BASE_CART2_EX: case BASE_CART2_EX:
if ((address & (SIZE_CART0 - 1)) < gbaMemory->romSize) { if ((address & (SIZE_CART0 - 1)) < gbaMemory->romSize) {
return ((uint16_t*) gbaMemory->rom)[(address & (SIZE_CART0 - 1)) >> 1]; return ((uint16_t*) gbaMemory->rom)[(address & (SIZE_CART0 - 1)) >> 1];
} else {
return GBASavedataReadEEPROM(&gbaMemory->savedata);
} }
case BASE_CART_SRAM: case BASE_CART_SRAM:
break; break;
@ -236,7 +237,9 @@ int8_t GBALoad8(struct ARMMemory* memory, uint32_t address) {
case BASE_CART1_EX: case BASE_CART1_EX:
case BASE_CART2: case BASE_CART2:
case BASE_CART2_EX: case BASE_CART2_EX:
if ((address & (SIZE_CART0 - 1)) < gbaMemory->romSize) {
return ((int8_t*) gbaMemory->rom)[address & (SIZE_CART0 - 1)]; return ((int8_t*) gbaMemory->rom)[address & (SIZE_CART0 - 1)];
}
case BASE_CART_SRAM: case BASE_CART_SRAM:
if (gbaMemory->savedata.type == SAVEDATA_NONE) { if (gbaMemory->savedata.type == SAVEDATA_NONE) {
GBASavedataInitSRAM(&gbaMemory->savedata); GBASavedataInitSRAM(&gbaMemory->savedata);
@ -275,7 +278,9 @@ uint8_t GBALoadU8(struct ARMMemory* memory, uint32_t address) {
case BASE_CART1_EX: case BASE_CART1_EX:
case BASE_CART2: case BASE_CART2:
case BASE_CART2_EX: case BASE_CART2_EX:
if ((address & (SIZE_CART0 - 1)) < gbaMemory->romSize) {
return ((uint8_t*) gbaMemory->rom)[address & (SIZE_CART0 - 1)]; return ((uint8_t*) gbaMemory->rom)[address & (SIZE_CART0 - 1)];
}
case BASE_CART_SRAM: case BASE_CART_SRAM:
if (gbaMemory->savedata.type == SAVEDATA_NONE) { if (gbaMemory->savedata.type == SAVEDATA_NONE) {
GBASavedataInitSRAM(&gbaMemory->savedata); GBASavedataInitSRAM(&gbaMemory->savedata);
@ -593,6 +598,21 @@ void GBAMemoryServiceDMA(struct GBAMemory* memory, int number, struct GBADMA* in
} }
} else { } else {
uint16_t word; uint16_t word;
if (source >> BASE_OFFSET == BASE_CART2_EX && memory->savedata.type == SAVEDATA_EEPROM) {
while (wordsRemaining--) {
word = GBASavedataReadEEPROM(&memory->savedata);
GBAStore16(&memory->d, dest, word);
source += sourceOffset;
dest += destOffset;
}
} else if (dest >> BASE_OFFSET == BASE_CART2_EX && memory->savedata.type == SAVEDATA_EEPROM) {
while (wordsRemaining--) {
word = GBALoadU16(&memory->d, source);
GBASavedataWriteEEPROM(&memory->savedata, word);
source += sourceOffset;
dest += destOffset;
}
} else {
while (wordsRemaining--) { while (wordsRemaining--) {
word = GBALoadU16(&memory->d, source); word = GBALoadU16(&memory->d, source);
GBAStore16(&memory->d, dest, word); GBAStore16(&memory->d, dest, word);
@ -600,6 +620,7 @@ void GBAMemoryServiceDMA(struct GBAMemory* memory, int number, struct GBADMA* in
dest += destOffset; dest += destOffset;
} }
} }
}
if (info->doIrq) { if (info->doIrq) {
info->nextIRQ = memory->p->cpu.cycles + 2; info->nextIRQ = memory->p->cpu.cycles + 2;