mirror of https://github.com/mgba-emu/mgba.git
DS: Merge GBA and DS timers
This commit is contained in:
Jeffrey Pfau
parent
e0ae2e8906
commit
d620a8c38c
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@ -10,8 +10,8 @@
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CXX_GUARD_START
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#include <mgba/internal/arm/arm.h>
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#include <mgba/core/log.h>
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#include <mgba/core/timing.h>
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#include <mgba/internal/ds/memory.h>
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#include <mgba/internal/ds/timer.h>
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@ -46,6 +46,7 @@ enum DSIRQ {
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DS_IRQ_WIFI = 0x18,
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};
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struct ARMCore;
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struct DS;
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struct Patch;
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struct VFile;
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@ -62,15 +63,19 @@ struct DS {
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struct DSVideo video;
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int timersEnabled7;
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int timersEnabled9;
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struct DSTimer timers7[4];
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struct DSTimer timers9[4];
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struct GBATimer timers7[4];
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struct GBATimer timers9[4];
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struct mCoreSync* sync;
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struct mTiming timing7;
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struct mTiming timing9;
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struct ARMDebugger* debugger;
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int springIRQ7;
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int springIRQ9;
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bool cpuBlocked;
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bool earlyExit;
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uint32_t bios7Checksum;
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uint32_t bios9Checksum;
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@ -10,29 +10,12 @@
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CXX_GUARD_START
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DECL_BITFIELD(DSTimerFlags, uint32_t);
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DECL_BITS(DSTimerFlags, PrescaleBits, 0, 4);
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DECL_BIT(DSTimerFlags, CountUp, 4);
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DECL_BIT(DSTimerFlags, DoIrq, 5);
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DECL_BIT(DSTimerFlags, Enable, 6);
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#include <mgba/internal/gba/timer.h>
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struct DSTimer {
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uint16_t reload;
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uint16_t oldReload;
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int32_t lastEvent;
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int32_t nextEvent;
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int32_t overflowInterval;
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DSTimerFlags flags;
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};
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// TODO: Merge back into GBATimer
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struct ARMCore;
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void DSTimerUpdateRegister(struct DSTimer* timer, struct ARMCore* cpu, uint16_t* io);
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void DSTimerWriteTMCNT_LO(struct DSTimer* timer, uint16_t reload);
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void DSTimerWriteTMCNT_HI(struct DSTimer* timer, struct ARMCore* cpu, uint16_t* io, uint16_t control);
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struct DS;
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int32_t DSTimersProcessEvents(struct DS* ds, int32_t cycles);
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void DSTimerInit(struct DS* ds);
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void DSTimerWriteTMCNT_HI(struct GBATimer* timer, struct mTiming* timing, struct ARMCore* cpu, uint16_t* io, uint16_t control);
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CXX_GUARD_END
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@ -18,7 +18,6 @@ DECL_BIT(GBATimerFlags, CountUp, 4);
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DECL_BIT(GBATimerFlags, DoIrq, 5);
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DECL_BIT(GBATimerFlags, Enable, 6);
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struct GBA;
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struct GBATimer {
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uint16_t reload;
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uint16_t oldReload;
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@ -28,10 +27,16 @@ struct GBATimer {
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GBATimerFlags flags;
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};
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struct ARMCore;
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struct GBA;
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void GBATimerInit(struct GBA* gba);
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void GBATimerWriteTMCNT_LO(struct GBATimer* timer, uint16_t reload);
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void GBATimerWriteTMCNT_HI(struct GBATimer* timer, struct mTiming* timing, struct ARMCore* cpu, uint16_t* io, uint16_t control);
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void GBATimerUpdateRegister(struct GBA* gba, int timer);
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void GBATimerWriteTMCNT_LO(struct GBA* gba, int timer, uint16_t value);
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void GBATimerWriteTMCNT_HI(struct GBA* gba, int timer, uint16_t value);
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void GBATimerUpdateRegisterInternal(struct GBATimer* timer, struct mTiming* timing, struct ARMCore* cpu, uint16_t* io, int32_t skew);
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void GBATimerUpdateCountUp(struct mTiming* timing, struct GBATimer* nextTimer, uint16_t* io, uint32_t cyclesLate);
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void GBATimerUpdate(struct mTiming* timing, struct GBATimer* timer, uint16_t* io, uint32_t cyclesLate);
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CXX_GUARD_END
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54
src/ds/ds.c
54
src/ds/ds.c
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@ -80,10 +80,7 @@ static void DSInit(void* cpu, struct mCPUComponent* component) {
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ds->springIRQ7 = 0;
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ds->springIRQ9 = 0;
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ds->timersEnabled7 = 0;
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ds->timersEnabled9 = 0;
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memset(ds->timers7, 0, sizeof(ds->timers7));
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memset(ds->timers9, 0, sizeof(ds->timers9));
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DSTimerInit(ds);
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ds->keySource = NULL;
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ds->rtcSource = NULL;
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ds->rumble = NULL;
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@ -91,6 +88,9 @@ static void DSInit(void* cpu, struct mCPUComponent* component) {
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ds->romVf = NULL;
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ds->keyCallback = NULL;
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mTimingInit(&ds->timing7, &ds->arm7->cycles, &ds->arm7->nextEvent);
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mTimingInit(&ds->timing9, &ds->arm9->cycles, &ds->arm9->nextEvent);
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}
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void DSUnloadROM(struct DS* ds) {
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@ -103,6 +103,8 @@ void DSUnloadROM(struct DS* ds) {
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void DSDestroy(struct DS* ds) {
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DSUnloadROM(ds);
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DSMemoryDeinit(ds);
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mTimingDeinit(&ds->timing7);
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mTimingDeinit(&ds->timing9);
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}
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void DS7InterruptHandlerInit(struct ARMInterruptHandler* irqh) {
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@ -140,6 +142,7 @@ void DS7Reset(struct ARMCore* cpu) {
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cpu->gprs[ARM_SP] = DS7_SP_BASE;
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struct DS* ds = (struct DS*) cpu->master;
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mTimingClear(&ds->timing7);
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DSMemoryReset(ds);
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DS7IOInit(ds);
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@ -171,6 +174,7 @@ void DS9Reset(struct ARMCore* cpu) {
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cpu->gprs[ARM_SP] = DS9_SP_BASE;
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struct DS* ds = (struct DS*) cpu->master;
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mTimingClear(&ds->timing9);
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DS9IOInit(ds);
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struct DSCartridge* header = ds->romVf->map(ds->romVf, sizeof(*header), MAP_READ);
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@ -200,25 +204,37 @@ static void DSProcessEvents(struct ARMCore* cpu) {
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ds->springIRQ7 = 0;
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}
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int32_t cycles = cpu->nextEvent;
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int32_t nextEvent = INT_MAX;
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int32_t testEvent;
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int32_t nextEvent = cpu->nextEvent;
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while (cpu->cycles >= nextEvent) {
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int32_t cycles = cpu->cycles;
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cpu->cycles = 0;
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cpu->nextEvent = INT_MAX;
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#ifndef NDEBUG
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if (cycles < 0) {
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mLOG(DS, FATAL, "Negative cycles passed: %i", cycles);
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}
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if (cycles < 0) {
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mLOG(DS, FATAL, "Negative cycles passed: %i", cycles);
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}
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#endif
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nextEvent = cycles;
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do {
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nextEvent = mTimingTick(&ds->timing7, nextEvent);
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} while (ds->cpuBlocked);
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testEvent = DSTimersProcessEvents(ds, cycles);
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if (testEvent < nextEvent) {
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nextEvent = testEvent;
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}
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cpu->nextEvent = nextEvent;
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cpu->cycles -= cycles;
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cpu->nextEvent = nextEvent;
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if (cpu->halted) {
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cpu->cycles = cpu->nextEvent;
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if (ds->earlyExit) {
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ds->earlyExit = false;
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break;
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}
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if (cpu->halted) {
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cpu->cycles = nextEvent;
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}
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#ifndef NDEBUG
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else if (nextEvent < 0) {
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mLOG(DS, FATAL, "Negative cycles will pass: %i", nextEvent);
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}
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#endif
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}
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}
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32
src/ds/io.c
32
src/ds/io.c
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@ -26,41 +26,33 @@ void DS7IOWrite(struct DS* ds, uint32_t address, uint16_t value) {
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switch (address) {
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// Timers
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case DS7_REG_TM0CNT_LO:
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DSTimerWriteTMCNT_LO(&ds->timers7[0], value);
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GBATimerWriteTMCNT_LO(&ds->timers7[0], value);
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return;
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case DS7_REG_TM1CNT_LO:
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DSTimerWriteTMCNT_LO(&ds->timers7[1], value);
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GBATimerWriteTMCNT_LO(&ds->timers7[1], value);
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return;
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case DS7_REG_TM2CNT_LO:
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DSTimerWriteTMCNT_LO(&ds->timers7[2], value);
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GBATimerWriteTMCNT_LO(&ds->timers7[2], value);
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return;
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case DS7_REG_TM3CNT_LO:
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DSTimerWriteTMCNT_LO(&ds->timers7[3], value);
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GBATimerWriteTMCNT_LO(&ds->timers7[3], value);
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return;
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case DS7_REG_TM0CNT_HI:
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value &= 0x00C7;
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DSTimerWriteTMCNT_HI(&ds->timers7[0], ds->arm7, &ds->memory.io7[(address - 2) >> 1], value);
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ds->timersEnabled7 &= ~1;
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ds->timersEnabled7 |= DSTimerFlagsGetEnable(ds->timers7[0].flags);
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DSTimerWriteTMCNT_HI(&ds->timers7[0], &ds->timing7, ds->arm7, &ds->memory.io7[DS7_REG_TM0CNT_LO >> 1], value);
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break;
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case DS7_REG_TM1CNT_HI:
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value &= 0x00C7;
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DSTimerWriteTMCNT_HI(&ds->timers7[1], ds->arm7, &ds->memory.io7[(address - 2) >> 1], value);
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ds->timersEnabled7 &= ~2;
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ds->timersEnabled7 |= DSTimerFlagsGetEnable(ds->timers7[1].flags) << 1;
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DSTimerWriteTMCNT_HI(&ds->timers7[1], &ds->timing7, ds->arm7, &ds->memory.io7[DS7_REG_TM1CNT_LO >> 1], value);
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break;
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case DS7_REG_TM2CNT_HI:
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value &= 0x00C7;
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DSTimerWriteTMCNT_HI(&ds->timers7[2], ds->arm7, &ds->memory.io7[(address - 2) >> 1], value);
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ds->timersEnabled7 &= ~4;
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ds->timersEnabled7 |= DSTimerFlagsGetEnable(ds->timers7[2].flags) << 2;
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DSTimerWriteTMCNT_HI(&ds->timers7[2], &ds->timing7, ds->arm7, &ds->memory.io7[DS7_REG_TM2CNT_LO >> 1], value);
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break;
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case DS7_REG_TM3CNT_HI:
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value &= 0x00C7;
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DSTimerWriteTMCNT_HI(&ds->timers7[3], ds->arm7, &ds->memory.io7[(address - 2) >> 1], value);
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ds->timersEnabled7 &= ~8;
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ds->timersEnabled7 |= DSTimerFlagsGetEnable(ds->timers7[3].flags) << 3;
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DSTimerWriteTMCNT_HI(&ds->timers7[3], &ds->timing7, ds->arm7, &ds->memory.io7[DS7_REG_TM3CNT_LO >> 1], value);
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break;
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case DS7_REG_IPCSYNC:
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@ -113,16 +105,16 @@ void DS7IOWrite32(struct DS* ds, uint32_t address, uint32_t value) {
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uint16_t DS7IORead(struct DS* ds, uint32_t address) {
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switch (address) {
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case DS7_REG_TM0CNT_LO:
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DSTimerUpdateRegister(&ds->timers7[0], ds->arm7, &ds->memory.io7[address >> 1]);
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GBATimerUpdateRegisterInternal(&ds->timers7[0], &ds->timing7, ds->arm7, &ds->memory.io7[address >> 1], 0);
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break;
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case DS7_REG_TM1CNT_LO:
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DSTimerUpdateRegister(&ds->timers7[1], ds->arm7, &ds->memory.io7[address >> 1]);
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GBATimerUpdateRegisterInternal(&ds->timers7[1], &ds->timing7, ds->arm7, &ds->memory.io7[address >> 1], 0);
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break;
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case DS7_REG_TM2CNT_LO:
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DSTimerUpdateRegister(&ds->timers7[2], ds->arm7, &ds->memory.io7[address >> 1]);
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GBATimerUpdateRegisterInternal(&ds->timers7[2], &ds->timing7, ds->arm7, &ds->memory.io7[address >> 1], 0);
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break;
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case DS7_REG_TM3CNT_LO:
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DSTimerUpdateRegister(&ds->timers7[3], ds->arm7, &ds->memory.io7[address >> 1]);
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GBATimerUpdateRegisterInternal(&ds->timers7[3], &ds->timing7, ds->arm7, &ds->memory.io7[address >> 1], 0);
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break;
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case DS7_REG_TM0CNT_HI:
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161
src/ds/timer.c
161
src/ds/timer.c
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@ -8,103 +8,84 @@
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#include <mgba/internal/arm/arm.h>
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#include <mgba/internal/ds/ds.h>
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void DSTimerUpdateRegister(struct DSTimer* timer, struct ARMCore* cpu, uint16_t* io) {
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if (DSTimerFlagsIsEnable(timer->flags) && !DSTimerFlagsIsCountUp(timer->flags)) {
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// Reading this takes two cycles (1N+1I), so let's remove them preemptively
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*io = timer->oldReload + ((cpu->cycles - timer->lastEvent - 2) >> DSTimerFlagsGetPrescaleBits(timer->flags));
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static void DS7TimerUpdate0(struct mTiming* timing, void* context, uint32_t cyclesLate) {
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struct DS* ds = context;
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struct GBATimer* timer = &ds->timers7[0];
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if (GBATimerFlagsIsDoIrq(timer->flags)) {
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DSRaiseIRQ(ds->arm7, ds->memory.io7, DS_IRQ_TIMER0);
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}
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GBATimerUpdate(timing, &ds->timers7[0], &ds->memory.io7[DS7_REG_TM0CNT_LO >> 1], cyclesLate);
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GBATimerUpdateCountUp(timing, &ds->timers7[1], &ds->memory.io7[DS7_REG_TM1CNT_LO >> 1], cyclesLate);
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}
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void DSTimerWriteTMCNT_LO(struct DSTimer* timer, uint16_t reload) {
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timer->reload = reload;
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timer->overflowInterval = (0x10000 - timer->reload) << DSTimerFlagsGetPrescaleBits(timer->flags);
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static void DS7TimerUpdate1(struct mTiming* timing, void* context, uint32_t cyclesLate) {
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struct DS* ds = context;
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struct GBATimer* timer = &ds->timers7[1];
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if (GBATimerFlagsIsDoIrq(timer->flags)) {
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DSRaiseIRQ(ds->arm7, ds->memory.io7, DS_IRQ_TIMER1);
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}
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GBATimerUpdate(timing, &ds->timers7[1], &ds->memory.io7[DS7_REG_TM1CNT_LO >> 1], cyclesLate);
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GBATimerUpdateCountUp(timing, &ds->timers7[2], &ds->memory.io7[DS7_REG_TM2CNT_LO >> 1], cyclesLate);
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}
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void DSTimerWriteTMCNT_HI(struct DSTimer* timer, struct ARMCore* cpu, uint16_t* io, uint16_t control) {
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DSTimerUpdateRegister(timer, cpu, io);
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unsigned oldPrescale = DSTimerFlagsGetPrescaleBits(timer->flags);
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switch (control & 0x0003) {
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case 0x0000:
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timer->flags = DSTimerFlagsSetPrescaleBits(timer->flags, 0);
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break;
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case 0x0001:
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timer->flags = DSTimerFlagsSetPrescaleBits(timer->flags, 6);
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break;
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case 0x0002:
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timer->flags = DSTimerFlagsSetPrescaleBits(timer->flags, 8);
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break;
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case 0x0003:
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timer->flags = DSTimerFlagsSetPrescaleBits(timer->flags, 10);
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break;
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}
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timer->flags = DSTimerFlagsTestFillCountUp(timer->flags, control & 0x0004);
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timer->flags = DSTimerFlagsTestFillDoIrq(timer->flags, control & 0x0040);
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timer->overflowInterval = (0x10000 - timer->reload) << DSTimerFlagsGetPrescaleBits(timer->flags);
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bool wasEnabled = DSTimerFlagsIsEnable(timer->flags);
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timer->flags = DSTimerFlagsTestFillEnable(timer->flags, control & 0x0080);
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if (!wasEnabled && DSTimerFlagsIsEnable(timer->flags)) {
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if (!DSTimerFlagsIsCountUp(timer->flags)) {
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timer->nextEvent = cpu->cycles + timer->overflowInterval;
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} else {
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timer->nextEvent = INT_MAX;
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}
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*io = timer->reload;
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timer->oldReload = timer->reload;
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timer->lastEvent = cpu->cycles;
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} else if (wasEnabled && !DSTimerFlagsIsEnable(timer->flags)) {
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if (!DSTimerFlagsIsCountUp(timer->flags)) {
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*io = timer->oldReload + ((cpu->cycles - timer->lastEvent) >> oldPrescale);
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}
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} else if (DSTimerFlagsGetPrescaleBits(timer->flags) != oldPrescale && !DSTimerFlagsIsCountUp(timer->flags)) {
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// FIXME: this might be before present
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timer->nextEvent = timer->lastEvent + timer->overflowInterval;
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}
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if (timer->nextEvent < cpu->nextEvent) {
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cpu->nextEvent = timer->nextEvent;
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static void DS7TimerUpdate2(struct mTiming* timing, void* context, uint32_t cyclesLate) {
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struct DS* ds = context;
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struct GBATimer* timer = &ds->timers7[2];
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if (GBATimerFlagsIsDoIrq(timer->flags)) {
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DSRaiseIRQ(ds->arm7, ds->memory.io7, DS_IRQ_TIMER2);
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}
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GBATimerUpdate(timing, &ds->timers7[2], &ds->memory.io7[DS7_REG_TM2CNT_LO >> 1], cyclesLate);
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GBATimerUpdateCountUp(timing, &ds->timers7[3], &ds->memory.io7[DS7_REG_TM3CNT_LO >> 1], cyclesLate);
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}
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int32_t DSTimersProcessEvents(struct DS* ds, int32_t cycles) {
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int32_t nextEvent = INT_MAX;
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if (!ds->timersEnabled7) {
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return nextEvent;
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static void DS7TimerUpdate3(struct mTiming* timing, void* context, uint32_t cyclesLate) {
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struct DS* ds = context;
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struct GBATimer* timer = &ds->timers7[3];
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if (GBATimerFlagsIsDoIrq(timer->flags)) {
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DSRaiseIRQ(ds->arm7, ds->memory.io7, DS_IRQ_TIMER3);
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}
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struct DSTimer* timer;
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struct DSTimer* nextTimer;
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int t;
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for (t = 0; t < 4; ++t) {
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timer = &ds->timers7[t];
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if (DSTimerFlagsIsEnable(timer->flags)) {
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timer->nextEvent -= cycles;
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timer->lastEvent -= cycles;
|
||||
while (timer->nextEvent <= 0) {
|
||||
timer->lastEvent = timer->nextEvent;
|
||||
timer->nextEvent += timer->overflowInterval;
|
||||
ds->memory.io7[(DS7_REG_TM0CNT_LO + (t << 2)) >> 1] = timer->reload;
|
||||
timer->oldReload = timer->reload;
|
||||
|
||||
if (DSTimerFlagsIsDoIrq(timer->flags)) {
|
||||
DSRaiseIRQ(ds->arm7, ds->memory.io7, DS_IRQ_TIMER0);
|
||||
}
|
||||
|
||||
if (t == 3) {
|
||||
break;
|
||||
}
|
||||
|
||||
nextTimer = &ds->timers7[t + 1];
|
||||
if (DSTimerFlagsIsCountUp(nextTimer->flags)) {
|
||||
++ds->memory.io7[(DS7_REG_TM1CNT_LO + (t << 2)) >> 1];
|
||||
if (!ds->memory.io7[(DS7_REG_TM1CNT_LO + (t << 2)) >> 1]) {
|
||||
nextTimer->nextEvent = 0;
|
||||
}
|
||||
}
|
||||
}
|
||||
nextEvent = timer->nextEvent;
|
||||
}
|
||||
}
|
||||
return nextEvent;
|
||||
GBATimerUpdate(timing, &ds->timers7[3], &ds->memory.io7[DS7_REG_TM3CNT_LO >> 1], cyclesLate);
|
||||
}
|
||||
|
||||
void DSTimerInit(struct DS* ds) {
|
||||
memset(ds->timers7, 0, sizeof(ds->timers7));
|
||||
ds->timers7[0].event.name = "DS7 Timer 0";
|
||||
ds->timers7[0].event.callback = DS7TimerUpdate0;
|
||||
ds->timers7[0].event.context = ds;
|
||||
ds->timers7[0].event.priority = 0x20;
|
||||
ds->timers7[1].event.name = "DS7 Timer 1";
|
||||
ds->timers7[1].event.callback = DS7TimerUpdate1;
|
||||
ds->timers7[1].event.context = ds;
|
||||
ds->timers7[1].event.priority = 0x21;
|
||||
ds->timers7[2].event.name = "DS7 Timer 2";
|
||||
ds->timers7[2].event.callback = DS7TimerUpdate2;
|
||||
ds->timers7[2].event.context = ds;
|
||||
ds->timers7[2].event.priority = 0x22;
|
||||
ds->timers7[3].event.name = "DS7 Timer 3";
|
||||
ds->timers7[3].event.callback = DS7TimerUpdate3;
|
||||
ds->timers7[3].event.context = ds;
|
||||
ds->timers7[3].event.priority = 0x23;
|
||||
|
||||
memset(ds->timers9, 0, sizeof(ds->timers9));
|
||||
ds->timers9[0].event.name = "DS9 Timer 0";
|
||||
ds->timers9[0].event.callback = NULL;
|
||||
ds->timers9[0].event.context = ds;
|
||||
ds->timers9[0].event.priority = 0x20;
|
||||
ds->timers9[1].event.name = "DS9 Timer 1";
|
||||
ds->timers9[1].event.callback = NULL;
|
||||
ds->timers9[1].event.context = ds;
|
||||
ds->timers9[1].event.priority = 0x21;
|
||||
ds->timers9[2].event.name = "DS9 Timer 2";
|
||||
ds->timers9[2].event.callback = NULL;
|
||||
ds->timers9[2].event.context = ds;
|
||||
ds->timers9[2].event.priority = 0x22;
|
||||
ds->timers9[3].event.name = "DS9 Timer 3";
|
||||
ds->timers9[3].event.callback = NULL;
|
||||
ds->timers9[3].event.context = ds;
|
||||
ds->timers9[3].event.priority = 0x23;
|
||||
}
|
||||
|
||||
void DSTimerWriteTMCNT_HI(struct GBATimer* timer, struct mTiming* timing, struct ARMCore* cpu, uint16_t* io, uint16_t value) {
|
||||
GBATimerUpdateRegisterInternal(timer, timing, cpu, io, 0);
|
||||
GBATimerWriteTMCNT_HI(timer, timing, cpu, io, value);
|
||||
}
|
||||
|
|
|
|||
20
src/gba/io.c
20
src/gba/io.c
|
|
@ -487,33 +487,37 @@ void GBAIOWrite(struct GBA* gba, uint32_t address, uint16_t value) {
|
|||
|
||||
// Timers
|
||||
case REG_TM0CNT_LO:
|
||||
GBATimerWriteTMCNT_LO(gba, 0, value);
|
||||
GBATimerWriteTMCNT_LO(&gba->timers[0], value);
|
||||
return;
|
||||
case REG_TM1CNT_LO:
|
||||
GBATimerWriteTMCNT_LO(gba, 1, value);
|
||||
GBATimerWriteTMCNT_LO(&gba->timers[1], value);
|
||||
return;
|
||||
case REG_TM2CNT_LO:
|
||||
GBATimerWriteTMCNT_LO(gba, 2, value);
|
||||
GBATimerWriteTMCNT_LO(&gba->timers[2], value);
|
||||
return;
|
||||
case REG_TM3CNT_LO:
|
||||
GBATimerWriteTMCNT_LO(gba, 3, value);
|
||||
GBATimerWriteTMCNT_LO(&gba->timers[3], value);
|
||||
return;
|
||||
|
||||
case REG_TM0CNT_HI:
|
||||
value &= 0x00C7;
|
||||
GBATimerWriteTMCNT_HI(gba, 0, value);
|
||||
GBATimerUpdateRegister(gba, 0);
|
||||
GBATimerWriteTMCNT_HI(&gba->timers[0], &gba->timing, gba->cpu, &gba->memory.io[REG_TM0CNT_LO >> 1], value);
|
||||
break;
|
||||
case REG_TM1CNT_HI:
|
||||
value &= 0x00C7;
|
||||
GBATimerWriteTMCNT_HI(gba, 1, value);
|
||||
GBATimerUpdateRegister(gba, 1);
|
||||
GBATimerWriteTMCNT_HI(&gba->timers[1], &gba->timing, gba->cpu, &gba->memory.io[REG_TM1CNT_LO >> 1], value);
|
||||
break;
|
||||
case REG_TM2CNT_HI:
|
||||
value &= 0x00C7;
|
||||
GBATimerWriteTMCNT_HI(gba, 2, value);
|
||||
GBATimerUpdateRegister(gba, 2);
|
||||
GBATimerWriteTMCNT_HI(&gba->timers[2], &gba->timing, gba->cpu, &gba->memory.io[REG_TM2CNT_LO >> 1], value);
|
||||
break;
|
||||
case REG_TM3CNT_HI:
|
||||
value &= 0x00C7;
|
||||
GBATimerWriteTMCNT_HI(gba, 3, value);
|
||||
GBATimerUpdateRegister(gba, 3);
|
||||
GBATimerWriteTMCNT_HI(&gba->timers[3], &gba->timing, gba->cpu, &gba->memory.io[REG_TM3CNT_LO >> 1], value);
|
||||
break;
|
||||
|
||||
// SIO
|
||||
|
|
|
|||
151
src/gba/timer.c
151
src/gba/timer.c
|
|
@ -8,36 +8,33 @@
|
|||
#include <mgba/internal/gba/gba.h>
|
||||
#include <mgba/internal/gba/io.h>
|
||||
|
||||
static void GBATimerUpdate(struct mTiming* timing, struct GBA* gba, int timerId, uint32_t cyclesLate) {
|
||||
struct GBATimer* timer = &gba->timers[timerId];
|
||||
gba->memory.io[(REG_TM0CNT_LO >> 1) + (timerId << 1)] = timer->reload;
|
||||
static void GBATimerUpdateAudio(struct GBA* gba, int timerId, uint32_t cyclesLate) {
|
||||
if (!gba->audio.enable) {
|
||||
return;
|
||||
}
|
||||
if ((gba->audio.chALeft || gba->audio.chARight) && gba->audio.chATimer == timerId) {
|
||||
GBAAudioSampleFIFO(&gba->audio, 0, cyclesLate);
|
||||
}
|
||||
|
||||
if ((gba->audio.chBLeft || gba->audio.chBRight) && gba->audio.chBTimer == timerId) {
|
||||
GBAAudioSampleFIFO(&gba->audio, 1, cyclesLate);
|
||||
}
|
||||
}
|
||||
|
||||
void GBATimerUpdateCountUp(struct mTiming* timing, struct GBATimer* nextTimer, uint16_t* io, uint32_t cyclesLate) {
|
||||
if (GBATimerFlagsIsCountUp(nextTimer->flags)) { // TODO: Does this increment while disabled?
|
||||
++*io;
|
||||
if (!*io && GBATimerFlagsIsEnable(nextTimer->flags)) {
|
||||
mTimingSchedule(timing, &nextTimer->event, -cyclesLate);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
void GBATimerUpdate(struct mTiming* timing, struct GBATimer* timer, uint16_t* io, uint32_t cyclesLate) {
|
||||
*io = timer->reload;
|
||||
timer->oldReload = timer->reload;
|
||||
timer->lastEvent = timing->masterCycles - cyclesLate;
|
||||
|
||||
if (GBATimerFlagsIsDoIrq(timer->flags)) {
|
||||
GBARaiseIRQ(gba, IRQ_TIMER0 + timerId);
|
||||
}
|
||||
|
||||
if (gba->audio.enable && timerId < 2) {
|
||||
if ((gba->audio.chALeft || gba->audio.chARight) && gba->audio.chATimer == timerId) {
|
||||
GBAAudioSampleFIFO(&gba->audio, 0, cyclesLate);
|
||||
}
|
||||
|
||||
if ((gba->audio.chBLeft || gba->audio.chBRight) && gba->audio.chBTimer == timerId) {
|
||||
GBAAudioSampleFIFO(&gba->audio, 1, cyclesLate);
|
||||
}
|
||||
}
|
||||
|
||||
if (timerId < 4) {
|
||||
struct GBATimer* nextTimer = &gba->timers[timerId + 1];
|
||||
if (GBATimerFlagsIsCountUp(nextTimer->flags)) { // TODO: Does this increment while disabled?
|
||||
++gba->memory.io[(REG_TM1CNT_LO >> 1) + (timerId << 1)];
|
||||
if (!gba->memory.io[(REG_TM1CNT_LO >> 1) + (timerId << 1)] && GBATimerFlagsIsEnable(nextTimer->flags)) {
|
||||
mTimingSchedule(timing, &nextTimer->event, -cyclesLate);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
if (!GBATimerFlagsIsCountUp(timer->flags)) {
|
||||
uint32_t nextEvent = timer->overflowInterval - cyclesLate;
|
||||
mTimingSchedule(timing, &timer->event, nextEvent);
|
||||
|
|
@ -45,19 +42,44 @@ static void GBATimerUpdate(struct mTiming* timing, struct GBA* gba, int timerId,
|
|||
}
|
||||
|
||||
static void GBATimerUpdate0(struct mTiming* timing, void* context, uint32_t cyclesLate) {
|
||||
GBATimerUpdate(timing, context, 0, cyclesLate);
|
||||
struct GBA* gba = context;
|
||||
struct GBATimer* timer = &gba->timers[0];
|
||||
if (GBATimerFlagsIsDoIrq(timer->flags)) {
|
||||
GBARaiseIRQ(gba, IRQ_TIMER0);
|
||||
}
|
||||
GBATimerUpdateAudio(gba, 0, cyclesLate);
|
||||
GBATimerUpdate(timing, &gba->timers[0], &gba->memory.io[REG_TM0CNT_LO >> 1], cyclesLate);
|
||||
GBATimerUpdateCountUp(timing, &gba->timers[1], &gba->memory.io[REG_TM1CNT_LO >> 1], cyclesLate);
|
||||
}
|
||||
|
||||
static void GBATimerUpdate1(struct mTiming* timing, void* context, uint32_t cyclesLate) {
|
||||
GBATimerUpdate(timing, context, 1, cyclesLate);
|
||||
struct GBA* gba = context;
|
||||
struct GBATimer* timer = &gba->timers[1];
|
||||
if (GBATimerFlagsIsDoIrq(timer->flags)) {
|
||||
GBARaiseIRQ(gba, IRQ_TIMER1);
|
||||
}
|
||||
GBATimerUpdateAudio(gba, 1, cyclesLate);
|
||||
GBATimerUpdate(timing, &gba->timers[1], &gba->memory.io[REG_TM1CNT_LO >> 1], cyclesLate);
|
||||
GBATimerUpdateCountUp(timing, &gba->timers[2], &gba->memory.io[REG_TM2CNT_LO >> 1], cyclesLate);
|
||||
}
|
||||
|
||||
static void GBATimerUpdate2(struct mTiming* timing, void* context, uint32_t cyclesLate) {
|
||||
GBATimerUpdate(timing, context, 2, cyclesLate);
|
||||
struct GBA* gba = context;
|
||||
struct GBATimer* timer = &gba->timers[2];
|
||||
if (GBATimerFlagsIsDoIrq(timer->flags)) {
|
||||
GBARaiseIRQ(gba, IRQ_TIMER2);
|
||||
}
|
||||
GBATimerUpdate(timing, &gba->timers[2], &gba->memory.io[REG_TM2CNT_LO >> 1], cyclesLate);
|
||||
GBATimerUpdateCountUp(timing, &gba->timers[3], &gba->memory.io[REG_TM3CNT_LO >> 1], cyclesLate);
|
||||
}
|
||||
|
||||
static void GBATimerUpdate3(struct mTiming* timing, void* context, uint32_t cyclesLate) {
|
||||
GBATimerUpdate(timing, context, 3, cyclesLate);
|
||||
struct GBA* gba = context;
|
||||
struct GBATimer* timer = &gba->timers[3];
|
||||
if (GBATimerFlagsIsDoIrq(timer->flags)) {
|
||||
GBARaiseIRQ(gba, IRQ_TIMER3);
|
||||
}
|
||||
GBATimerUpdate(timing, &gba->timers[3], &gba->memory.io[REG_TM3CNT_LO >> 1], cyclesLate);
|
||||
}
|
||||
|
||||
void GBATimerInit(struct GBA* gba) {
|
||||
|
|
@ -87,56 +109,57 @@ void GBATimerUpdateRegister(struct GBA* gba, int timer) {
|
|||
if (gba->memory.lastPrefetchedPc >= (uint32_t) gba->cpu->gprs[ARM_PC]) {
|
||||
prefetchSkew = (gba->memory.lastPrefetchedPc - gba->cpu->gprs[ARM_PC]) * (gba->cpu->memory.activeSeqCycles16 + 1) / WORD_SIZE_THUMB;
|
||||
}
|
||||
// Reading this takes two cycles (1N+1I), so let's remove them preemptively
|
||||
int32_t diff = gba->cpu->cycles - (currentTimer->lastEvent - gba->timing.masterCycles);
|
||||
gba->memory.io[(REG_TM0CNT_LO + (timer << 2)) >> 1] = currentTimer->oldReload + ((diff - 2 + prefetchSkew) >> GBATimerFlagsGetPrescaleBits(currentTimer->flags));
|
||||
GBATimerUpdateRegisterInternal(currentTimer, &gba->timing, gba->cpu, &gba->memory.io[(REG_TM0CNT_LO + (timer << 2)) >> 1], prefetchSkew);
|
||||
}
|
||||
}
|
||||
|
||||
void GBATimerWriteTMCNT_LO(struct GBA* gba, int timer, uint16_t reload) {
|
||||
gba->timers[timer].reload = reload;
|
||||
gba->timers[timer].overflowInterval = (0x10000 - gba->timers[timer].reload) << GBATimerFlagsGetPrescaleBits(gba->timers[timer].flags);
|
||||
void GBATimerUpdateRegisterInternal(struct GBATimer* timer, struct mTiming* timing, struct ARMCore* cpu, uint16_t* io, int32_t skew) {
|
||||
// Reading this takes two cycles (1N+1I), so let's remove them preemptively
|
||||
int32_t diff = cpu->cycles - (timer->lastEvent - timing->masterCycles);
|
||||
*io = timer->oldReload + ((diff - 2 + skew) >> GBATimerFlagsGetPrescaleBits(timer->flags));
|
||||
}
|
||||
|
||||
void GBATimerWriteTMCNT_HI(struct GBA* gba, int timer, uint16_t control) {
|
||||
struct GBATimer* currentTimer = &gba->timers[timer];
|
||||
GBATimerUpdateRegister(gba, timer);
|
||||
void GBATimerWriteTMCNT_LO(struct GBATimer* timer, uint16_t reload) {
|
||||
timer->reload = reload;
|
||||
timer->overflowInterval = (0x10000 - timer->reload) << GBATimerFlagsGetPrescaleBits(timer->flags);
|
||||
}
|
||||
|
||||
unsigned oldPrescale = GBATimerFlagsGetPrescaleBits(currentTimer->flags);
|
||||
void GBATimerWriteTMCNT_HI(struct GBATimer* timer, struct mTiming* timing, struct ARMCore* cpu, uint16_t* io, uint16_t control) {
|
||||
unsigned oldPrescale = GBATimerFlagsGetPrescaleBits(timer->flags);
|
||||
switch (control & 0x0003) {
|
||||
case 0x0000:
|
||||
currentTimer->flags = GBATimerFlagsSetPrescaleBits(currentTimer->flags, 0);
|
||||
timer->flags = GBATimerFlagsSetPrescaleBits(timer->flags, 0);
|
||||
break;
|
||||
case 0x0001:
|
||||
currentTimer->flags = GBATimerFlagsSetPrescaleBits(currentTimer->flags, 6);
|
||||
timer->flags = GBATimerFlagsSetPrescaleBits(timer->flags, 6);
|
||||
break;
|
||||
case 0x0002:
|
||||
currentTimer->flags = GBATimerFlagsSetPrescaleBits(currentTimer->flags, 8);
|
||||
timer->flags = GBATimerFlagsSetPrescaleBits(timer->flags, 8);
|
||||
break;
|
||||
case 0x0003:
|
||||
currentTimer->flags = GBATimerFlagsSetPrescaleBits(currentTimer->flags, 10);
|
||||
timer->flags = GBATimerFlagsSetPrescaleBits(timer->flags, 10);
|
||||
break;
|
||||
}
|
||||
currentTimer->flags = GBATimerFlagsTestFillCountUp(currentTimer->flags, timer > 0 && (control & 0x0004));
|
||||
currentTimer->flags = GBATimerFlagsTestFillDoIrq(currentTimer->flags, control & 0x0040);
|
||||
currentTimer->overflowInterval = (0x10000 - currentTimer->reload) << GBATimerFlagsGetPrescaleBits(currentTimer->flags);
|
||||
bool wasEnabled = GBATimerFlagsIsEnable(currentTimer->flags);
|
||||
currentTimer->flags = GBATimerFlagsTestFillEnable(currentTimer->flags, control & 0x0080);
|
||||
if (!wasEnabled && GBATimerFlagsIsEnable(currentTimer->flags)) {
|
||||
mTimingDeschedule(&gba->timing, ¤tTimer->event);
|
||||
if (!GBATimerFlagsIsCountUp(currentTimer->flags)) {
|
||||
mTimingSchedule(&gba->timing, ¤tTimer->event, currentTimer->overflowInterval);
|
||||
timer->flags = GBATimerFlagsTestFillCountUp(timer->flags, timer > 0 && (control & 0x0004));
|
||||
timer->flags = GBATimerFlagsTestFillDoIrq(timer->flags, control & 0x0040);
|
||||
timer->overflowInterval = (0x10000 - timer->reload) << GBATimerFlagsGetPrescaleBits(timer->flags);
|
||||
bool wasEnabled = GBATimerFlagsIsEnable(timer->flags);
|
||||
timer->flags = GBATimerFlagsTestFillEnable(timer->flags, control & 0x0080);
|
||||
if (!wasEnabled && GBATimerFlagsIsEnable(timer->flags)) {
|
||||
mTimingDeschedule(timing, &timer->event);
|
||||
if (!GBATimerFlagsIsCountUp(timer->flags)) {
|
||||
mTimingSchedule(timing, &timer->event, timer->overflowInterval);
|
||||
}
|
||||
gba->memory.io[(REG_TM0CNT_LO + (timer << 2)) >> 1] = currentTimer->reload;
|
||||
currentTimer->oldReload = currentTimer->reload;
|
||||
currentTimer->lastEvent = gba->timing.masterCycles + gba->cpu->cycles;
|
||||
} else if (wasEnabled && !GBATimerFlagsIsEnable(currentTimer->flags)) {
|
||||
mTimingDeschedule(&gba->timing, ¤tTimer->event);
|
||||
if (!GBATimerFlagsIsCountUp(currentTimer->flags)) {
|
||||
gba->memory.io[(REG_TM0CNT_LO + (timer << 2)) >> 1] = currentTimer->oldReload + ((gba->cpu->cycles - currentTimer->lastEvent) >> oldPrescale);
|
||||
*io = timer->reload;
|
||||
timer->oldReload = timer->reload;
|
||||
timer->lastEvent = timing->masterCycles + cpu->cycles;
|
||||
} else if (wasEnabled && !GBATimerFlagsIsEnable(timer->flags)) {
|
||||
mTimingDeschedule(timing, &timer->event);
|
||||
if (!GBATimerFlagsIsCountUp(timer->flags)) {
|
||||
*io = timer->oldReload + ((cpu->cycles - timer->lastEvent) >> oldPrescale);
|
||||
}
|
||||
} else if (GBATimerFlagsIsEnable(currentTimer->flags) && GBATimerFlagsGetPrescaleBits(currentTimer->flags) != oldPrescale && !GBATimerFlagsIsCountUp(currentTimer->flags)) {
|
||||
mTimingDeschedule(&gba->timing, ¤tTimer->event);
|
||||
mTimingSchedule(&gba->timing, ¤tTimer->event, currentTimer->overflowInterval - currentTimer->lastEvent);
|
||||
} else if (GBATimerFlagsIsEnable(timer->flags) && GBATimerFlagsGetPrescaleBits(timer->flags) != oldPrescale && !GBATimerFlagsIsCountUp(timer->flags)) {
|
||||
mTimingDeschedule(timing, &timer->event);
|
||||
mTimingSchedule(timing, &timer->event, timer->overflowInterval - timer->lastEvent);
|
||||
}
|
||||
}
|
||||
|
|
|
|||
Loading…
Reference in New Issue