mirror of https://github.com/mgba-emu/mgba.git
Mirror SRAM across 0x0F000000
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bc03872ab5
commit
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@ -170,6 +170,7 @@ int32_t GBALoad32(struct ARMMemory* memory, uint32_t address, int* cycleCounter)
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}
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break;
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case BASE_CART_SRAM:
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case BASE_CART_SRAM_MIRROR:
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GBALog(gbaMemory->p, GBA_LOG_STUB, "Unimplemented memory Load32: 0x%08X", address);
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break;
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default:
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@ -251,6 +252,7 @@ int16_t GBALoad16(struct ARMMemory* memory, uint32_t address, int* cycleCounter)
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}
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break;
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case BASE_CART_SRAM:
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case BASE_CART_SRAM_MIRROR:
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GBALog(gbaMemory->p, GBA_LOG_STUB, "Unimplemented memory Load16: 0x%08X", address);
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break;
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default:
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@ -319,6 +321,7 @@ int8_t GBALoad8(struct ARMMemory* memory, uint32_t address, int* cycleCounter) {
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}
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break;
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case BASE_CART_SRAM:
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case BASE_CART_SRAM_MIRROR:
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wait = gbaMemory->waitstates16[address >> BASE_OFFSET];
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if (gbaMemory->savedata.type == SAVEDATA_NONE) {
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GBASavedataInitSRAM(&gbaMemory->savedata);
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@ -375,6 +378,7 @@ void GBAStore32(struct ARMMemory* memory, uint32_t address, int32_t value, int*
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GBALog(gbaMemory->p, GBA_LOG_STUB, "Unimplemented memory Store32: 0x%08X", address);
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break;
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case BASE_CART_SRAM:
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case BASE_CART_SRAM_MIRROR:
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GBALog(gbaMemory->p, GBA_LOG_STUB, "Unimplemented memory Store32: 0x%08X", address);
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break;
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default:
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@ -430,6 +434,7 @@ void GBAStore16(struct ARMMemory* memory, uint32_t address, int16_t value, int*
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GBASavedataWriteEEPROM(&gbaMemory->savedata, value, 1);
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break;
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case BASE_CART_SRAM:
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case BASE_CART_SRAM_MIRROR:
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GBALog(gbaMemory->p, GBA_LOG_STUB, "Unimplemented memory Store16: 0x%08X", address);
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break;
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default:
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@ -476,6 +481,7 @@ void GBAStore8(struct ARMMemory* memory, uint32_t address, int8_t value, int* cy
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GBALog(gbaMemory->p, GBA_LOG_STUB, "Unimplemented memory Store8: 0x%08X", address);
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break;
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case BASE_CART_SRAM:
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case BASE_CART_SRAM_MIRROR:
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if (gbaMemory->savedata.type == SAVEDATA_NONE) {
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if (address == SAVEDATA_FLASH_BASE) {
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GBASavedataInitFlash(&gbaMemory->savedata);
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@ -517,10 +523,10 @@ void GBAAdjustWaitstates(struct GBAMemory* memory, uint16_t parameters) {
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int ws2seq = (parameters & 0x0400) >> 10;
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int prefetch = parameters & 0x4000;
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memory->waitstates16[REGION_CART_SRAM] = GBA_ROM_WAITSTATES[sram];
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memory->waitstatesSeq16[REGION_CART_SRAM] = GBA_ROM_WAITSTATES[sram];
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memory->waitstates32[REGION_CART_SRAM] = 2 * GBA_ROM_WAITSTATES[sram] + 1;
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memory->waitstatesSeq32[REGION_CART_SRAM] = 2 * GBA_ROM_WAITSTATES[sram] + 1;
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memory->waitstates16[REGION_CART_SRAM] = memory->waitstates16[REGION_CART_SRAM_MIRROR] = GBA_ROM_WAITSTATES[sram];
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memory->waitstatesSeq16[REGION_CART_SRAM] = memory->waitstatesSeq16[REGION_CART_SRAM_MIRROR] = GBA_ROM_WAITSTATES[sram];
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memory->waitstates32[REGION_CART_SRAM] = memory->waitstates32[REGION_CART_SRAM_MIRROR] = 2 * GBA_ROM_WAITSTATES[sram] + 1;
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memory->waitstatesSeq32[REGION_CART_SRAM] = memory->waitstatesSeq32[REGION_CART_SRAM_MIRROR] = 2 * GBA_ROM_WAITSTATES[sram] + 1;
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memory->waitstates16[REGION_CART0] = memory->waitstates16[REGION_CART0_EX] = GBA_ROM_WAITSTATES[ws0];
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memory->waitstates16[REGION_CART1] = memory->waitstates16[REGION_CART1_EX] = GBA_ROM_WAITSTATES[ws1];
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@ -22,7 +22,8 @@ enum GBAMemoryRegion {
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REGION_CART1_EX = 0xB,
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REGION_CART2 = 0xC,
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REGION_CART2_EX = 0xD,
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REGION_CART_SRAM = 0xE
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REGION_CART_SRAM = 0xE,
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REGION_CART_SRAM_MIRROR = 0xF
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};
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enum GBAMemoryBase {
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@ -39,7 +40,8 @@ enum GBAMemoryBase {
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BASE_CART1_EX = 0x0B000000,
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BASE_CART2 = 0x0C000000,
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BASE_CART2_EX = 0x0D000000,
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BASE_CART_SRAM = 0x0E000000
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BASE_CART_SRAM = 0x0E000000,
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BASE_CART_SRAM_MIRROR = 0x0F000000
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};
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enum {
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