mirror of https://github.com/mgba-emu/mgba.git
DS Slot-1: Detect Flash
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bd80056758
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@ -147,6 +147,11 @@ static uint8_t _slot1SPIAutodetect(struct DSCommon* dscore, uint8_t datum) {
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dscore->p->memory.slot1.spiAddress |= datum;
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dscore->p->memory.slot1.spiAddress |= datum;
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dscore->p->memory.slot1.spiAddressingRemaining -= 8;
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dscore->p->memory.slot1.spiAddressingRemaining -= 8;
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return 0xFF;
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return 0xFF;
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} else if (dscore->p->memory.slot1.spiAddress & 1) {
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dscore->p->memory.slot1.spiAddress <<= 8;
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dscore->p->memory.slot1.spiAddress |= datum;
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dscore->p->memory.slot1.savedataType = DS_SAVEDATA_FLASH;
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return 0xFF;
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} else {
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} else {
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if (!_slot1GuaranteeSize(&dscore->p->memory.slot1)) {
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if (!_slot1GuaranteeSize(&dscore->p->memory.slot1)) {
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return 0xFF;
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return 0xFF;
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@ -164,6 +169,34 @@ static uint8_t _slot1SPIAutodetect(struct DSCommon* dscore, uint8_t datum) {
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return 0xFF;
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return 0xFF;
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}
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}
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static uint8_t _slot1SPIFlash(struct DSCommon* dscore, uint8_t datum) {
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DSSlot1AUXSPICNT control = dscore->memory.io[DS_REG_AUXSPICNT >> 1];
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if (dscore->p->memory.slot1.spiAddressingRemaining) {
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dscore->p->memory.slot1.spiAddress <<= 8;
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dscore->p->memory.slot1.spiAddress |= datum;
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dscore->p->memory.slot1.spiAddressingRemaining -= 8;
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return 0xFF;
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} else {
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if (!_slot1GuaranteeSize(&dscore->p->memory.slot1)) {
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return 0xFF;
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}
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}
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switch (dscore->p->memory.slot1.spiCommand) {
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case 0x03: // RD
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return dscore->p->memory.slot1.spiData[dscore->p->memory.slot1.spiAddress++];
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case 0x02: // WR
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dscore->p->memory.slot1.spiData[dscore->p->memory.slot1.spiAddress] = datum;
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++dscore->p->memory.slot1.spiAddress;
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break;
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default:
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mLOG(DS_SLOT1, STUB, "Unimplemented SPI Flash write: %04X:%02X:%02X", control, dscore->p->memory.slot1.spiCommand, datum);
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break;
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}
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return 0xFF;
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}
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static void _slot1SPI(struct mTiming* timing, void* context, uint32_t cyclesLate) {
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static void _slot1SPI(struct mTiming* timing, void* context, uint32_t cyclesLate) {
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UNUSED(timing);
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UNUSED(timing);
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UNUSED(cyclesLate);
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UNUSED(cyclesLate);
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@ -179,7 +212,14 @@ static void _slot1SPI(struct mTiming* timing, void* context, uint32_t cyclesLate
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dscore->p->memory.slot1.savedataType = DS_SAVEDATA_EEPROM512;
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dscore->p->memory.slot1.savedataType = DS_SAVEDATA_EEPROM512;
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}
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}
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dscore->p->memory.slot1.spiAddress = 0;
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dscore->p->memory.slot1.spiAddress = 0;
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switch (dscore->p->memory.slot1.savedataType) {
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case DS_SAVEDATA_FLASH:
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dscore->p->memory.slot1.spiAddressingRemaining = 24;
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break;
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default:
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dscore->p->memory.slot1.spiAddressingRemaining = 16;
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dscore->p->memory.slot1.spiAddressingRemaining = 16;
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break;
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}
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} else {
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} else {
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switch (dscore->p->memory.slot1.spiCommand) {
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switch (dscore->p->memory.slot1.spiCommand) {
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case 0x04: // WRDI
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case 0x04: // WRDI
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@ -196,6 +236,9 @@ static void _slot1SPI(struct mTiming* timing, void* context, uint32_t cyclesLate
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case DS_SAVEDATA_AUTODETECT:
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case DS_SAVEDATA_AUTODETECT:
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newValue = _slot1SPIAutodetect(dscore, oldValue);
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newValue = _slot1SPIAutodetect(dscore, oldValue);
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break;
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break;
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case DS_SAVEDATA_FLASH:
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newValue = _slot1SPIFlash(dscore, oldValue);
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break;
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default:
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default:
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mLOG(DS_SLOT1, STUB, "Unimplemented SPI write: %04X:%02X", control, oldValue);
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mLOG(DS_SLOT1, STUB, "Unimplemented SPI write: %04X:%02X", control, oldValue);
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break;
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break;
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