mirror of https://github.com/mgba-emu/mgba.git
LR35902: Fix IRQs and RST
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c9d0f651b6
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@ -163,7 +163,6 @@ void GBUpdateIRQs(struct GB* gb) {
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return;
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return;
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}
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}
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gb->cpu->irqh.setInterrupts(gb->cpu, false);
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if (irqs & (1 << GB_IRQ_VBLANK)) {
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if (irqs & (1 << GB_IRQ_VBLANK)) {
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LR35902RaiseIRQ(gb->cpu, GB_VECTOR_VBLANK);
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LR35902RaiseIRQ(gb->cpu, GB_VECTOR_VBLANK);
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gb->memory.io[REG_IF] &= ~(1 << GB_IRQ_VBLANK);
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gb->memory.io[REG_IF] &= ~(1 << GB_IRQ_VBLANK);
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@ -732,14 +732,30 @@ DEFINE_INSTRUCTION_LR35902(DI, cpu->irqh.setInterrupts(cpu, false));
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DEFINE_INSTRUCTION_LR35902(EI, cpu->irqh.setInterrupts(cpu, true));
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DEFINE_INSTRUCTION_LR35902(EI, cpu->irqh.setInterrupts(cpu, true));
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DEFINE_INSTRUCTION_LR35902(HALT, cpu->irqh.halt(cpu));
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DEFINE_INSTRUCTION_LR35902(HALT, cpu->irqh.halt(cpu));
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DEFINE_INSTRUCTION_LR35902(RST00, LR35902RaiseIRQ(cpu, 0x00));
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#define DEFINE_RST_INSTRUCTION_LR35902(VEC) \
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DEFINE_INSTRUCTION_LR35902(RST08, LR35902RaiseIRQ(cpu, 0x08));
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DEFINE_INSTRUCTION_LR35902(RST ## VEC ## UpdateSPL, \
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DEFINE_INSTRUCTION_LR35902(RST10, LR35902RaiseIRQ(cpu, 0x10));
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cpu->pc = 0x ## VEC; \
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DEFINE_INSTRUCTION_LR35902(RST18, LR35902RaiseIRQ(cpu, 0x18));
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cpu->executionState = LR35902_CORE_STALL;) \
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DEFINE_INSTRUCTION_LR35902(RST20, LR35902RaiseIRQ(cpu, 0x20));
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DEFINE_INSTRUCTION_LR35902(RST ## VEC ## UpdateSPH, \
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DEFINE_INSTRUCTION_LR35902(RST28, LR35902RaiseIRQ(cpu, 0x28));
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cpu->index = cpu->sp + 1; \
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DEFINE_INSTRUCTION_LR35902(RST30, LR35902RaiseIRQ(cpu, 0x30));
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cpu->bus = (cpu->pc + 2) >> 8; \
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DEFINE_INSTRUCTION_LR35902(RST38, LR35902RaiseIRQ(cpu, 0x38));
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cpu->executionState = LR35902_CORE_MEMORY_STORE; \
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cpu->instruction = _LR35902InstructionRST ## VEC ## UpdateSPL;) \
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DEFINE_INSTRUCTION_LR35902(RST ## VEC, \
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cpu->sp -= 2; /* TODO: Atomic incrementing? */ \
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cpu->index = cpu->sp; \
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cpu->bus = cpu->pc; \
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cpu->executionState = LR35902_CORE_MEMORY_STORE; \
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cpu->instruction = _LR35902InstructionRST ## VEC ## UpdateSPH;)
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DEFINE_RST_INSTRUCTION_LR35902(00);
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DEFINE_RST_INSTRUCTION_LR35902(08);
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DEFINE_RST_INSTRUCTION_LR35902(10);
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DEFINE_RST_INSTRUCTION_LR35902(18);
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DEFINE_RST_INSTRUCTION_LR35902(20);
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DEFINE_RST_INSTRUCTION_LR35902(28);
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DEFINE_RST_INSTRUCTION_LR35902(30);
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DEFINE_RST_INSTRUCTION_LR35902(38);
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DEFINE_INSTRUCTION_LR35902(STUB, cpu->irqh.hitStub(cpu));
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DEFINE_INSTRUCTION_LR35902(STUB, cpu->irqh.hitStub(cpu));
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@ -90,6 +90,7 @@ static void _LR35902InstructionIRQ(struct LR35902Core* cpu) {
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cpu->bus = cpu->pc;
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cpu->bus = cpu->pc;
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cpu->executionState = LR35902_CORE_MEMORY_STORE;
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cpu->executionState = LR35902_CORE_MEMORY_STORE;
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cpu->instruction = _LR35902InstructionIRQFinish;
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cpu->instruction = _LR35902InstructionIRQFinish;
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cpu->irqh.setInterrupts(cpu, false);
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}
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}
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void LR35902Tick(struct LR35902Core* cpu) {
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void LR35902Tick(struct LR35902Core* cpu) {
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