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ARM: Prevent register check code from being inlined

This commit is contained in:
Vicki Pfau 2018-02-15 22:15:45 -08:00
parent dc753d8117
commit c57968d26f
2 changed files with 25 additions and 11 deletions
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2
include/mgba-util/common.h
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@ -191,9 +191,11 @@ typedef intptr_t ssize_t;
#ifdef _MSC_VER #ifdef _MSC_VER
#define ATTRIBUTE_UNUSED #define ATTRIBUTE_UNUSED
#define ATTRIBUTE_FORMAT(X, Y, Z) #define ATTRIBUTE_FORMAT(X, Y, Z)
#define ATTRIBUTE_NOINLINE
#else #else
#define ATTRIBUTE_UNUSED __attribute__((unused)) #define ATTRIBUTE_UNUSED __attribute__((unused))
#define ATTRIBUTE_FORMAT(X, Y, Z) __attribute__((format(X, Y, Z))) #define ATTRIBUTE_FORMAT(X, Y, Z) __attribute__((format(X, Y, Z)))
#define ATTRIBUTE_NOINLINE __attribute__((noinline))
#endif #endif
#define DECL_BITFIELD(NAME, TYPE) typedef TYPE NAME #define DECL_BITFIELD(NAME, TYPE) typedef TYPE NAME

34
src/arm/isa-arm.c
View File

@ -184,15 +184,32 @@ static inline void _immediate(struct ARMCore* cpu, uint32_t opcode) {
// Instruction definitions // Instruction definitions
// Beware pre-processor antics // Beware pre-processor antics
ATTRIBUTE_NOINLINE static void _additionS(struct ARMCore* cpu, int32_t m, int32_t n, int32_t d) {
cpu->cpsr.n = ARM_SIGN(d);
cpu->cpsr.z = !d;
cpu->cpsr.c = ARM_CARRY_FROM(m, n, d);
cpu->cpsr.v = ARM_V_ADDITION(m, n, d);
}
ATTRIBUTE_NOINLINE static void _subtractionS(struct ARMCore* cpu, int32_t m, int32_t n, int32_t d) {
cpu->cpsr.n = ARM_SIGN(d);
cpu->cpsr.z = !d;
cpu->cpsr.c = ARM_BORROW_FROM(m, n, d);
cpu->cpsr.v = ARM_V_SUBTRACTION(m, n, d);
}
ATTRIBUTE_NOINLINE static void _neutralS(struct ARMCore* cpu, int32_t d) {
cpu->cpsr.n = ARM_SIGN(d);
cpu->cpsr.z = !d; \
cpu->cpsr.c = cpu->shifterCarryOut; \
}
#define ARM_ADDITION_S(M, N, D) \ #define ARM_ADDITION_S(M, N, D) \
if (rd == ARM_PC && _ARMModeHasSPSR(cpu->cpsr.priv)) { \ if (rd == ARM_PC && _ARMModeHasSPSR(cpu->cpsr.priv)) { \
cpu->cpsr = cpu->spsr; \ cpu->cpsr = cpu->spsr; \
_ARMReadCPSR(cpu); \ _ARMReadCPSR(cpu); \
} else { \ } else { \
cpu->cpsr.n = ARM_SIGN(D); \ _additionS(cpu, M, N, D); \
cpu->cpsr.z = !(D); \
cpu->cpsr.c = ARM_CARRY_FROM(M, N, D); \
cpu->cpsr.v = ARM_V_ADDITION(M, N, D); \
} }
#define ARM_SUBTRACTION_S(M, N, D) \ #define ARM_SUBTRACTION_S(M, N, D) \
@ -200,10 +217,7 @@ static inline void _immediate(struct ARMCore* cpu, uint32_t opcode) {
cpu->cpsr = cpu->spsr; \ cpu->cpsr = cpu->spsr; \
_ARMReadCPSR(cpu); \ _ARMReadCPSR(cpu); \
} else { \ } else { \
cpu->cpsr.n = ARM_SIGN(D); \ _subtractionS(cpu, M, N, D); \
cpu->cpsr.z = !(D); \
cpu->cpsr.c = ARM_BORROW_FROM(M, N, D); \
cpu->cpsr.v = ARM_V_SUBTRACTION(M, N, D); \
} }
#define ARM_SUBTRACTION_CARRY_S(M, N, D, C) \ #define ARM_SUBTRACTION_CARRY_S(M, N, D, C) \
@ -222,9 +236,7 @@ static inline void _immediate(struct ARMCore* cpu, uint32_t opcode) {
cpu->cpsr = cpu->spsr; \ cpu->cpsr = cpu->spsr; \
_ARMReadCPSR(cpu); \ _ARMReadCPSR(cpu); \
} else { \ } else { \
cpu->cpsr.n = ARM_SIGN(D); \ _neutralS(cpu, D); \
cpu->cpsr.z = !(D); \
cpu->cpsr.c = cpu->shifterCarryOut; \
} }
#define ARM_NEUTRAL_HI_S(DLO, DHI) \ #define ARM_NEUTRAL_HI_S(DLO, DHI) \