diff --git a/CHANGES b/CHANGES
index d6e0f8bad..20c55cb1b 100644
--- a/CHANGES
+++ b/CHANGES
@@ -22,6 +22,7 @@ Bugfixes:
  - Qt: Fix race condition with setting sample rate
  - GBA Memory: Fix timing of DMAs
  - ARM7: Fix STRT/STRBT
+ - ARM7: Implement undefined STRH/LDRH versions
 Misc:
  - GBA Audio: Implement missing flags on SOUNDCNT_X register
 
diff --git a/src/arm/emitter-arm.h b/src/arm/emitter-arm.h
index 4b71cb35e..a690616a0 100644
--- a/src/arm/emitter-arm.h
+++ b/src/arm/emitter-arm.h
@@ -76,20 +76,20 @@
 #define DECLARE_ARM_EMITTER_BLOCK(EMITTER) \
 	DECLARE_ARM_ALU_BLOCK(EMITTER, AND, MUL, STRH, ILL, ILL), \
 	DECLARE_ARM_ALU_BLOCK(EMITTER, ANDS, MULS, LDRH, LDRSB, LDRSH), \
-	DECLARE_ARM_ALU_BLOCK(EMITTER, EOR, MLA, ILL, ILL, ILL), \
-	DECLARE_ARM_ALU_BLOCK(EMITTER, EORS, MLAS, ILL, ILL, ILL), \
+	DECLARE_ARM_ALU_BLOCK(EMITTER, EOR, MLA, STRH, ILL, ILL), \
+	DECLARE_ARM_ALU_BLOCK(EMITTER, EORS, MLAS, LDRH, ILL, ILL), \
 	DECLARE_ARM_ALU_BLOCK(EMITTER, SUB, ILL, STRHI, ILL, ILL), \
 	DECLARE_ARM_ALU_BLOCK(EMITTER, SUBS, ILL, LDRHI, LDRSBI, LDRSHI), \
-	DECLARE_ARM_ALU_BLOCK(EMITTER, RSB, ILL, ILL, ILL, ILL), \
+	DECLARE_ARM_ALU_BLOCK(EMITTER, RSB, ILL, LDRHI, ILL, ILL), \
 	DECLARE_ARM_ALU_BLOCK(EMITTER, RSBS, ILL, ILL, ILL, ILL), \
 	DECLARE_ARM_ALU_BLOCK(EMITTER, ADD, UMULL, STRHU, ILL, ILL), \
 	DECLARE_ARM_ALU_BLOCK(EMITTER, ADDS, UMULLS, LDRHU, LDRSBU, LDRSHU), \
-	DECLARE_ARM_ALU_BLOCK(EMITTER, ADC, UMLAL, ILL, ILL, ILL), \
-	DECLARE_ARM_ALU_BLOCK(EMITTER, ADCS, UMLALS, ILL, ILL, ILL), \
+	DECLARE_ARM_ALU_BLOCK(EMITTER, ADC, UMLAL, STRHU, ILL, ILL), \
+	DECLARE_ARM_ALU_BLOCK(EMITTER, ADCS, UMLALS, LDRHU, ILL, ILL), \
 	DECLARE_ARM_ALU_BLOCK(EMITTER, SBC, SMULL, STRHIU, ILL, ILL), \
 	DECLARE_ARM_ALU_BLOCK(EMITTER, SBCS, SMULLS, LDRHIU, LDRSBIU, LDRSHIU), \
-	DECLARE_ARM_ALU_BLOCK(EMITTER, RSC, SMLAL, ILL, ILL, ILL), \
-	DECLARE_ARM_ALU_BLOCK(EMITTER, RSCS, SMLALS, ILL, ILL, ILL), \
+	DECLARE_ARM_ALU_BLOCK(EMITTER, RSC, SMLAL, STRHIU, ILL, ILL), \
+	DECLARE_ARM_ALU_BLOCK(EMITTER, RSCS, SMLALS, LDRHIU, ILL, ILL), \
 	DECLARE_INSTRUCTION_ARM(EMITTER, MRS), \
 	DECLARE_INSTRUCTION_ARM(EMITTER, ILL), \
 	DECLARE_INSTRUCTION_ARM(EMITTER, ILL), \