DS I/O: Stub out bad IRQ register and cart bus

This commit is contained in:
Vicki Pfau 2017-02-17 12:50:01 -08:00
parent fdae17020d
commit c483a402e9
2 changed files with 30 additions and 18 deletions

View File

@ -73,6 +73,24 @@ enum DSIORegisters {
DS_REG_IPCFIFORECV_LO = 0x100000,
DS_REG_IPCFIFORECV_HI = 0x100002,
// Game card
DS_REG_AUXSPICNT = 0x1A0,
DS_REG_AUXSPIDATA = 0x1A2,
DS_REG_SLOT1CNT_LO = 0x1A4,
DS_REG_SLOT1CNT_HI = 0x1A6,
DS_REG_SLOT1CMD_0 = 0x1A8,
DS_REG_SLOT1CMD_1 = 0x1A9,
DS_REG_SLOT1CMD_2 = 0x1AA,
DS_REG_SLOT1CMD_3 = 0x1AB,
DS_REG_SLOT1CMD_4 = 0x1AC,
DS_REG_SLOT1CMD_5 = 0x1AD,
DS_REG_SLOT1CMD_6 = 0x1AE,
DS_REG_SLOT1CMD_7 = 0x1AF,
DS_REG_SLOT1DATA_0 = 0x100010,
DS_REG_SLOT1DATA_1 = 0x100011,
DS_REG_SLOT1DATA_2 = 0x100012,
DS_REG_SLOT1DATA_3 = 0x100013,
// Interrupts
DS_REG_IME = 0x208,
DS_REG_IE_LO = 0x210,
@ -210,24 +228,6 @@ enum DS9IORegisters {
DS9_REG_B_BLDY = 0x1054,
DS9_REG_B_MASTER_BRIGHT = 0x106C,
// Game card
DS9_REG_AUXSPICNT = 0x1A0,
DS9_REG_AUXSPIDATA = 0x1A2,
DS9_REG_SLOT1CNT_LO = 0x1A4,
DS9_REG_SLOT1CNT_HI = 0x1A6,
DS9_REG_SLOT1CMD_0 = 0x1A8,
DS9_REG_SLOT1CMD_1 = 0x1A9,
DS9_REG_SLOT1CMD_2 = 0x1AA,
DS9_REG_SLOT1CMD_3 = 0x1AB,
DS9_REG_SLOT1CMD_4 = 0x1AC,
DS9_REG_SLOT1CMD_5 = 0x1AD,
DS9_REG_SLOT1CMD_6 = 0x1AE,
DS9_REG_SLOT1CMD_7 = 0x1AF,
DS9_REG_SLOT1DATA_0 = 0x100010,
DS9_REG_SLOT1DATA_1 = 0x100011,
DS9_REG_SLOT1DATA_2 = 0x100012,
DS9_REG_SLOT1DATA_3 = 0x100013,
// Etc
DS9_REG_EXMEMCNT = 0x204,

View File

@ -83,6 +83,7 @@ static uint32_t DSIOWrite(struct DSCommon* dscore, uint32_t address, uint16_t va
DSTimerWriteTMCNT_HI(&dscore->timers[3], &dscore->timing, dscore->cpu, &dscore->memory.io[DS_REG_TM3CNT_LO >> 1], value);
break;
// IPC
case DS_REG_IPCSYNC:
value &= 0x6F00;
value |= dscore->memory.io[address >> 1] & 0x000F;
@ -91,10 +92,19 @@ static uint32_t DSIOWrite(struct DSCommon* dscore, uint32_t address, uint16_t va
case DS_REG_IPCFIFOCNT:
value = DSIPCWriteFIFOCNT(dscore, value);
break;
// Cart bus
case DS_REG_SLOT1CNT_LO:
mLOG(DS_IO, STUB, "ROM control not implemented");
value &= 0x7FFF;
break;
// Interrupts
case DS_REG_IME:
DSWriteIME(dscore->cpu, dscore->memory.io, value);
break;
case 0x20A:
value = 0;
// Some bad interrupt libraries will write to this
break;
case DS_REG_IF_LO:
@ -267,6 +277,7 @@ uint16_t DS7IORead(struct DS* ds, uint32_t address) {
case DS_REG_IPCSYNC:
case DS_REG_IPCFIFOCNT:
case DS_REG_IME:
case 0x20A:
case DS_REG_IE_LO:
case DS_REG_IE_HI:
case DS_REG_IF_LO:
@ -434,6 +445,7 @@ uint16_t DS9IORead(struct DS* ds, uint32_t address) {
case DS_REG_IPCSYNC:
case DS_REG_IPCFIFOCNT:
case DS_REG_IME:
case 0x20A:
case DS_REG_IE_LO:
case DS_REG_IE_HI:
case DS_REG_IF_LO: