diff --git a/include/mgba/internal/ds/ds.h b/include/mgba/internal/ds/ds.h
index b88a6d545..363c8350b 100644
--- a/include/mgba/internal/ds/ds.h
+++ b/include/mgba/internal/ds/ds.h
@@ -20,6 +20,7 @@ CXX_GUARD_START
 
 extern const uint32_t DS_ARM946ES_FREQUENCY;
 extern const uint32_t DS_ARM7TDMI_FREQUENCY;
+extern const uint8_t DS_CHIP_ID[4];
 
 enum DSIRQ {
 	DS_IRQ_VBLANK = 0x0,
diff --git a/src/ds/ds.c b/src/ds/ds.c
index a6469eec7..09bf87426 100644
--- a/src/ds/ds.c
+++ b/src/ds/ds.c
@@ -23,6 +23,7 @@ mLOG_DEFINE_CATEGORY(DS, "DS");
 const uint32_t DS_ARM946ES_FREQUENCY = 0x1FF61FE;
 const uint32_t DS_ARM7TDMI_FREQUENCY = 0xFFB0FF;
 const uint32_t DS_COMPONENT_MAGIC = 0x1FF61FE;
+const uint8_t DS_CHIP_ID[4] = { 0xC2, 0x0F, 0x00, 0x00 };
 
 static const size_t DS_ROM_MAGIC_OFFSET = 0x15C;
 static const uint8_t DS_ROM_MAGIC[] = { 0x56, 0xCF };
@@ -278,6 +279,10 @@ void DS7Reset(struct ARMCore* cpu) {
 
 	struct DSCartridge* header = ds->romVf->map(ds->romVf, sizeof(*header), MAP_READ);
 	if (header) {
+		memcpy(&ds->memory.ram[0x3FF800 >> 2], DS_CHIP_ID, 4);
+		memcpy(&ds->memory.ram[0x3FF804 >> 2], DS_CHIP_ID, 4);
+		memcpy(&ds->memory.ram[0x3FFC00 >> 2], DS_CHIP_ID, 4);
+		memcpy(&ds->memory.ram[0x3FFC04 >> 2], DS_CHIP_ID, 4);
 		memcpy(&ds->memory.ram[0x3FFE00 >> 2], header, 0x170);
 		DS7IOWrite32(ds, DS_REG_ROMCNT_LO, header->busTiming | 0x2700000);
 		// TODO: Error check
diff --git a/src/ds/slot1.c b/src/ds/slot1.c
index fba578d98..17660e363 100644
--- a/src/ds/slot1.c
+++ b/src/ds/slot1.c
@@ -50,6 +50,10 @@ static void DSSlot1StartTransfer(struct DS* ds) {
 		ds->memory.slot1.transferRemaining = ds->memory.slot1.transferSize;
 		DSSlot1StepTransfer(ds);
 		break;
+	case 0xB8:
+		memcpy(ds->memory.slot1.readBuffer, DS_CHIP_ID, 4);
+		ds->memory.slot1.transferRemaining = 0;
+		break;
 	default:
 		mLOG(DS_SLOT1, STUB, "Unimplemented card command: %02X%02X%02X%02X%02X%02X%02X%02X",
 		     ds->memory.slot1.command[0], ds->memory.slot1.command[1],