From b104a5cd1cba1dbe44e7e60b3f041772fda96d0c Mon Sep 17 00:00:00 2001 From: Jeffrey Pfau Date: Fri, 15 Jan 2016 02:46:23 -0800 Subject: [PATCH] LR35902: Increment INC and DEC on double-wide registers --- src/lr35902/emitter-lr35902.h | 16 ++++++++-------- src/lr35902/isa-lr35902.c | 27 +++++++++++++++++++++++++++ 2 files changed, 35 insertions(+), 8 deletions(-) diff --git a/src/lr35902/emitter-lr35902.h b/src/lr35902/emitter-lr35902.h index 59b9925e4..ef4511377 100644 --- a/src/lr35902/emitter-lr35902.h +++ b/src/lr35902/emitter-lr35902.h @@ -13,7 +13,7 @@ DECLARE_INSTRUCTION_LR35902(EMITTER, NOP), \ DECLARE_INSTRUCTION_LR35902(EMITTER, LDBC), \ DECLARE_INSTRUCTION_LR35902(EMITTER, LDBC_A), \ - DECLARE_INSTRUCTION_LR35902(EMITTER, STUB), \ + DECLARE_INSTRUCTION_LR35902(EMITTER, INCBC), \ DECLARE_INSTRUCTION_LR35902(EMITTER, STUB), \ DECLARE_INSTRUCTION_LR35902(EMITTER, STUB), \ DECLARE_INSTRUCTION_LR35902(EMITTER, LDB_), \ @@ -21,14 +21,14 @@ DECLARE_INSTRUCTION_LR35902(EMITTER, STUB), \ DECLARE_INSTRUCTION_LR35902(EMITTER, STUB), \ DECLARE_INSTRUCTION_LR35902(EMITTER, STUB), \ - DECLARE_INSTRUCTION_LR35902(EMITTER, STUB), \ + DECLARE_INSTRUCTION_LR35902(EMITTER, DECBC), \ DECLARE_INSTRUCTION_LR35902(EMITTER, STUB), \ DECLARE_INSTRUCTION_LR35902(EMITTER, STUB), \ DECLARE_INSTRUCTION_LR35902(EMITTER, LDC_), \ DECLARE_INSTRUCTION_LR35902(EMITTER, STUB), \ DECLARE_INSTRUCTION_LR35902(EMITTER, LDDE), \ DECLARE_INSTRUCTION_LR35902(EMITTER, LDDE_A), \ - DECLARE_INSTRUCTION_LR35902(EMITTER, STUB), \ + DECLARE_INSTRUCTION_LR35902(EMITTER, INCDE), \ DECLARE_INSTRUCTION_LR35902(EMITTER, STUB), \ DECLARE_INSTRUCTION_LR35902(EMITTER, STUB), \ DECLARE_INSTRUCTION_LR35902(EMITTER, STUB), \ @@ -37,7 +37,7 @@ DECLARE_INSTRUCTION_LR35902(EMITTER, JR), \ DECLARE_INSTRUCTION_LR35902(EMITTER, STUB), \ DECLARE_INSTRUCTION_LR35902(EMITTER, STUB), \ - DECLARE_INSTRUCTION_LR35902(EMITTER, STUB), \ + DECLARE_INSTRUCTION_LR35902(EMITTER, DECDE), \ DECLARE_INSTRUCTION_LR35902(EMITTER, STUB), \ DECLARE_INSTRUCTION_LR35902(EMITTER, STUB), \ DECLARE_INSTRUCTION_LR35902(EMITTER, LDE_), \ @@ -45,7 +45,7 @@ DECLARE_INSTRUCTION_LR35902(EMITTER, JRNZ), \ DECLARE_INSTRUCTION_LR35902(EMITTER, LDHL), \ DECLARE_INSTRUCTION_LR35902(EMITTER, LDIHLA), \ - DECLARE_INSTRUCTION_LR35902(EMITTER, STUB), \ + DECLARE_INSTRUCTION_LR35902(EMITTER, INCHL), \ DECLARE_INSTRUCTION_LR35902(EMITTER, STUB), \ DECLARE_INSTRUCTION_LR35902(EMITTER, STUB), \ DECLARE_INSTRUCTION_LR35902(EMITTER, LDH_), \ @@ -53,7 +53,7 @@ DECLARE_INSTRUCTION_LR35902(EMITTER, JRZ), \ DECLARE_INSTRUCTION_LR35902(EMITTER, STUB), \ DECLARE_INSTRUCTION_LR35902(EMITTER, STUB), \ - DECLARE_INSTRUCTION_LR35902(EMITTER, STUB), \ + DECLARE_INSTRUCTION_LR35902(EMITTER, DECHL), \ DECLARE_INSTRUCTION_LR35902(EMITTER, STUB), \ DECLARE_INSTRUCTION_LR35902(EMITTER, STUB), \ DECLARE_INSTRUCTION_LR35902(EMITTER, LDL_), \ @@ -61,7 +61,7 @@ DECLARE_INSTRUCTION_LR35902(EMITTER, JRNC), \ DECLARE_INSTRUCTION_LR35902(EMITTER, LDSP), \ DECLARE_INSTRUCTION_LR35902(EMITTER, LDDHLA), \ - DECLARE_INSTRUCTION_LR35902(EMITTER, STUB), \ + DECLARE_INSTRUCTION_LR35902(EMITTER, INCSP), \ DECLARE_INSTRUCTION_LR35902(EMITTER, STUB), \ DECLARE_INSTRUCTION_LR35902(EMITTER, STUB), \ DECLARE_INSTRUCTION_LR35902(EMITTER, LDHL_), \ @@ -69,7 +69,7 @@ DECLARE_INSTRUCTION_LR35902(EMITTER, JRC), \ DECLARE_INSTRUCTION_LR35902(EMITTER, STUB), \ DECLARE_INSTRUCTION_LR35902(EMITTER, STUB), \ - DECLARE_INSTRUCTION_LR35902(EMITTER, STUB), \ + DECLARE_INSTRUCTION_LR35902(EMITTER, DECSP), \ DECLARE_INSTRUCTION_LR35902(EMITTER, STUB), \ DECLARE_INSTRUCTION_LR35902(EMITTER, STUB), \ DECLARE_INSTRUCTION_LR35902(EMITTER, LDA_), \ diff --git a/src/lr35902/isa-lr35902.c b/src/lr35902/isa-lr35902.c index ddb2d3741..6bbf1a6d1 100644 --- a/src/lr35902/isa-lr35902.c +++ b/src/lr35902/isa-lr35902.c @@ -364,6 +364,33 @@ DEFINE_INSTRUCTION_LR35902(LDIOA, \ cpu->executionState = LR35902_CORE_READ_PC; \ cpu->instruction = _LR35902InstructionLDIOADelay;) +#define DEFINE_INCDEC_INSTRUCTION_LR35902(REG) \ + DEFINE_INSTRUCTION_LR35902(INC ## REG, \ + uint16_t reg = LR35902Read ## REG (cpu); \ + LR35902Write ## REG (cpu, reg + 1); \ + /* TODO: Stall properly */ \ + cpu->cycles += 4;) \ + DEFINE_INSTRUCTION_LR35902(DEC ## REG, \ + uint16_t reg = LR35902Read ## REG (cpu); \ + LR35902Write ## REG (cpu, reg - 1); \ + /* TODO: Stall properly */ \ + cpu->cycles += 4;) \ + + +DEFINE_INCDEC_INSTRUCTION_LR35902(BC); +DEFINE_INCDEC_INSTRUCTION_LR35902(DE); +DEFINE_INCDEC_INSTRUCTION_LR35902(HL); + +DEFINE_INSTRUCTION_LR35902(INCSP, + ++cpu->sp; + // TODO: Stall properly + cpu->cycles += 4;) + +DEFINE_INSTRUCTION_LR35902(DECSP, + --cpu->sp; + // TODO: Stall properly + cpu->cycles += 4;) + DEFINE_INSTRUCTION_LR35902(DI, cpu->irqh.setInterrupts(cpu, false)); DEFINE_INSTRUCTION_LR35902(EI, cpu->irqh.setInterrupts(cpu, true));