From afb614ad030b538058971aedbc57c1f85614802b Mon Sep 17 00:00:00 2001 From: Vicki Pfau Date: Wed, 5 Jul 2023 22:10:33 -0700 Subject: [PATCH] ARM: Fake bpkt instruction should take no cycles (fixes #2551) --- CHANGES | 1 + src/arm/isa-arm.c | 4 +++- src/arm/isa-thumb.c | 4 +++- 3 files changed, 7 insertions(+), 2 deletions(-) diff --git a/CHANGES b/CHANGES index 103400ab7..8696acd5d 100644 --- a/CHANGES +++ b/CHANGES @@ -1,6 +1,7 @@ 0.10.3: (Future) Emulation fixes: - ARM: Remove obsolete force-alignment in `bx pc` (fixes mgba.io/i/2964) + - ARM: Fake bpkt instruction should take no cycles (fixes mgba.io/i/2551) - GB Audio: Fix channels 1/2 staying muted if restarted after long silence - GB Audio: Fix channel 1 restarting if sweep applies after stop (fixes mgba.io/i/2965) - GB I/O: Read back proper SVBK value after writing 0 (fixes mgba.io/i/2921) diff --git a/src/arm/isa-arm.c b/src/arm/isa-arm.c index b3bb3c9da..7f158dc6e 100644 --- a/src/arm/isa-arm.c +++ b/src/arm/isa-arm.c @@ -663,7 +663,9 @@ DEFINE_INSTRUCTION_ARM(MRC, ARM_STUB) // Begin miscellaneous definitions -DEFINE_INSTRUCTION_ARM(BKPT, cpu->irqh.bkpt32(cpu, ((opcode >> 4) & 0xFFF0) | (opcode & 0xF))); // Not strictly in ARMv4T, but here for convenience +DEFINE_INSTRUCTION_ARM(BKPT, + cpu->irqh.bkpt32(cpu, ((opcode >> 4) & 0xFFF0) | (opcode & 0xF)); + currentCycles = 0;); // Not strictly in ARMv4T, but here for convenience DEFINE_INSTRUCTION_ARM(ILL, ARM_ILL) // Illegal opcode DEFINE_INSTRUCTION_ARM(MSR, diff --git a/src/arm/isa-thumb.c b/src/arm/isa-thumb.c index e2af3d179..0bc8fcb12 100644 --- a/src/arm/isa-thumb.c +++ b/src/arm/isa-thumb.c @@ -381,7 +381,9 @@ DEFINE_LOAD_STORE_MULTIPLE_THUMB(PUSHR, cpu->gprs[ARM_SP] = address) DEFINE_INSTRUCTION_THUMB(ILL, ARM_ILL) -DEFINE_INSTRUCTION_THUMB(BKPT, cpu->irqh.bkpt16(cpu, opcode & 0xFF);) +DEFINE_INSTRUCTION_THUMB(BKPT, + cpu->irqh.bkpt16(cpu, opcode & 0xFF); + currentCycles = 0;) // Not strictly in ARMv4T, but here for convenience DEFINE_INSTRUCTION_THUMB(B, int16_t immediate = (opcode & 0x07FF) << 5; cpu->gprs[ARM_PC] += (((int32_t) immediate) >> 4);