mirror of https://github.com/mgba-emu/mgba.git
GBA Audio: Prevent write to audio registers if audio is OFF
On hardware, if audio is OFF it isn't possible to write to registers at addresses 0x4000060h to 0x4000081 (inclusive).
This commit is contained in:
Antonio Niño Díaz
Vicki Pfau
parent
c0cfa602af
commit
aec8ef45ef
460
src/gba/io.c
460
src/gba/io.c
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@ -342,248 +342,254 @@ void GBAIOInit(struct GBA* gba) {
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void GBAIOWrite(struct GBA* gba, uint32_t address, uint16_t value) {
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if (address < REG_SOUND1CNT_LO && (address > REG_VCOUNT || address < REG_DISPSTAT)) {
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value = gba->video.renderer->writeVideoRegister(gba->video.renderer, address, value);
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} else {
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switch (address) {
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// Video
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case REG_DISPSTAT:
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value &= 0xFFF8;
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GBAVideoWriteDISPSTAT(&gba->video, value);
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return;
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gba->memory.io[address >> 1] = gba->video.renderer->writeVideoRegister(gba->video.renderer, address, value);
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return;
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}
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case REG_VCOUNT:
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mLOG(GBA_IO, GAME_ERROR, "Write to read-only I/O register: %03X", address);
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return;
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if (address >= REG_SOUND1CNT_LO && address <= REG_SOUNDCNT_LO && !gba->audio.enable) {
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// Ignore writes to most audio registers if the hardware is off.
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return;
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}
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// Audio
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case REG_SOUND1CNT_LO:
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GBAAudioWriteSOUND1CNT_LO(&gba->audio, value);
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value &= 0x007F;
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break;
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case REG_SOUND1CNT_HI:
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GBAAudioWriteSOUND1CNT_HI(&gba->audio, value);
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break;
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case REG_SOUND1CNT_X:
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GBAAudioWriteSOUND1CNT_X(&gba->audio, value);
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value &= 0x47FF;
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break;
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case REG_SOUND2CNT_LO:
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GBAAudioWriteSOUND2CNT_LO(&gba->audio, value);
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break;
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case REG_SOUND2CNT_HI:
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GBAAudioWriteSOUND2CNT_HI(&gba->audio, value);
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value &= 0x47FF;
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break;
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case REG_SOUND3CNT_LO:
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GBAAudioWriteSOUND3CNT_LO(&gba->audio, value);
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value &= 0x00E0;
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break;
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case REG_SOUND3CNT_HI:
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GBAAudioWriteSOUND3CNT_HI(&gba->audio, value);
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value &= 0xE03F;
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break;
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case REG_SOUND3CNT_X:
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GBAAudioWriteSOUND3CNT_X(&gba->audio, value);
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// TODO: The low bits need to not be readable, but still 8-bit writable
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value &= 0x47FF;
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break;
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case REG_SOUND4CNT_LO:
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GBAAudioWriteSOUND4CNT_LO(&gba->audio, value);
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value &= 0xFF3F;
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break;
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case REG_SOUND4CNT_HI:
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GBAAudioWriteSOUND4CNT_HI(&gba->audio, value);
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value &= 0x40FF;
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break;
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case REG_SOUNDCNT_LO:
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GBAAudioWriteSOUNDCNT_LO(&gba->audio, value);
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value &= 0xFF77;
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break;
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case REG_SOUNDCNT_HI:
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GBAAudioWriteSOUNDCNT_HI(&gba->audio, value);
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value &= 0x770F;
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break;
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case REG_SOUNDCNT_X:
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GBAAudioWriteSOUNDCNT_X(&gba->audio, value);
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value &= 0x0080;
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value |= gba->memory.io[REG_SOUNDCNT_X >> 1] & 0xF;
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break;
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case REG_SOUNDBIAS:
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GBAAudioWriteSOUNDBIAS(&gba->audio, value);
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break;
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switch (address) {
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// Video
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case REG_DISPSTAT:
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value &= 0xFFF8;
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GBAVideoWriteDISPSTAT(&gba->video, value);
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return;
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case REG_WAVE_RAM0_LO:
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case REG_WAVE_RAM1_LO:
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case REG_WAVE_RAM2_LO:
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case REG_WAVE_RAM3_LO:
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GBAIOWrite32(gba, address, (gba->memory.io[(address >> 1) + 1] << 16) | value);
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break;
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case REG_VCOUNT:
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mLOG(GBA_IO, GAME_ERROR, "Write to read-only I/O register: %03X", address);
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return;
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case REG_WAVE_RAM0_HI:
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case REG_WAVE_RAM1_HI:
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case REG_WAVE_RAM2_HI:
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case REG_WAVE_RAM3_HI:
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GBAIOWrite32(gba, address - 2, gba->memory.io[(address >> 1) - 1] | (value << 16));
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break;
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// Audio
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case REG_SOUND1CNT_LO:
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GBAAudioWriteSOUND1CNT_LO(&gba->audio, value);
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value &= 0x007F;
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break;
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case REG_SOUND1CNT_HI:
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GBAAudioWriteSOUND1CNT_HI(&gba->audio, value);
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break;
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case REG_SOUND1CNT_X:
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GBAAudioWriteSOUND1CNT_X(&gba->audio, value);
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value &= 0x47FF;
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break;
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case REG_SOUND2CNT_LO:
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GBAAudioWriteSOUND2CNT_LO(&gba->audio, value);
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break;
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case REG_SOUND2CNT_HI:
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GBAAudioWriteSOUND2CNT_HI(&gba->audio, value);
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value &= 0x47FF;
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break;
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case REG_SOUND3CNT_LO:
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GBAAudioWriteSOUND3CNT_LO(&gba->audio, value);
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value &= 0x00E0;
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break;
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case REG_SOUND3CNT_HI:
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GBAAudioWriteSOUND3CNT_HI(&gba->audio, value);
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value &= 0xE03F;
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break;
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case REG_SOUND3CNT_X:
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GBAAudioWriteSOUND3CNT_X(&gba->audio, value);
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// TODO: The low bits need to not be readable, but still 8-bit writable
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value &= 0x47FF;
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break;
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case REG_SOUND4CNT_LO:
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GBAAudioWriteSOUND4CNT_LO(&gba->audio, value);
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value &= 0xFF3F;
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break;
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case REG_SOUND4CNT_HI:
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GBAAudioWriteSOUND4CNT_HI(&gba->audio, value);
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value &= 0x40FF;
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break;
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case REG_SOUNDCNT_LO:
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GBAAudioWriteSOUNDCNT_LO(&gba->audio, value);
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value &= 0xFF77;
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break;
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case REG_SOUNDCNT_HI:
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GBAAudioWriteSOUNDCNT_HI(&gba->audio, value);
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value &= 0x770F;
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break;
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case REG_SOUNDCNT_X:
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GBAAudioWriteSOUNDCNT_X(&gba->audio, value);
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value &= 0x0080;
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value |= gba->memory.io[REG_SOUNDCNT_X >> 1] & 0xF;
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break;
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case REG_SOUNDBIAS:
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GBAAudioWriteSOUNDBIAS(&gba->audio, value);
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break;
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case REG_FIFO_A_LO:
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case REG_FIFO_B_LO:
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GBAIOWrite32(gba, address, (gba->memory.io[(address >> 1) + 1] << 16) | value);
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return;
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case REG_WAVE_RAM0_LO:
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case REG_WAVE_RAM1_LO:
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case REG_WAVE_RAM2_LO:
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case REG_WAVE_RAM3_LO:
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GBAIOWrite32(gba, address, (gba->memory.io[(address >> 1) + 1] << 16) | value);
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break;
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case REG_FIFO_A_HI:
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case REG_FIFO_B_HI:
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GBAIOWrite32(gba, address - 2, gba->memory.io[(address >> 1) - 1] | (value << 16));
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return;
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case REG_WAVE_RAM0_HI:
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case REG_WAVE_RAM1_HI:
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case REG_WAVE_RAM2_HI:
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case REG_WAVE_RAM3_HI:
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GBAIOWrite32(gba, address - 2, gba->memory.io[(address >> 1) - 1] | (value << 16));
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break;
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// DMA
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case REG_DMA0SAD_LO:
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case REG_DMA0DAD_LO:
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case REG_DMA1SAD_LO:
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case REG_DMA1DAD_LO:
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case REG_DMA2SAD_LO:
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case REG_DMA2DAD_LO:
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case REG_DMA3SAD_LO:
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case REG_DMA3DAD_LO:
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GBAIOWrite32(gba, address, (gba->memory.io[(address >> 1) + 1] << 16) | value);
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break;
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case REG_FIFO_A_LO:
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case REG_FIFO_B_LO:
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GBAIOWrite32(gba, address, (gba->memory.io[(address >> 1) + 1] << 16) | value);
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return;
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case REG_DMA0SAD_HI:
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case REG_DMA0DAD_HI:
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case REG_DMA1SAD_HI:
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case REG_DMA1DAD_HI:
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case REG_DMA2SAD_HI:
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case REG_DMA2DAD_HI:
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case REG_DMA3SAD_HI:
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case REG_DMA3DAD_HI:
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GBAIOWrite32(gba, address - 2, gba->memory.io[(address >> 1) - 1] | (value << 16));
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break;
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case REG_FIFO_A_HI:
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case REG_FIFO_B_HI:
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GBAIOWrite32(gba, address - 2, gba->memory.io[(address >> 1) - 1] | (value << 16));
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return;
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case REG_DMA0CNT_LO:
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GBADMAWriteCNT_LO(gba, 0, value & 0x3FFF);
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break;
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case REG_DMA0CNT_HI:
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value = GBADMAWriteCNT_HI(gba, 0, value);
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break;
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case REG_DMA1CNT_LO:
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GBADMAWriteCNT_LO(gba, 1, value & 0x3FFF);
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break;
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case REG_DMA1CNT_HI:
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value = GBADMAWriteCNT_HI(gba, 1, value);
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break;
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case REG_DMA2CNT_LO:
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GBADMAWriteCNT_LO(gba, 2, value & 0x3FFF);
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break;
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case REG_DMA2CNT_HI:
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value = GBADMAWriteCNT_HI(gba, 2, value);
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break;
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case REG_DMA3CNT_LO:
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GBADMAWriteCNT_LO(gba, 3, value);
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break;
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case REG_DMA3CNT_HI:
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value = GBADMAWriteCNT_HI(gba, 3, value);
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break;
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// DMA
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case REG_DMA0SAD_LO:
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case REG_DMA0DAD_LO:
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case REG_DMA1SAD_LO:
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case REG_DMA1DAD_LO:
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case REG_DMA2SAD_LO:
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case REG_DMA2DAD_LO:
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case REG_DMA3SAD_LO:
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case REG_DMA3DAD_LO:
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GBAIOWrite32(gba, address, (gba->memory.io[(address >> 1) + 1] << 16) | value);
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break;
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// Timers
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case REG_TM0CNT_LO:
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GBATimerWriteTMCNT_LO(gba, 0, value);
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return;
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case REG_TM1CNT_LO:
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GBATimerWriteTMCNT_LO(gba, 1, value);
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return;
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case REG_TM2CNT_LO:
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GBATimerWriteTMCNT_LO(gba, 2, value);
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return;
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case REG_TM3CNT_LO:
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GBATimerWriteTMCNT_LO(gba, 3, value);
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return;
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case REG_DMA0SAD_HI:
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case REG_DMA0DAD_HI:
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case REG_DMA1SAD_HI:
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case REG_DMA1DAD_HI:
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case REG_DMA2SAD_HI:
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case REG_DMA2DAD_HI:
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case REG_DMA3SAD_HI:
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case REG_DMA3DAD_HI:
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GBAIOWrite32(gba, address - 2, gba->memory.io[(address >> 1) - 1] | (value << 16));
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break;
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case REG_TM0CNT_HI:
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value &= 0x00C7;
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GBATimerWriteTMCNT_HI(gba, 0, value);
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break;
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case REG_TM1CNT_HI:
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value &= 0x00C7;
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GBATimerWriteTMCNT_HI(gba, 1, value);
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break;
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case REG_TM2CNT_HI:
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value &= 0x00C7;
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GBATimerWriteTMCNT_HI(gba, 2, value);
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break;
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case REG_TM3CNT_HI:
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value &= 0x00C7;
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GBATimerWriteTMCNT_HI(gba, 3, value);
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break;
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case REG_DMA0CNT_LO:
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GBADMAWriteCNT_LO(gba, 0, value & 0x3FFF);
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break;
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case REG_DMA0CNT_HI:
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value = GBADMAWriteCNT_HI(gba, 0, value);
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break;
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case REG_DMA1CNT_LO:
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GBADMAWriteCNT_LO(gba, 1, value & 0x3FFF);
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break;
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case REG_DMA1CNT_HI:
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value = GBADMAWriteCNT_HI(gba, 1, value);
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break;
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case REG_DMA2CNT_LO:
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GBADMAWriteCNT_LO(gba, 2, value & 0x3FFF);
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break;
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case REG_DMA2CNT_HI:
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value = GBADMAWriteCNT_HI(gba, 2, value);
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break;
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case REG_DMA3CNT_LO:
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GBADMAWriteCNT_LO(gba, 3, value);
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break;
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case REG_DMA3CNT_HI:
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value = GBADMAWriteCNT_HI(gba, 3, value);
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break;
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// SIO
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case REG_SIOCNT:
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GBASIOWriteSIOCNT(&gba->sio, value);
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break;
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case REG_RCNT:
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value &= 0xC1FF;
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GBASIOWriteRCNT(&gba->sio, value);
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break;
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case REG_JOY_TRANS_LO:
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case REG_JOY_TRANS_HI:
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gba->memory.io[REG_JOYSTAT >> 1] |= JOYSTAT_TRANS_BIT;
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// Fall through
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case REG_SIODATA32_LO:
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case REG_SIODATA32_HI:
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case REG_SIOMLT_SEND:
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case REG_JOYCNT:
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case REG_JOYSTAT:
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case REG_JOY_RECV_LO:
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case REG_JOY_RECV_HI:
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value = GBASIOWriteRegister(&gba->sio, address, value);
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break;
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// Timers
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case REG_TM0CNT_LO:
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GBATimerWriteTMCNT_LO(gba, 0, value);
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return;
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case REG_TM1CNT_LO:
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GBATimerWriteTMCNT_LO(gba, 1, value);
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return;
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case REG_TM2CNT_LO:
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GBATimerWriteTMCNT_LO(gba, 2, value);
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return;
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case REG_TM3CNT_LO:
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GBATimerWriteTMCNT_LO(gba, 3, value);
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return;
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// Interrupts and misc
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case REG_KEYCNT:
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value &= 0xC3FF;
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gba->memory.io[address >> 1] = value;
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GBATestKeypadIRQ(gba);
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case REG_TM0CNT_HI:
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value &= 0x00C7;
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GBATimerWriteTMCNT_HI(gba, 0, value);
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break;
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case REG_TM1CNT_HI:
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value &= 0x00C7;
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GBATimerWriteTMCNT_HI(gba, 1, value);
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break;
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case REG_TM2CNT_HI:
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value &= 0x00C7;
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GBATimerWriteTMCNT_HI(gba, 2, value);
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break;
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case REG_TM3CNT_HI:
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value &= 0x00C7;
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GBATimerWriteTMCNT_HI(gba, 3, value);
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break;
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// SIO
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case REG_SIOCNT:
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GBASIOWriteSIOCNT(&gba->sio, value);
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break;
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case REG_RCNT:
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value &= 0xC1FF;
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GBASIOWriteRCNT(&gba->sio, value);
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break;
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case REG_JOY_TRANS_LO:
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case REG_JOY_TRANS_HI:
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gba->memory.io[REG_JOYSTAT >> 1] |= JOYSTAT_TRANS_BIT;
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// Fall through
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case REG_SIODATA32_LO:
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case REG_SIODATA32_HI:
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case REG_SIOMLT_SEND:
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case REG_JOYCNT:
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case REG_JOYSTAT:
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case REG_JOY_RECV_LO:
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case REG_JOY_RECV_HI:
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value = GBASIOWriteRegister(&gba->sio, address, value);
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break;
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// Interrupts and misc
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case REG_KEYCNT:
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value &= 0xC3FF;
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gba->memory.io[address >> 1] = value;
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GBATestKeypadIRQ(gba);
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return;
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case REG_WAITCNT:
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value &= 0x5FFF;
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GBAAdjustWaitstates(gba, value);
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break;
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case REG_IE:
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gba->memory.io[REG_IE >> 1] = value;
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GBATestIRQ(gba, 1);
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return;
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case REG_IF:
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value = gba->memory.io[REG_IF >> 1] & ~value;
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gba->memory.io[REG_IF >> 1] = value;
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GBATestIRQ(gba, 1);
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return;
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case REG_IME:
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gba->memory.io[REG_IME >> 1] = value & 1;
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GBATestIRQ(gba, 1);
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return;
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case REG_MAX:
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// Some bad interrupt libraries will write to this
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break;
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case REG_DEBUG_ENABLE:
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gba->debug = value == 0xC0DE;
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return;
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case REG_DEBUG_FLAGS:
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if (gba->debug) {
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GBADebug(gba, value);
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return;
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case REG_WAITCNT:
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value &= 0x5FFF;
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GBAAdjustWaitstates(gba, value);
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break;
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case REG_IE:
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gba->memory.io[REG_IE >> 1] = value;
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GBATestIRQ(gba, 1);
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return;
|
||||
case REG_IF:
|
||||
value = gba->memory.io[REG_IF >> 1] & ~value;
|
||||
gba->memory.io[REG_IF >> 1] = value;
|
||||
GBATestIRQ(gba, 1);
|
||||
return;
|
||||
case REG_IME:
|
||||
gba->memory.io[REG_IME >> 1] = value & 1;
|
||||
GBATestIRQ(gba, 1);
|
||||
return;
|
||||
case REG_MAX:
|
||||
// Some bad interrupt libraries will write to this
|
||||
break;
|
||||
case REG_DEBUG_ENABLE:
|
||||
gba->debug = value == 0xC0DE;
|
||||
return;
|
||||
case REG_DEBUG_FLAGS:
|
||||
if (gba->debug) {
|
||||
GBADebug(gba, value);
|
||||
return;
|
||||
}
|
||||
// Fall through
|
||||
default:
|
||||
if (address >= REG_DEBUG_STRING && address - REG_DEBUG_STRING < sizeof(gba->debugString)) {
|
||||
STORE_16LE(value, address - REG_DEBUG_STRING, gba->debugString);
|
||||
return;
|
||||
}
|
||||
mLOG(GBA_IO, STUB, "Stub I/O register write: %03X", address);
|
||||
if (address >= REG_MAX) {
|
||||
mLOG(GBA_IO, GAME_ERROR, "Write to unused I/O register: %03X", address);
|
||||
return;
|
||||
}
|
||||
break;
|
||||
}
|
||||
// Fall through
|
||||
default:
|
||||
if (address >= REG_DEBUG_STRING && address - REG_DEBUG_STRING < sizeof(gba->debugString)) {
|
||||
STORE_16LE(value, address - REG_DEBUG_STRING, gba->debugString);
|
||||
return;
|
||||
}
|
||||
mLOG(GBA_IO, STUB, "Stub I/O register write: %03X", address);
|
||||
if (address >= REG_MAX) {
|
||||
mLOG(GBA_IO, GAME_ERROR, "Write to unused I/O register: %03X", address);
|
||||
return;
|
||||
}
|
||||
break;
|
||||
}
|
||||
gba->memory.io[address >> 1] = value;
|
||||
}
|
||||
|
|
|
|||
Loading…
Reference in New Issue