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mgba
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Overwrite IF while attempting to IntrWait

This commit is contained in:
Jeffrey Pfau 2013-05-05 00:44:30 -07:00
parent fc7aec557b
commit ae3f623fd5
3 changed files with 10 additions and 8 deletions
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1
src/gba/gba-bios.c
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@ -179,7 +179,6 @@ void GBASwi16(struct ARMBoard* board, int immediate) {
if (!gba->cpu.gprs[0] && gba->memory.io[REG_IF >> 1] & gba->cpu.gprs[1]) {
break;
}
gba->memory.io[REG_IF >> 1] = 0;
ARMRaiseSWI(&gba->cpu);
break;
case 0x6:

15
src/gba/hle-bios.c
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@ -1,6 +1,5 @@
#include "hle-bios.h"
const unsigned int hleBiosLength = 216;
const unsigned char hleBios[] = {
0x06, 0x00, 0x00, 0xea, 0xfe, 0xff, 0xff, 0xea, 0x05, 0x00, 0x00, 0xea,
0xfe, 0xff, 0xff, 0xea, 0xfe, 0xff, 0xff, 0xea, 0x00, 0x00, 0xa0, 0xe1,
@ -14,10 +13,12 @@ const unsigned char hleBios[] = {
0x04, 0xd0, 0x4d, 0xe2, 0xb0, 0x10, 0xcd, 0xe1, 0x01, 0x23, 0xa0, 0xe3,
0x02, 0x2c, 0x82, 0xe2, 0xb0, 0x00, 0xd2, 0xe1, 0xb2, 0x00, 0xcd, 0xe1,
0xb0, 0x10, 0xdd, 0xe1, 0x01, 0x10, 0x80, 0xe1, 0xb0, 0x10, 0xc2, 0xe1,
0x1f, 0x00, 0xa0, 0xe3, 0x00, 0xf0, 0x29, 0xe1, 0x00, 0x00, 0x02, 0xef,
0xd3, 0x00, 0xa0, 0xe3, 0x00, 0xf0, 0x29, 0xe1, 0x01, 0x03, 0xa0, 0xe3,
0xb8, 0x20, 0x50, 0xe1, 0xb0, 0x10, 0xdd, 0xe1, 0x02, 0x10, 0x11, 0xe0,
0x02, 0x10, 0x21, 0x10, 0xb8, 0x10, 0x40, 0x11, 0xb2, 0x00, 0xdd, 0xe1,
0x01, 0x13, 0xa0, 0xe3, 0x02, 0x1c, 0x81, 0xe2, 0xb0, 0x00, 0xc1, 0xe1,
0xe8, 0xff, 0xff, 0x0a, 0x04, 0xd0, 0x8d, 0xe2, 0x04, 0x80, 0xbd, 0xe8
0x00, 0x00, 0xe0, 0xe3, 0xb2, 0x00, 0xc2, 0xe1, 0x1f, 0x00, 0xa0, 0xe3,
0x00, 0xf0, 0x29, 0xe1, 0x00, 0x00, 0x02, 0xef, 0xd3, 0x00, 0xa0, 0xe3,
0x00, 0xf0, 0x29, 0xe1, 0x01, 0x03, 0xa0, 0xe3, 0xb8, 0x20, 0x50, 0xe1,
0xb0, 0x10, 0xdd, 0xe1, 0x02, 0x10, 0x11, 0xe0, 0x02, 0x10, 0x21, 0x10,
0xb8, 0x10, 0x40, 0x11, 0xb2, 0x00, 0xdd, 0xe1, 0x01, 0x13, 0xa0, 0xe3,
0x02, 0x1c, 0x81, 0xe2, 0xb0, 0x00, 0xc1, 0xe1, 0xe6, 0xff, 0xff, 0x0a,
0x04, 0xd0, 0x8d, 0xe2, 0x04, 0x80, 0xbd, 0xe8
};
const unsigned int hleBiosLength = 224;

2
src/gba/hle-bios.s
View File

@ -47,6 +47,8 @@ strh r0, [sp, #2]
ldrh r1, [sp, #0]
orr r1, r0, r1
strh r1, [r2, #0]
mov r0, #0xFFFFFFFF
strh r0, [r2, #2]
mov r0, #0x1F
msr cpsr, r0
swi #0x020000