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GB I/O: Finally rename registers to have a prefix

This commit is contained in:
Vicki Pfau 2020-10-21 20:57:06 -07:00
parent 659b929f3e
commit ac8d1e2bf6
16 changed files with 547 additions and 547 deletions
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162
include/mgba/internal/gb/io.h
View File

@ -15,98 +15,98 @@ CXX_GUARD_START
mLOG_DECLARE_CATEGORY(GB_IO);
enum GBIORegisters {
REG_JOYP = 0x00,
REG_SB = 0x01,
REG_SC = 0x02,
GB_REG_JOYP = 0x00,
GB_REG_SB = 0x01,
GB_REG_SC = 0x02,
// Timing
REG_DIV = 0x04,
REG_TIMA = 0x05,
REG_TMA = 0x06,
REG_TAC = 0x07,
GB_REG_DIV = 0x04,
GB_REG_TIMA = 0x05,
GB_REG_TMA = 0x06,
GB_REG_TAC = 0x07,
// Interrupts
REG_IF = 0x0F,
REG_IE = 0xFF,
GB_REG_IF = 0x0F,
GB_REG_IE = 0xFF,
// Audio
REG_NR10 = 0x10,
REG_NR11 = 0x11,
REG_NR12 = 0x12,
REG_NR13 = 0x13,
REG_NR14 = 0x14,
REG_NR21 = 0x16,
REG_NR22 = 0x17,
REG_NR23 = 0x18,
REG_NR24 = 0x19,
REG_NR30 = 0x1A,
REG_NR31 = 0x1B,
REG_NR32 = 0x1C,
REG_NR33 = 0x1D,
REG_NR34 = 0x1E,
REG_NR41 = 0x20,
REG_NR42 = 0x21,
REG_NR43 = 0x22,
REG_NR44 = 0x23,
REG_NR50 = 0x24,
REG_NR51 = 0x25,
REG_NR52 = 0x26,
GB_REG_NR10 = 0x10,
GB_REG_NR11 = 0x11,
GB_REG_NR12 = 0x12,
GB_REG_NR13 = 0x13,
GB_REG_NR14 = 0x14,
GB_REG_NR21 = 0x16,
GB_REG_NR22 = 0x17,
GB_REG_NR23 = 0x18,
GB_REG_NR24 = 0x19,
GB_REG_NR30 = 0x1A,
GB_REG_NR31 = 0x1B,
GB_REG_NR32 = 0x1C,
GB_REG_NR33 = 0x1D,
GB_REG_NR34 = 0x1E,
GB_REG_NR41 = 0x20,
GB_REG_NR42 = 0x21,
GB_REG_NR43 = 0x22,
GB_REG_NR44 = 0x23,
GB_REG_NR50 = 0x24,
GB_REG_NR51 = 0x25,
GB_REG_NR52 = 0x26,
REG_WAVE_0 = 0x30,
REG_WAVE_1 = 0x31,
REG_WAVE_2 = 0x32,
REG_WAVE_3 = 0x33,
REG_WAVE_4 = 0x34,
REG_WAVE_5 = 0x35,
REG_WAVE_6 = 0x36,
REG_WAVE_7 = 0x37,
REG_WAVE_8 = 0x38,
REG_WAVE_9 = 0x39,
REG_WAVE_A = 0x3A,
REG_WAVE_B = 0x3B,
REG_WAVE_C = 0x3C,
REG_WAVE_D = 0x3D,
REG_WAVE_E = 0x3E,
REG_WAVE_F = 0x3F,
GB_REG_WAVE_0 = 0x30,
GB_REG_WAVE_1 = 0x31,
GB_REG_WAVE_2 = 0x32,
GB_REG_WAVE_3 = 0x33,
GB_REG_WAVE_4 = 0x34,
GB_REG_WAVE_5 = 0x35,
GB_REG_WAVE_6 = 0x36,
GB_REG_WAVE_7 = 0x37,
GB_REG_WAVE_8 = 0x38,
GB_REG_WAVE_9 = 0x39,
GB_REG_WAVE_A = 0x3A,
GB_REG_WAVE_B = 0x3B,
GB_REG_WAVE_C = 0x3C,
GB_REG_WAVE_D = 0x3D,
GB_REG_WAVE_E = 0x3E,
GB_REG_WAVE_F = 0x3F,
// Video
REG_LCDC = 0x40,
REG_STAT = 0x41,
REG_SCY = 0x42,
REG_SCX = 0x43,
REG_LY = 0x44,
REG_LYC = 0x45,
REG_DMA = 0x46,
REG_BGP = 0x47,
REG_OBP0 = 0x48,
REG_OBP1 = 0x49,
REG_WY = 0x4A,
REG_WX = 0x4B,
GB_REG_LCDC = 0x40,
GB_REG_STAT = 0x41,
GB_REG_SCY = 0x42,
GB_REG_SCX = 0x43,
GB_REG_LY = 0x44,
GB_REG_LYC = 0x45,
GB_REG_DMA = 0x46,
GB_REG_BGP = 0x47,
GB_REG_OBP0 = 0x48,
GB_REG_OBP1 = 0x49,
GB_REG_WY = 0x4A,
GB_REG_WX = 0x4B,
// CGB
REG_KEY0 = 0x4C,
REG_KEY1 = 0x4D,
REG_VBK = 0x4F,
REG_BANK = 0x50,
REG_HDMA1 = 0x51,
REG_HDMA2 = 0x52,
REG_HDMA3 = 0x53,
REG_HDMA4 = 0x54,
REG_HDMA5 = 0x55,
REG_RP = 0x56,
REG_BCPS = 0x68,
REG_BCPD = 0x69,
REG_OCPS = 0x6A,
REG_OCPD = 0x6B,
REG_OPRI = 0x6C,
REG_SVBK = 0x70,
REG_UNK72 = 0x72,
REG_UNK73 = 0x73,
REG_UNK74 = 0x74,
REG_UNK75 = 0x75,
REG_PCM12 = 0x76,
REG_PCM34 = 0x77,
REG_MAX = 0x100
GB_REG_KEY0 = 0x4C,
GB_REG_KEY1 = 0x4D,
GB_REG_VBK = 0x4F,
GB_REG_BANK = 0x50,
GB_REG_HDMA1 = 0x51,
GB_REG_HDMA2 = 0x52,
GB_REG_HDMA3 = 0x53,
GB_REG_HDMA4 = 0x54,
GB_REG_HDMA5 = 0x55,
GB_REG_RP = 0x56,
GB_REG_BCPS = 0x68,
GB_REG_BCPD = 0x69,
GB_REG_OCPS = 0x6A,
GB_REG_OCPD = 0x6B,
GB_REG_OPRI = 0x6C,
GB_REG_SVBK = 0x70,
GB_REG_UNK72 = 0x72,
GB_REG_UNK73 = 0x73,
GB_REG_UNK74 = 0x74,
GB_REG_UNK75 = 0x75,
GB_REG_PCM12 = 0x76,
GB_REG_PCM34 = 0x77,
GB_REG_MAX = 0x100
};
extern MGBA_EXPORT const char* const GBIORegisterNames[];

46
src/gb/audio.c
View File

@ -446,30 +446,30 @@ void GBAudioWriteNR52(struct GBAudio* audio, uint8_t value) {
}
if (audio->p) {
audio->p->memory.io[REG_NR10] = 0;
audio->p->memory.io[REG_NR11] = 0;
audio->p->memory.io[REG_NR12] = 0;
audio->p->memory.io[REG_NR13] = 0;
audio->p->memory.io[REG_NR14] = 0;
audio->p->memory.io[REG_NR21] = 0;
audio->p->memory.io[REG_NR22] = 0;
audio->p->memory.io[REG_NR23] = 0;
audio->p->memory.io[REG_NR24] = 0;
audio->p->memory.io[REG_NR30] = 0;
audio->p->memory.io[REG_NR31] = 0;
audio->p->memory.io[REG_NR32] = 0;
audio->p->memory.io[REG_NR33] = 0;
audio->p->memory.io[REG_NR34] = 0;
audio->p->memory.io[REG_NR42] = 0;
audio->p->memory.io[REG_NR43] = 0;
audio->p->memory.io[REG_NR44] = 0;
audio->p->memory.io[REG_NR50] = 0;
audio->p->memory.io[REG_NR51] = 0;
audio->p->memory.io[GB_REG_NR10] = 0;
audio->p->memory.io[GB_REG_NR11] = 0;
audio->p->memory.io[GB_REG_NR12] = 0;
audio->p->memory.io[GB_REG_NR13] = 0;
audio->p->memory.io[GB_REG_NR14] = 0;
audio->p->memory.io[GB_REG_NR21] = 0;
audio->p->memory.io[GB_REG_NR22] = 0;
audio->p->memory.io[GB_REG_NR23] = 0;
audio->p->memory.io[GB_REG_NR24] = 0;
audio->p->memory.io[GB_REG_NR30] = 0;
audio->p->memory.io[GB_REG_NR31] = 0;
audio->p->memory.io[GB_REG_NR32] = 0;
audio->p->memory.io[GB_REG_NR33] = 0;
audio->p->memory.io[GB_REG_NR34] = 0;
audio->p->memory.io[GB_REG_NR42] = 0;
audio->p->memory.io[GB_REG_NR43] = 0;
audio->p->memory.io[GB_REG_NR44] = 0;
audio->p->memory.io[GB_REG_NR50] = 0;
audio->p->memory.io[GB_REG_NR51] = 0;
if (audio->style != GB_AUDIO_DMG) {
audio->p->memory.io[REG_NR11] = 0;
audio->p->memory.io[REG_NR21] = 0;
audio->p->memory.io[REG_NR31] = 0;
audio->p->memory.io[REG_NR41] = 0;
audio->p->memory.io[GB_REG_NR11] = 0;
audio->p->memory.io[GB_REG_NR21] = 0;
audio->p->memory.io[GB_REG_NR31] = 0;
audio->p->memory.io[GB_REG_NR41] = 0;
}
}
*audio->nr52 &= ~0x000F;

2
src/gb/core.c
View File

@ -838,7 +838,7 @@ static bool _GBCoreLookupIdentifier(struct mCore* core, const char* name, int32_
UNUSED(core);
*segment = -1;
int i;
for (i = 0; i < REG_MAX; ++i) {
for (i = 0; i < GB_REG_MAX; ++i) {
const char* reg = GBIORegisterNames[i];
if (reg && strcasecmp(reg, name) == 0) {
*value = GB_BASE_IO | i;

6
src/gb/debugger/cli.c
View File

@ -57,12 +57,12 @@ static bool _GBCLIDebuggerCustom(struct CLIDebuggerSystem* debugger) {
struct GBCLIDebugger* gbDebugger = (struct GBCLIDebugger*) debugger;
if (gbDebugger->frameAdvance) {
if (!gbDebugger->inVblank && GBRegisterSTATGetMode(((struct GB*) gbDebugger->core->board)->memory.io[REG_STAT]) == 1) {
if (!gbDebugger->inVblank && GBRegisterSTATGetMode(((struct GB*) gbDebugger->core->board)->memory.io[GB_REG_STAT]) == 1) {
mDebuggerEnter(&gbDebugger->d.p->d, DEBUGGER_ENTER_MANUAL, 0);
gbDebugger->frameAdvance = false;
return false;
}
gbDebugger->inVblank = GBRegisterSTATGetMode(((struct GB*) gbDebugger->core->board)->memory.io[REG_STAT]) == 1;
gbDebugger->inVblank = GBRegisterSTATGetMode(((struct GB*) gbDebugger->core->board)->memory.io[GB_REG_STAT]) == 1;
return true;
}
return true;
@ -74,7 +74,7 @@ static void _frame(struct CLIDebugger* debugger, struct CLIDebugVector* dv) {
struct GBCLIDebugger* gbDebugger = (struct GBCLIDebugger*) debugger->system;
gbDebugger->frameAdvance = true;
gbDebugger->inVblank = GBRegisterSTATGetMode(((struct GB*) gbDebugger->core->board)->memory.io[REG_STAT]) == 1;
gbDebugger->inVblank = GBRegisterSTATGetMode(((struct GB*) gbDebugger->core->board)->memory.io[GB_REG_STAT]) == 1;
}
#if !defined(MINIMAL_CORE) || MINIMAL_CORE < 2

6
src/gb/debugger/debugger.c
View File

@ -29,8 +29,8 @@ static const struct SM83Segment _GBCSegments[] = {
static void _printStatus(struct CLIDebuggerSystem* debugger) {
struct CLIDebuggerBackend* be = debugger->p->backend;
struct GB* gb = debugger->p->d.core->board;
be->printf(be, "IE: %02X IF: %02X IME: %i\n", gb->memory.ie, gb->memory.io[REG_IF], gb->memory.ime);
be->printf(be, "LCDC: %02X STAT: %02X LY: %02X\n", gb->memory.io[REG_LCDC], gb->memory.io[REG_STAT] | 0x80, gb->memory.io[REG_LY]);
be->printf(be, "IE: %02X IF: %02X IME: %i\n", gb->memory.ie, gb->memory.io[GB_REG_IF], gb->memory.ime);
be->printf(be, "LCDC: %02X STAT: %02X LY: %02X\n", gb->memory.io[GB_REG_LCDC], gb->memory.io[GB_REG_STAT] | 0x80, gb->memory.io[GB_REG_LY]);
be->printf(be, "Next video mode: %i\n", mTimingUntil(&gb->timing, &gb->video.modeEvent) / 4);
}
@ -43,4 +43,4 @@ struct mDebuggerPlatform* GBDebuggerCreate(struct GB* gb) {
}
platform->printStatus = _printStatus;
return &platform->d;
}
}

28
src/gb/gb.c
View File

@ -64,7 +64,7 @@ static void GBInit(void* cpu, struct mCPUComponent* component) {
GBVideoInit(&gb->video);
gb->audio.p = gb;
GBAudioInit(&gb->audio, 2048, &gb->memory.io[REG_NR52], GB_AUDIO_DMG); // TODO: Remove magic constant
GBAudioInit(&gb->audio, 2048, &gb->memory.io[GB_REG_NR52], GB_AUDIO_DMG); // TODO: Remove magic constant
gb->sio.p = gb;
GBSIOInit(&gb->sio);
@ -567,7 +567,7 @@ void GBSkipBIOS(struct GB* gb) {
mTimingDeschedule(&gb->timing, &gb->timer.event);
mTimingSchedule(&gb->timing, &gb->timer.event, gb->timer.nextDiv);
GBIOWrite(gb, REG_LCDC, 0x91);
GBIOWrite(gb, GB_REG_LCDC, 0x91);
GBVideoSkipBIOS(&gb->video);
if (gb->biosVf) {
@ -673,7 +673,7 @@ int GBValidModels(const uint8_t* bank0) {
}
void GBUpdateIRQs(struct GB* gb) {
int irqs = gb->memory.ie & gb->memory.io[REG_IF] & 0x1F;
int irqs = gb->memory.ie & gb->memory.io[GB_REG_IF] & 0x1F;
if (!irqs) {
gb->cpu->irqPending = false;
return;
@ -737,26 +737,26 @@ void GBSetInterrupts(struct SM83Core* cpu, bool enable) {
uint16_t GBIRQVector(struct SM83Core* cpu) {
struct GB* gb = (struct GB*) cpu->master;
int irqs = gb->memory.ie & gb->memory.io[REG_IF];
int irqs = gb->memory.ie & gb->memory.io[GB_REG_IF];
if (irqs & (1 << GB_IRQ_VBLANK)) {
gb->memory.io[REG_IF] &= ~(1 << GB_IRQ_VBLANK);
gb->memory.io[GB_REG_IF] &= ~(1 << GB_IRQ_VBLANK);
return GB_VECTOR_VBLANK;
}
if (irqs & (1 << GB_IRQ_LCDSTAT)) {
gb->memory.io[REG_IF] &= ~(1 << GB_IRQ_LCDSTAT);
gb->memory.io[GB_REG_IF] &= ~(1 << GB_IRQ_LCDSTAT);
return GB_VECTOR_LCDSTAT;
}
if (irqs & (1 << GB_IRQ_TIMER)) {
gb->memory.io[REG_IF] &= ~(1 << GB_IRQ_TIMER);
gb->memory.io[GB_REG_IF] &= ~(1 << GB_IRQ_TIMER);
return GB_VECTOR_TIMER;
}
if (irqs & (1 << GB_IRQ_SIO)) {
gb->memory.io[REG_IF] &= ~(1 << GB_IRQ_SIO);
gb->memory.io[GB_REG_IF] &= ~(1 << GB_IRQ_SIO);
return GB_VECTOR_SIO;
}
if (irqs & (1 << GB_IRQ_KEYPAD)) {
gb->memory.io[REG_IF] &= ~(1 << GB_IRQ_KEYPAD);
gb->memory.io[GB_REG_IF] &= ~(1 << GB_IRQ_KEYPAD);
return GB_VECTOR_KEYPAD;
}
return 0;
@ -772,7 +772,7 @@ static void _enableInterrupts(struct mTiming* timing, void* user, uint32_t cycle
void GBHalt(struct SM83Core* cpu) {
struct GB* gb = (struct GB*) cpu->master;
if (!(gb->memory.ie & gb->memory.io[REG_IF] & 0x1F)) {
if (!(gb->memory.ie & gb->memory.io[GB_REG_IF] & 0x1F)) {
cpu->cycles = cpu->nextEvent;
cpu->halted = true;
} else if (!gb->memory.ime) {
@ -783,13 +783,13 @@ void GBHalt(struct SM83Core* cpu) {
void GBStop(struct SM83Core* cpu) {
struct GB* gb = (struct GB*) cpu->master;
if (gb->model >= GB_MODEL_CGB && gb->memory.io[REG_KEY1] & 1) {
if (gb->model >= GB_MODEL_CGB && gb->memory.io[GB_REG_KEY1] & 1) {
gb->doubleSpeed ^= 1;
gb->audio.timingFactor = gb->doubleSpeed + 1;
gb->memory.io[REG_KEY1] = 0;
gb->memory.io[REG_KEY1] |= gb->doubleSpeed << 7;
gb->memory.io[GB_REG_KEY1] = 0;
gb->memory.io[GB_REG_KEY1] |= gb->doubleSpeed << 7;
} else {
int sleep = ~(gb->memory.io[REG_JOYP] & 0x30);
int sleep = ~(gb->memory.io[GB_REG_JOYP] & 0x30);
size_t c;
for (c = 0; c < mCoreCallbacksListSize(&gb->coreCallbacks); ++c) {
struct mCoreCallbacks* callbacks = mCoreCallbacksListGetPointer(&gb->coreCallbacks, c);

650
src/gb/io.c
View File

@ -12,99 +12,99 @@
mLOG_DEFINE_CATEGORY(GB_IO, "GB I/O", "gb.io");
MGBA_EXPORT const char* const GBIORegisterNames[] = {
[REG_JOYP] = "JOYP",
[REG_SB] = "SB",
[REG_SC] = "SC",
[REG_DIV] = "DIV",
[REG_TIMA] = "TIMA",
[REG_TMA] = "TMA",
[REG_TAC] = "TAC",
[REG_IF] = "IF",
[REG_NR10] = "NR10",
[REG_NR11] = "NR11",
[REG_NR12] = "NR12",
[REG_NR13] = "NR13",
[REG_NR14] = "NR14",
[REG_NR21] = "NR21",
[REG_NR22] = "NR22",
[REG_NR23] = "NR23",
[REG_NR24] = "NR24",
[REG_NR30] = "NR30",
[REG_NR31] = "NR31",
[REG_NR32] = "NR32",
[REG_NR33] = "NR33",
[REG_NR34] = "NR34",
[REG_NR41] = "NR41",
[REG_NR42] = "NR42",
[REG_NR43] = "NR43",
[REG_NR44] = "NR44",
[REG_NR50] = "NR50",
[REG_NR51] = "NR51",
[REG_NR52] = "NR52",
[REG_LCDC] = "LCDC",
[REG_STAT] = "STAT",
[REG_SCY] = "SCY",
[REG_SCX] = "SCX",
[REG_LY] = "LY",
[REG_LYC] = "LYC",
[REG_DMA] = "DMA",
[REG_BGP] = "BGP",
[REG_OBP0] = "OBP0",
[REG_OBP1] = "OBP1",
[REG_WY] = "WY",
[REG_WX] = "WX",
[REG_KEY0] = "KEY0",
[REG_KEY1] = "KEY1",
[REG_VBK] = "VBK",
[REG_BANK] = "BANK",
[REG_HDMA1] = "HDMA1",
[REG_HDMA2] = "HDMA2",
[REG_HDMA3] = "HDMA3",
[REG_HDMA4] = "HDMA4",
[REG_HDMA5] = "HDMA5",
[REG_RP] = "RP",
[REG_BCPS] = "BCPS",
[REG_BCPD] = "BCPD",
[REG_OCPS] = "OCPS",
[REG_OCPD] = "OCPD",
[REG_OPRI] = "OPRI",
[REG_SVBK] = "SVBK",
[REG_IE] = "IE",
[GB_REG_JOYP] = "JOYP",
[GB_REG_SB] = "SB",
[GB_REG_SC] = "SC",
[GB_REG_DIV] = "DIV",
[GB_REG_TIMA] = "TIMA",
[GB_REG_TMA] = "TMA",
[GB_REG_TAC] = "TAC",
[GB_REG_IF] = "IF",
[GB_REG_NR10] = "NR10",
[GB_REG_NR11] = "NR11",
[GB_REG_NR12] = "NR12",
[GB_REG_NR13] = "NR13",
[GB_REG_NR14] = "NR14",
[GB_REG_NR21] = "NR21",
[GB_REG_NR22] = "NR22",
[GB_REG_NR23] = "NR23",
[GB_REG_NR24] = "NR24",
[GB_REG_NR30] = "NR30",
[GB_REG_NR31] = "NR31",
[GB_REG_NR32] = "NR32",
[GB_REG_NR33] = "NR33",
[GB_REG_NR34] = "NR34",
[GB_REG_NR41] = "NR41",
[GB_REG_NR42] = "NR42",
[GB_REG_NR43] = "NR43",
[GB_REG_NR44] = "NR44",
[GB_REG_NR50] = "NR50",
[GB_REG_NR51] = "NR51",
[GB_REG_NR52] = "NR52",
[GB_REG_LCDC] = "LCDC",
[GB_REG_STAT] = "STAT",
[GB_REG_SCY] = "SCY",
[GB_REG_SCX] = "SCX",
[GB_REG_LY] = "LY",
[GB_REG_LYC] = "LYC",
[GB_REG_DMA] = "DMA",
[GB_REG_BGP] = "BGP",
[GB_REG_OBP0] = "OBP0",
[GB_REG_OBP1] = "OBP1",
[GB_REG_WY] = "WY",
[GB_REG_WX] = "WX",
[GB_REG_KEY0] = "KEY0",
[GB_REG_KEY1] = "KEY1",
[GB_REG_VBK] = "VBK",
[GB_REG_BANK] = "BANK",
[GB_REG_HDMA1] = "HDMA1",
[GB_REG_HDMA2] = "HDMA2",
[GB_REG_HDMA3] = "HDMA3",
[GB_REG_HDMA4] = "HDMA4",
[GB_REG_HDMA5] = "HDMA5",
[GB_REG_RP] = "RP",
[GB_REG_BCPS] = "BCPS",
[GB_REG_BCPD] = "BCPD",
[GB_REG_OCPS] = "OCPS",
[GB_REG_OCPD] = "OCPD",
[GB_REG_OPRI] = "OPRI",
[GB_REG_SVBK] = "SVBK",
[GB_REG_IE] = "IE",
};
static const uint8_t _registerMask[] = {
[REG_SC] = 0x7E, // TODO: GBC differences
[REG_IF] = 0xE0,
[REG_TAC] = 0xF8,
[REG_NR10] = 0x80,
[REG_NR11] = 0x3F,
[REG_NR12] = 0x00,
[REG_NR13] = 0xFF,
[REG_NR14] = 0xBF,
[REG_NR21] = 0x3F,
[REG_NR22] = 0x00,
[REG_NR23] = 0xFF,
[REG_NR24] = 0xBF,
[REG_NR30] = 0x7F,
[REG_NR31] = 0xFF,
[REG_NR32] = 0x9F,
[REG_NR33] = 0xFF,
[REG_NR34] = 0xBF,
[REG_NR41] = 0xFF,
[REG_NR42] = 0x00,
[REG_NR43] = 0x00,
[REG_NR44] = 0xBF,
[REG_NR50] = 0x00,
[REG_NR51] = 0x00,
[REG_NR52] = 0x70,
[REG_STAT] = 0x80,
[REG_KEY1] = 0x7E,
[REG_VBK] = 0xFE,
[REG_OCPS] = 0x40,
[REG_BCPS] = 0x40,
[REG_OPRI] = 0xFE,
[REG_SVBK] = 0xF8,
[REG_IE] = 0xE0,
[GB_REG_SC] = 0x7E, // TODO: GBC differences
[GB_REG_IF] = 0xE0,
[GB_REG_TAC] = 0xF8,
[GB_REG_NR10] = 0x80,
[GB_REG_NR11] = 0x3F,
[GB_REG_NR12] = 0x00,
[GB_REG_NR13] = 0xFF,
[GB_REG_NR14] = 0xBF,
[GB_REG_NR21] = 0x3F,
[GB_REG_NR22] = 0x00,
[GB_REG_NR23] = 0xFF,
[GB_REG_NR24] = 0xBF,
[GB_REG_NR30] = 0x7F,
[GB_REG_NR31] = 0xFF,
[GB_REG_NR32] = 0x9F,
[GB_REG_NR33] = 0xFF,
[GB_REG_NR34] = 0xBF,
[GB_REG_NR41] = 0xFF,
[GB_REG_NR42] = 0x00,
[GB_REG_NR43] = 0x00,
[GB_REG_NR44] = 0xBF,
[GB_REG_NR50] = 0x00,
[GB_REG_NR51] = 0x00,
[GB_REG_NR52] = 0x70,
[GB_REG_STAT] = 0x80,
[GB_REG_KEY1] = 0x7E,
[GB_REG_VBK] = 0xFE,
[GB_REG_OCPS] = 0x40,
[GB_REG_BCPS] = 0x40,
[GB_REG_OPRI] = 0xFE,
[GB_REG_SVBK] = 0xF8,
[GB_REG_IE] = 0xE0,
};
static uint8_t _readKeys(struct GB* gb);
@ -161,257 +161,257 @@ void GBIOInit(struct GB* gb) {
void GBIOReset(struct GB* gb) {
memset(gb->memory.io, 0, sizeof(gb->memory.io));
GBIOWrite(gb, REG_TIMA, 0);
GBIOWrite(gb, REG_TMA, 0);
GBIOWrite(gb, REG_TAC, 0);
GBIOWrite(gb, REG_IF, 1);
GBIOWrite(gb, REG_NR52, 0xF1);
GBIOWrite(gb, REG_NR14, 0x3F);
GBIOWrite(gb, REG_NR10, 0x80);
GBIOWrite(gb, REG_NR11, 0xBF);
GBIOWrite(gb, REG_NR12, 0xF3);
GBIOWrite(gb, REG_NR13, 0xF3);
GBIOWrite(gb, REG_NR24, 0x3F);
GBIOWrite(gb, REG_NR21, 0x3F);
GBIOWrite(gb, REG_NR22, 0x00);
GBIOWrite(gb, REG_NR34, 0x3F);
GBIOWrite(gb, REG_NR30, 0x7F);
GBIOWrite(gb, REG_NR31, 0xFF);
GBIOWrite(gb, REG_NR32, 0x9F);
GBIOWrite(gb, REG_NR44, 0x3F);
GBIOWrite(gb, REG_NR41, 0xFF);
GBIOWrite(gb, REG_NR42, 0x00);
GBIOWrite(gb, REG_NR43, 0x00);
GBIOWrite(gb, REG_NR50, 0x77);
GBIOWrite(gb, REG_NR51, 0xF3);
GBIOWrite(gb, GB_REG_TIMA, 0);
GBIOWrite(gb, GB_REG_TMA, 0);
GBIOWrite(gb, GB_REG_TAC, 0);
GBIOWrite(gb, GB_REG_IF, 1);
GBIOWrite(gb, GB_REG_NR52, 0xF1);
GBIOWrite(gb, GB_REG_NR14, 0x3F);
GBIOWrite(gb, GB_REG_NR10, 0x80);
GBIOWrite(gb, GB_REG_NR11, 0xBF);
GBIOWrite(gb, GB_REG_NR12, 0xF3);
GBIOWrite(gb, GB_REG_NR13, 0xF3);
GBIOWrite(gb, GB_REG_NR24, 0x3F);
GBIOWrite(gb, GB_REG_NR21, 0x3F);
GBIOWrite(gb, GB_REG_NR22, 0x00);
GBIOWrite(gb, GB_REG_NR34, 0x3F);
GBIOWrite(gb, GB_REG_NR30, 0x7F);
GBIOWrite(gb, GB_REG_NR31, 0xFF);
GBIOWrite(gb, GB_REG_NR32, 0x9F);
GBIOWrite(gb, GB_REG_NR44, 0x3F);
GBIOWrite(gb, GB_REG_NR41, 0xFF);
GBIOWrite(gb, GB_REG_NR42, 0x00);
GBIOWrite(gb, GB_REG_NR43, 0x00);
GBIOWrite(gb, GB_REG_NR50, 0x77);
GBIOWrite(gb, GB_REG_NR51, 0xF3);
if (!gb->biosVf) {
GBIOWrite(gb, REG_LCDC, 0x91);
gb->memory.io[REG_BANK] = 1;
GBIOWrite(gb, GB_REG_LCDC, 0x91);
gb->memory.io[GB_REG_BANK] = 1;
} else {
GBIOWrite(gb, REG_LCDC, 0x00);
gb->memory.io[REG_BANK] = 0xFF;
GBIOWrite(gb, GB_REG_LCDC, 0x00);
gb->memory.io[GB_REG_BANK] = 0xFF;
}
GBIOWrite(gb, REG_SCY, 0x00);
GBIOWrite(gb, REG_SCX, 0x00);
GBIOWrite(gb, REG_LYC, 0x00);
gb->memory.io[REG_DMA] = 0xFF;
GBIOWrite(gb, REG_BGP, 0xFC);
GBIOWrite(gb, GB_REG_SCY, 0x00);
GBIOWrite(gb, GB_REG_SCX, 0x00);
GBIOWrite(gb, GB_REG_LYC, 0x00);
gb->memory.io[GB_REG_DMA] = 0xFF;
GBIOWrite(gb, GB_REG_BGP, 0xFC);
if (gb->model < GB_MODEL_CGB) {
GBIOWrite(gb, REG_OBP0, 0xFF);
GBIOWrite(gb, REG_OBP1, 0xFF);
GBIOWrite(gb, GB_REG_OBP0, 0xFF);
GBIOWrite(gb, GB_REG_OBP1, 0xFF);
}
GBIOWrite(gb, REG_WY, 0x00);
GBIOWrite(gb, REG_WX, 0x00);
GBIOWrite(gb, GB_REG_WY, 0x00);
GBIOWrite(gb, GB_REG_WX, 0x00);
if (gb->model & GB_MODEL_CGB) {
GBIOWrite(gb, REG_KEY0, 0);
GBIOWrite(gb, REG_JOYP, 0xFF);
GBIOWrite(gb, REG_VBK, 0);
GBIOWrite(gb, REG_BCPS, 0x80);
GBIOWrite(gb, REG_OCPS, 0);
GBIOWrite(gb, REG_SVBK, 1);
GBIOWrite(gb, REG_HDMA1, 0xFF);
GBIOWrite(gb, REG_HDMA2, 0xFF);
GBIOWrite(gb, REG_HDMA3, 0xFF);
GBIOWrite(gb, REG_HDMA4, 0xFF);
gb->memory.io[REG_HDMA5] = 0xFF;
GBIOWrite(gb, GB_REG_KEY0, 0);
GBIOWrite(gb, GB_REG_JOYP, 0xFF);
GBIOWrite(gb, GB_REG_VBK, 0);
GBIOWrite(gb, GB_REG_BCPS, 0x80);
GBIOWrite(gb, GB_REG_OCPS, 0);
GBIOWrite(gb, GB_REG_SVBK, 1);
GBIOWrite(gb, GB_REG_HDMA1, 0xFF);
GBIOWrite(gb, GB_REG_HDMA2, 0xFF);
GBIOWrite(gb, GB_REG_HDMA3, 0xFF);
GBIOWrite(gb, GB_REG_HDMA4, 0xFF);
gb->memory.io[GB_REG_HDMA5] = 0xFF;
} else if (gb->model & GB_MODEL_SGB) {
GBIOWrite(gb, REG_JOYP, 0xFF);
GBIOWrite(gb, GB_REG_JOYP, 0xFF);
}
GBIOWrite(gb, REG_IE, 0x00);
GBIOWrite(gb, GB_REG_IE, 0x00);
}
void GBIOWrite(struct GB* gb, unsigned address, uint8_t value) {
switch (address) {
case REG_SB:
case GB_REG_SB:
GBSIOWriteSB(&gb->sio, value);
break;
case REG_SC:
case GB_REG_SC:
GBSIOWriteSC(&gb->sio, value);
break;
case REG_DIV:
case GB_REG_DIV:
GBTimerDivReset(&gb->timer);
return;
case REG_NR10:
case GB_REG_NR10:
if (gb->audio.enable) {
GBAudioWriteNR10(&gb->audio, value);
} else {
value = 0;
}
break;
case REG_NR11:
case GB_REG_NR11:
if (gb->audio.enable) {
GBAudioWriteNR11(&gb->audio, value);
} else {
if (gb->audio.style == GB_AUDIO_DMG) {
GBAudioWriteNR11(&gb->audio, value & _registerMask[REG_NR11]);
GBAudioWriteNR11(&gb->audio, value & _registerMask[GB_REG_NR11]);
}
value = 0;
}
break;
case REG_NR12:
case GB_REG_NR12:
if (gb->audio.enable) {
GBAudioWriteNR12(&gb->audio, value);
} else {
value = 0;
}
break;
case REG_NR13:
case GB_REG_NR13:
if (gb->audio.enable) {
GBAudioWriteNR13(&gb->audio, value);
} else {
value = 0;
}
break;
case REG_NR14:
case GB_REG_NR14:
if (gb->audio.enable) {
GBAudioWriteNR14(&gb->audio, value);
} else {
value = 0;
}
break;
case REG_NR21:
case GB_REG_NR21:
if (gb->audio.enable) {
GBAudioWriteNR21(&gb->audio, value);
} else {
if (gb->audio.style == GB_AUDIO_DMG) {
GBAudioWriteNR21(&gb->audio, value & _registerMask[REG_NR21]);
GBAudioWriteNR21(&gb->audio, value & _registerMask[GB_REG_NR21]);
}
value = 0;
}
break;
case REG_NR22:
case GB_REG_NR22:
if (gb->audio.enable) {
GBAudioWriteNR22(&gb->audio, value);
} else {
value = 0;
}
break;
case REG_NR23:
case GB_REG_NR23:
if (gb->audio.enable) {
GBAudioWriteNR23(&gb->audio, value);
} else {
value = 0;
}
break;
case REG_NR24:
case GB_REG_NR24:
if (gb->audio.enable) {
GBAudioWriteNR24(&gb->audio, value);
} else {
value = 0;
}
break;
case REG_NR30:
case GB_REG_NR30:
if (gb->audio.enable) {
GBAudioWriteNR30(&gb->audio, value);
} else {
value = 0;
}
break;
case REG_NR31:
case GB_REG_NR31:
if (gb->audio.enable || gb->audio.style == GB_AUDIO_DMG) {
GBAudioWriteNR31(&gb->audio, value);
} else {
value = 0;
}
break;
case REG_NR32:
case GB_REG_NR32:
if (gb->audio.enable) {
GBAudioWriteNR32(&gb->audio, value);
} else {
value = 0;
}
break;
case REG_NR33:
case GB_REG_NR33:
if (gb->audio.enable) {
GBAudioWriteNR33(&gb->audio, value);
} else {
value = 0;
}
break;
case REG_NR34:
case GB_REG_NR34:
if (gb->audio.enable) {
GBAudioWriteNR34(&gb->audio, value);
} else {
value = 0;
}
break;
case REG_NR41:
case GB_REG_NR41:
if (gb->audio.enable || gb->audio.style == GB_AUDIO_DMG) {
GBAudioWriteNR41(&gb->audio, value);
} else {
value = 0;
}
break;
case REG_NR42:
case GB_REG_NR42:
if (gb->audio.enable) {
GBAudioWriteNR42(&gb->audio, value);
} else {
value = 0;
}
break;
case REG_NR43:
case GB_REG_NR43:
if (gb->audio.enable) {
GBAudioWriteNR43(&gb->audio, value);
} else {
value = 0;
}
break;
case REG_NR44:
case GB_REG_NR44:
if (gb->audio.enable) {
GBAudioWriteNR44(&gb->audio, value);
} else {
value = 0;
}
break;
case REG_NR50:
case GB_REG_NR50:
if (gb->audio.enable) {
GBAudioWriteNR50(&gb->audio, value);
} else {
value = 0;
}
break;
case REG_NR51:
case GB_REG_NR51:
if (gb->audio.enable) {
GBAudioWriteNR51(&gb->audio, value);
} else {
value = 0;
}
break;
case REG_NR52:
case GB_REG_NR52:
GBAudioWriteNR52(&gb->audio, value);
value &= 0x80;
value |= gb->memory.io[REG_NR52] & 0x0F;
value |= gb->memory.io[GB_REG_NR52] & 0x0F;
break;
case REG_WAVE_0:
case REG_WAVE_1:
case REG_WAVE_2:
case REG_WAVE_3:
case REG_WAVE_4:
case REG_WAVE_5:
case REG_WAVE_6:
case REG_WAVE_7:
case REG_WAVE_8:
case REG_WAVE_9:
case REG_WAVE_A:
case REG_WAVE_B:
case REG_WAVE_C:
case REG_WAVE_D:
case REG_WAVE_E:
case REG_WAVE_F:
case GB_REG_WAVE_0:
case GB_REG_WAVE_1:
case GB_REG_WAVE_2:
case GB_REG_WAVE_3:
case GB_REG_WAVE_4:
case GB_REG_WAVE_5:
case GB_REG_WAVE_6:
case GB_REG_WAVE_7:
case GB_REG_WAVE_8:
case GB_REG_WAVE_9:
case GB_REG_WAVE_A:
case GB_REG_WAVE_B:
case GB_REG_WAVE_C:
case GB_REG_WAVE_D:
case GB_REG_WAVE_E:
case GB_REG_WAVE_F:
if (!gb->audio.playingCh3 || gb->audio.style != GB_AUDIO_DMG) {
gb->audio.ch3.wavedata8[address - REG_WAVE_0] = value;
gb->audio.ch3.wavedata8[address - GB_REG_WAVE_0] = value;
} else if(gb->audio.ch3.readable) {
gb->audio.ch3.wavedata8[gb->audio.ch3.window >> 1] = value;
}
break;
case REG_JOYP:
gb->memory.io[REG_JOYP] = value | 0x0F;
case GB_REG_JOYP:
gb->memory.io[GB_REG_JOYP] = value | 0x0F;
_readKeys(gb);
if (gb->model & GB_MODEL_SGB) {
_writeSGBBits(gb, (value >> 4) & 3);
}
return;
case REG_TIMA:
case GB_REG_TIMA:
if (value && mTimingUntil(&gb->timing, &gb->timer.irq) > 1) {
mTimingDeschedule(&gb->timing, &gb->timer.irq);
}
@ -419,105 +419,105 @@ void GBIOWrite(struct GB* gb, unsigned address, uint8_t value) {
return;
}
break;
case REG_TMA:
case GB_REG_TMA:
if (mTimingUntil(&gb->timing, &gb->timer.irq) == -1) {
gb->memory.io[REG_TIMA] = value;
gb->memory.io[GB_REG_TIMA] = value;
}
break;
case REG_TAC:
case GB_REG_TAC:
value = GBTimerUpdateTAC(&gb->timer, value);
break;
case REG_IF:
gb->memory.io[REG_IF] = value | 0xE0;
case GB_REG_IF:
gb->memory.io[GB_REG_IF] = value | 0xE0;
GBUpdateIRQs(gb);
return;
case REG_LCDC:
case GB_REG_LCDC:
// TODO: handle GBC differences
GBVideoProcessDots(&gb->video, 0);
value = gb->video.renderer->writeVideoRegister(gb->video.renderer, address, value);
GBVideoWriteLCDC(&gb->video, value);
break;
case REG_LYC:
case GB_REG_LYC:
GBVideoWriteLYC(&gb->video, value);
break;
case REG_DMA:
case GB_REG_DMA:
GBMemoryDMA(gb, value << 8);
break;
case REG_SCY:
case REG_SCX:
case REG_WY:
case REG_WX:
case GB_REG_SCY:
case GB_REG_SCX:
case GB_REG_WY:
case GB_REG_WX:
GBVideoProcessDots(&gb->video, 0);
value = gb->video.renderer->writeVideoRegister(gb->video.renderer, address, value);
break;
case REG_BGP:
case REG_OBP0:
case REG_OBP1:
case GB_REG_BGP:
case GB_REG_OBP0:
case GB_REG_OBP1:
GBVideoProcessDots(&gb->video, 0);
GBVideoWritePalette(&gb->video, address, value);
break;
case REG_STAT:
case GB_REG_STAT:
GBVideoWriteSTAT(&gb->video, value);
value = gb->video.stat;
break;
case REG_BANK:
if (gb->memory.io[REG_BANK] != 0xFF) {
case GB_REG_BANK:
if (gb->memory.io[GB_REG_BANK] != 0xFF) {
break;
}
GBUnmapBIOS(gb);
if (gb->model >= GB_MODEL_CGB && gb->memory.io[REG_KEY0] < 0x80) {
if (gb->model >= GB_MODEL_CGB && gb->memory.io[GB_REG_KEY0] < 0x80) {
gb->model = GB_MODEL_DMG;
GBVideoDisableCGB(&gb->video);
}
break;
case REG_IE:
case GB_REG_IE:
gb->memory.ie = value;
GBUpdateIRQs(gb);
return;
default:
if (gb->model >= GB_MODEL_CGB) {
switch (address) {
case REG_KEY0:
case GB_REG_KEY0:
break;
case REG_KEY1:
case GB_REG_KEY1:
value &= 0x1;
value |= gb->memory.io[address] & 0x80;
break;
case REG_VBK:
case GB_REG_VBK:
GBVideoSwitchBank(&gb->video, value);
break;
case REG_HDMA1:
case REG_HDMA2:
case REG_HDMA3:
case REG_HDMA4:
case GB_REG_HDMA1:
case GB_REG_HDMA2:
case GB_REG_HDMA3:
case GB_REG_HDMA4:
// Handled transparently by the registers
break;
case REG_HDMA5:
case GB_REG_HDMA5:
value = GBMemoryWriteHDMA5(gb, value);
break;
case REG_BCPS:
case GB_REG_BCPS:
gb->video.bcpIndex = value & 0x3F;
gb->video.bcpIncrement = value & 0x80;
gb->memory.io[REG_BCPD] = gb->video.palette[gb->video.bcpIndex >> 1] >> (8 * (gb->video.bcpIndex & 1));
gb->memory.io[GB_REG_BCPD] = gb->video.palette[gb->video.bcpIndex >> 1] >> (8 * (gb->video.bcpIndex & 1));
break;
case REG_BCPD:
case GB_REG_BCPD:
if (gb->video.mode != 3) {
GBVideoProcessDots(&gb->video, 0);
}
GBVideoWritePalette(&gb->video, address, value);
return;
case REG_OCPS:
case GB_REG_OCPS:
gb->video.ocpIndex = value & 0x3F;
gb->video.ocpIncrement = value & 0x80;
gb->memory.io[REG_OCPD] = gb->video.palette[8 * 4 + (gb->video.ocpIndex >> 1)] >> (8 * (gb->video.ocpIndex & 1));
gb->memory.io[GB_REG_OCPD] = gb->video.palette[8 * 4 + (gb->video.ocpIndex >> 1)] >> (8 * (gb->video.ocpIndex & 1));
break;
case REG_OCPD:
case GB_REG_OCPD:
if (gb->video.mode != 3) {
GBVideoProcessDots(&gb->video, 0);
}
GBVideoWritePalette(&gb->video, address, value);
return;
case REG_SVBK:
case GB_REG_SVBK:
GBMemorySwitchWramBank(&gb->memory, value);
value = gb->memory.wramCurrentBank;
break;
@ -542,7 +542,7 @@ static uint8_t _readKeys(struct GB* gb) {
if (gb->sgbCurrentController != 0) {
keys = 0;
}
uint8_t joyp = gb->memory.io[REG_JOYP];
uint8_t joyp = gb->memory.io[GB_REG_JOYP];
switch (joyp & 0x30) {
case 0x30:
keys = gb->sgbCurrentController;
@ -556,12 +556,12 @@ static uint8_t _readKeys(struct GB* gb) {
keys |= keys >> 4;
break;
}
gb->memory.io[REG_JOYP] = (0xCF | joyp) ^ (keys & 0xF);
if (joyp & ~gb->memory.io[REG_JOYP] & 0xF) {
gb->memory.io[REG_IF] |= (1 << GB_IRQ_KEYPAD);
gb->memory.io[GB_REG_JOYP] = (0xCF | joyp) ^ (keys & 0xF);
if (joyp & ~gb->memory.io[GB_REG_JOYP] & 0xF) {
gb->memory.io[GB_REG_IF] |= (1 << GB_IRQ_KEYPAD);
GBUpdateIRQs(gb);
}
return gb->memory.io[REG_JOYP];
return gb->memory.io[GB_REG_JOYP];
}
static uint8_t _readKeysFiltered(struct GB* gb) {
@ -581,7 +581,7 @@ static uint8_t _readKeysFiltered(struct GB* gb) {
uint8_t GBIORead(struct GB* gb, unsigned address) {
switch (address) {
case REG_JOYP:
case GB_REG_JOYP:
{
size_t c;
for (c = 0; c < mCoreCallbacksListSize(&gb->coreCallbacks); ++c) {
@ -592,24 +592,24 @@ uint8_t GBIORead(struct GB* gb, unsigned address) {
}
}
return _readKeysFiltered(gb);
case REG_IE:
case GB_REG_IE:
return gb->memory.ie;
case REG_WAVE_0:
case REG_WAVE_1:
case REG_WAVE_2:
case REG_WAVE_3:
case REG_WAVE_4:
case REG_WAVE_5:
case REG_WAVE_6:
case REG_WAVE_7:
case REG_WAVE_8:
case REG_WAVE_9:
case REG_WAVE_A:
case REG_WAVE_B:
case REG_WAVE_C:
case REG_WAVE_D:
case REG_WAVE_E:
case REG_WAVE_F:
case GB_REG_WAVE_0:
case GB_REG_WAVE_1:
case GB_REG_WAVE_2:
case GB_REG_WAVE_3:
case GB_REG_WAVE_4:
case GB_REG_WAVE_5:
case GB_REG_WAVE_6:
case GB_REG_WAVE_7:
case GB_REG_WAVE_8:
case GB_REG_WAVE_9:
case GB_REG_WAVE_A:
case GB_REG_WAVE_B:
case GB_REG_WAVE_C:
case GB_REG_WAVE_D:
case GB_REG_WAVE_E:
case GB_REG_WAVE_F:
if (gb->audio.playingCh3) {
if (gb->audio.ch3.readable || gb->audio.style != GB_AUDIO_DMG) {
return gb->audio.ch3.wavedata8[gb->audio.ch3.window >> 1];
@ -617,62 +617,62 @@ uint8_t GBIORead(struct GB* gb, unsigned address) {
return 0xFF;
}
} else {
return gb->audio.ch3.wavedata8[address - REG_WAVE_0];
return gb->audio.ch3.wavedata8[address - GB_REG_WAVE_0];
}
break;
case REG_SB:
case REG_SC:
case REG_IF:
case REG_NR10:
case REG_NR11:
case REG_NR12:
case REG_NR14:
case REG_NR21:
case REG_NR22:
case REG_NR24:
case REG_NR30:
case REG_NR32:
case REG_NR34:
case REG_NR41:
case REG_NR42:
case REG_NR43:
case REG_NR44:
case REG_NR50:
case REG_NR51:
case REG_NR52:
case REG_DIV:
case REG_TIMA:
case REG_TMA:
case REG_TAC:
case REG_STAT:
case REG_LCDC:
case REG_SCY:
case REG_SCX:
case REG_LY:
case REG_LYC:
case REG_DMA:
case REG_BGP:
case REG_OBP0:
case REG_OBP1:
case REG_WY:
case REG_WX:
case GB_REG_SB:
case GB_REG_SC:
case GB_REG_IF:
case GB_REG_NR10:
case GB_REG_NR11:
case GB_REG_NR12:
case GB_REG_NR14:
case GB_REG_NR21:
case GB_REG_NR22:
case GB_REG_NR24:
case GB_REG_NR30:
case GB_REG_NR32:
case GB_REG_NR34:
case GB_REG_NR41:
case GB_REG_NR42:
case GB_REG_NR43:
case GB_REG_NR44:
case GB_REG_NR50:
case GB_REG_NR51:
case GB_REG_NR52:
case GB_REG_DIV:
case GB_REG_TIMA:
case GB_REG_TMA:
case GB_REG_TAC:
case GB_REG_STAT:
case GB_REG_LCDC:
case GB_REG_SCY:
case GB_REG_SCX:
case GB_REG_LY:
case GB_REG_LYC:
case GB_REG_DMA:
case GB_REG_BGP:
case GB_REG_OBP0:
case GB_REG_OBP1:
case GB_REG_WY:
case GB_REG_WX:
// Handled transparently by the registers
break;
default:
if (gb->model >= GB_MODEL_CGB) {
switch (address) {
case REG_KEY1:
case REG_VBK:
case REG_HDMA1:
case REG_HDMA2:
case REG_HDMA3:
case REG_HDMA4:
case REG_HDMA5:
case REG_BCPS:
case REG_BCPD:
case REG_OCPS:
case REG_OCPD:
case REG_SVBK:
case GB_REG_KEY1:
case GB_REG_VBK:
case GB_REG_HDMA1:
case GB_REG_HDMA2:
case GB_REG_HDMA3:
case GB_REG_HDMA4:
case GB_REG_HDMA5:
case GB_REG_BCPS:
case GB_REG_BCPD:
case GB_REG_OCPS:
case GB_REG_OCPD:
case GB_REG_SVBK:
// Handled transparently by the registers
goto success;
default:
@ -702,43 +702,43 @@ void GBIODeserialize(struct GB* gb, const struct GBSerializedState* state) {
gb->audio.enable = GBAudioEnableGetEnable(*gb->audio.nr52);
if (gb->audio.enable) {
GBIOWrite(gb, REG_NR10, gb->memory.io[REG_NR10]);
GBIOWrite(gb, REG_NR11, gb->memory.io[REG_NR11]);
GBIOWrite(gb, REG_NR12, gb->memory.io[REG_NR12]);
GBIOWrite(gb, REG_NR13, gb->memory.io[REG_NR13]);
GBIOWrite(gb, GB_REG_NR10, gb->memory.io[GB_REG_NR10]);
GBIOWrite(gb, GB_REG_NR11, gb->memory.io[GB_REG_NR11]);
GBIOWrite(gb, GB_REG_NR12, gb->memory.io[GB_REG_NR12]);
GBIOWrite(gb, GB_REG_NR13, gb->memory.io[GB_REG_NR13]);
gb->audio.ch1.control.frequency &= 0xFF;
gb->audio.ch1.control.frequency |= GBAudioRegisterControlGetFrequency(gb->memory.io[REG_NR14] << 8);
gb->audio.ch1.control.stop = GBAudioRegisterControlGetStop(gb->memory.io[REG_NR14] << 8);
GBIOWrite(gb, REG_NR21, gb->memory.io[REG_NR21]);
GBIOWrite(gb, REG_NR22, gb->memory.io[REG_NR22]);
GBIOWrite(gb, REG_NR23, gb->memory.io[REG_NR23]);
gb->audio.ch1.control.frequency |= GBAudioRegisterControlGetFrequency(gb->memory.io[GB_REG_NR14] << 8);
gb->audio.ch1.control.stop = GBAudioRegisterControlGetStop(gb->memory.io[GB_REG_NR14] << 8);
GBIOWrite(gb, GB_REG_NR21, gb->memory.io[GB_REG_NR21]);
GBIOWrite(gb, GB_REG_NR22, gb->memory.io[GB_REG_NR22]);
GBIOWrite(gb, GB_REG_NR23, gb->memory.io[GB_REG_NR23]);
gb->audio.ch2.control.frequency &= 0xFF;
gb->audio.ch2.control.frequency |= GBAudioRegisterControlGetFrequency(gb->memory.io[REG_NR24] << 8);
gb->audio.ch2.control.stop = GBAudioRegisterControlGetStop(gb->memory.io[REG_NR24] << 8);
GBIOWrite(gb, REG_NR30, gb->memory.io[REG_NR30]);
GBIOWrite(gb, REG_NR31, gb->memory.io[REG_NR31]);
GBIOWrite(gb, REG_NR32, gb->memory.io[REG_NR32]);
GBIOWrite(gb, REG_NR33, gb->memory.io[REG_NR33]);
gb->audio.ch2.control.frequency |= GBAudioRegisterControlGetFrequency(gb->memory.io[GB_REG_NR24] << 8);
gb->audio.ch2.control.stop = GBAudioRegisterControlGetStop(gb->memory.io[GB_REG_NR24] << 8);
GBIOWrite(gb, GB_REG_NR30, gb->memory.io[GB_REG_NR30]);
GBIOWrite(gb, GB_REG_NR31, gb->memory.io[GB_REG_NR31]);
GBIOWrite(gb, GB_REG_NR32, gb->memory.io[GB_REG_NR32]);
GBIOWrite(gb, GB_REG_NR33, gb->memory.io[GB_REG_NR33]);
gb->audio.ch3.rate &= 0xFF;
gb->audio.ch3.rate |= GBAudioRegisterControlGetRate(gb->memory.io[REG_NR34] << 8);
gb->audio.ch3.stop = GBAudioRegisterControlGetStop(gb->memory.io[REG_NR34] << 8);
GBIOWrite(gb, REG_NR41, gb->memory.io[REG_NR41]);
GBIOWrite(gb, REG_NR42, gb->memory.io[REG_NR42]);
GBIOWrite(gb, REG_NR43, gb->memory.io[REG_NR43]);
gb->audio.ch4.stop = GBAudioRegisterNoiseControlGetStop(gb->memory.io[REG_NR44]);
GBIOWrite(gb, REG_NR50, gb->memory.io[REG_NR50]);
GBIOWrite(gb, REG_NR51, gb->memory.io[REG_NR51]);
gb->audio.ch3.rate |= GBAudioRegisterControlGetRate(gb->memory.io[GB_REG_NR34] << 8);
gb->audio.ch3.stop = GBAudioRegisterControlGetStop(gb->memory.io[GB_REG_NR34] << 8);
GBIOWrite(gb, GB_REG_NR41, gb->memory.io[GB_REG_NR41]);
GBIOWrite(gb, GB_REG_NR42, gb->memory.io[GB_REG_NR42]);
GBIOWrite(gb, GB_REG_NR43, gb->memory.io[GB_REG_NR43]);
gb->audio.ch4.stop = GBAudioRegisterNoiseControlGetStop(gb->memory.io[GB_REG_NR44]);
GBIOWrite(gb, GB_REG_NR50, gb->memory.io[GB_REG_NR50]);
GBIOWrite(gb, GB_REG_NR51, gb->memory.io[GB_REG_NR51]);
}
gb->video.renderer->writeVideoRegister(gb->video.renderer, REG_LCDC, state->io[REG_LCDC]);
gb->video.renderer->writeVideoRegister(gb->video.renderer, REG_SCY, state->io[REG_SCY]);
gb->video.renderer->writeVideoRegister(gb->video.renderer, REG_SCX, state->io[REG_SCX]);
gb->video.renderer->writeVideoRegister(gb->video.renderer, REG_WY, state->io[REG_WY]);
gb->video.renderer->writeVideoRegister(gb->video.renderer, REG_WX, state->io[REG_WX]);
gb->video.renderer->writeVideoRegister(gb->video.renderer, GB_REG_LCDC, state->io[GB_REG_LCDC]);
gb->video.renderer->writeVideoRegister(gb->video.renderer, GB_REG_SCY, state->io[GB_REG_SCY]);
gb->video.renderer->writeVideoRegister(gb->video.renderer, GB_REG_SCX, state->io[GB_REG_SCX]);
gb->video.renderer->writeVideoRegister(gb->video.renderer, GB_REG_WY, state->io[GB_REG_WY]);
gb->video.renderer->writeVideoRegister(gb->video.renderer, GB_REG_WX, state->io[GB_REG_WX]);
if (gb->model & GB_MODEL_SGB) {
gb->video.renderer->writeVideoRegister(gb->video.renderer, REG_BGP, state->io[REG_BGP]);
gb->video.renderer->writeVideoRegister(gb->video.renderer, REG_OBP0, state->io[REG_OBP0]);
gb->video.renderer->writeVideoRegister(gb->video.renderer, REG_OBP1, state->io[REG_OBP1]);
gb->video.renderer->writeVideoRegister(gb->video.renderer, GB_REG_BGP, state->io[GB_REG_BGP]);
gb->video.renderer->writeVideoRegister(gb->video.renderer, GB_REG_OBP0, state->io[GB_REG_OBP0]);
gb->video.renderer->writeVideoRegister(gb->video.renderer, GB_REG_OBP1, state->io[GB_REG_OBP1]);
}
gb->video.stat = state->io[REG_STAT];
gb->video.stat = state->io[GB_REG_STAT];
}

32
src/gb/memory.c
View File

@ -328,7 +328,7 @@ uint8_t GBLoad8(struct SM83Core* cpu, uint16_t address) {
if (address < GB_BASE_IE) {
return memory->hram[address & GB_SIZE_HRAM];
}
return GBIORead(gb, REG_IE);
return GBIORead(gb, GB_REG_IE);
}
}
@ -398,7 +398,7 @@ void GBStore8(struct SM83Core* cpu, uint16_t address, int8_t value) {
} else if (address < GB_BASE_IE) {
memory->hram[address & GB_SIZE_HRAM] = value;
} else {
GBIOWrite(gb, REG_IE, value);
GBIOWrite(gb, GB_REG_IE, value);
}
}
}
@ -522,7 +522,7 @@ uint8_t GBView8(struct SM83Core* cpu, uint16_t address, int segment) {
if (address < GB_BASE_IE) {
return memory->hram[address & GB_SIZE_HRAM];
}
return GBIORead(gb, REG_IE);
return GBIORead(gb, GB_REG_IE);
}
}
@ -541,10 +541,10 @@ void GBMemoryDMA(struct GB* gb, uint16_t base) {
}
uint8_t GBMemoryWriteHDMA5(struct GB* gb, uint8_t value) {
gb->memory.hdmaSource = gb->memory.io[REG_HDMA1] << 8;
gb->memory.hdmaSource |= gb->memory.io[REG_HDMA2];
gb->memory.hdmaDest = gb->memory.io[REG_HDMA3] << 8;
gb->memory.hdmaDest |= gb->memory.io[REG_HDMA4];
gb->memory.hdmaSource = gb->memory.io[GB_REG_HDMA1] << 8;
gb->memory.hdmaSource |= gb->memory.io[GB_REG_HDMA2];
gb->memory.hdmaDest = gb->memory.io[GB_REG_HDMA3] << 8;
gb->memory.hdmaDest |= gb->memory.io[GB_REG_HDMA4];
gb->memory.hdmaSource &= 0xFFF0;
if (gb->memory.hdmaSource >= 0x8000 && gb->memory.hdmaSource < 0xA000) {
mLOG(GB_MEM, GAME_ERROR, "Invalid HDMA source: %04X", gb->memory.hdmaSource);
@ -554,7 +554,7 @@ uint8_t GBMemoryWriteHDMA5(struct GB* gb, uint8_t value) {
gb->memory.hdmaDest |= 0x8000;
bool wasHdma = gb->memory.isHdma;
gb->memory.isHdma = value & 0x80;
if ((!wasHdma && !gb->memory.isHdma) || (GBRegisterLCDCIsEnable(gb->memory.io[REG_LCDC]) && gb->video.mode == 0)) {
if ((!wasHdma && !gb->memory.isHdma) || (GBRegisterLCDCIsEnable(gb->memory.io[GB_REG_LCDC]) && gb->video.mode == 0)) {
if (gb->memory.isHdma) {
gb->memory.hdmaRemaining = 0x10;
} else {
@ -562,7 +562,7 @@ uint8_t GBMemoryWriteHDMA5(struct GB* gb, uint8_t value) {
}
gb->cpuBlocked = true;
mTimingSchedule(&gb->timing, &gb->memory.hdmaEvent, 0);
} else if (gb->memory.isHdma && !GBRegisterLCDCIsEnable(gb->memory.io[REG_LCDC])) {
} else if (gb->memory.isHdma && !GBRegisterLCDCIsEnable(gb->memory.io[GB_REG_LCDC])) {
return 0x80 | ((value + 1) & 0x7F);
}
return value & 0x7F;
@ -597,17 +597,17 @@ void _GBMemoryHDMAService(struct mTiming* timing, void* context, uint32_t cycles
mTimingSchedule(timing, &gb->memory.hdmaEvent, 2 - cyclesLate);
} else {
gb->cpuBlocked = false;
gb->memory.io[REG_HDMA1] = gb->memory.hdmaSource >> 8;
gb->memory.io[REG_HDMA2] = gb->memory.hdmaSource;
gb->memory.io[REG_HDMA3] = gb->memory.hdmaDest >> 8;
gb->memory.io[REG_HDMA4] = gb->memory.hdmaDest;
gb->memory.io[GB_REG_HDMA1] = gb->memory.hdmaSource >> 8;
gb->memory.io[GB_REG_HDMA2] = gb->memory.hdmaSource;
gb->memory.io[GB_REG_HDMA3] = gb->memory.hdmaDest >> 8;
gb->memory.io[GB_REG_HDMA4] = gb->memory.hdmaDest;
if (gb->memory.isHdma) {
--gb->memory.io[REG_HDMA5];
if (gb->memory.io[REG_HDMA5] == 0xFF) {
--gb->memory.io[GB_REG_HDMA5];
if (gb->memory.io[GB_REG_HDMA5] == 0xFF) {
gb->memory.isHdma = false;
}
} else {
gb->memory.io[REG_HDMA5] = 0xFF;
gb->memory.io[GB_REG_HDMA5] = 0xFF;
}
}
}

4
src/gb/renderers/cache-set.c
View File

@ -38,7 +38,7 @@ void GBVideoCacheAssociate(struct mCacheSet* cache, struct GBVideo* video) {
mMapCacheConfigureSystem(mMapCacheSetGetPointer(&cache->maps, 0), sysconfig);
mMapCacheConfigureSystem(mMapCacheSetGetPointer(&cache->maps, 1), sysconfig);
GBVideoCacheWriteVideoRegister(cache, REG_LCDC, video->p->memory.io[REG_LCDC]);
GBVideoCacheWriteVideoRegister(cache, GB_REG_LCDC, video->p->memory.io[GB_REG_LCDC]);
}
static void mapParserDMG0(struct mMapCache* cache, struct mMapCacheEntry* entry, void* vram) {
@ -80,7 +80,7 @@ static void mapParserCGB1(struct mMapCache* cache, struct mMapCacheEntry* entry,
}
void GBVideoCacheWriteVideoRegister(struct mCacheSet* cache, uint16_t address, uint8_t value) {
if (address != REG_LCDC) {
if (address != GB_REG_LCDC) {
return;
}
struct mMapCache* map = mMapCacheSetGetPointer(&cache->maps, 0);

16
src/gb/renderers/software.c
View File

@ -257,37 +257,37 @@ static uint8_t GBVideoSoftwareRendererWriteVideoRegister(struct GBVideoRenderer*
bool wasWindow = _inWindow(softwareRenderer);
uint8_t wy = softwareRenderer->wy;
switch (address) {
case REG_LCDC:
case GB_REG_LCDC:
softwareRenderer->lcdc = value;
GBVideoSoftwareRendererUpdateWindow(softwareRenderer, wasWindow, _inWindow(softwareRenderer), wy);
break;
case REG_SCY:
case GB_REG_SCY:
softwareRenderer->scy = value;
break;
case REG_SCX:
case GB_REG_SCX:
softwareRenderer->scx = value;
break;
case REG_WY:
case GB_REG_WY:
softwareRenderer->wy = value;
GBVideoSoftwareRendererUpdateWindow(softwareRenderer, wasWindow, _inWindow(softwareRenderer), wy);
break;
case REG_WX:
case GB_REG_WX:
softwareRenderer->wx = value;
GBVideoSoftwareRendererUpdateWindow(softwareRenderer, wasWindow, _inWindow(softwareRenderer), wy);
break;
case REG_BGP:
case GB_REG_BGP:
softwareRenderer->lookup[0] = value & 3;
softwareRenderer->lookup[1] = (value >> 2) & 3;
softwareRenderer->lookup[2] = (value >> 4) & 3;
softwareRenderer->lookup[3] = (value >> 6) & 3;
break;
case REG_OBP0:
case GB_REG_OBP0:
softwareRenderer->lookup[0x20 + 0] = value & 3;
softwareRenderer->lookup[0x20 + 1] = (value >> 2) & 3;
softwareRenderer->lookup[0x20 + 2] = (value >> 4) & 3;
softwareRenderer->lookup[0x20 + 3] = (value >> 6) & 3;
break;
case REG_OBP1:
case GB_REG_OBP1:
softwareRenderer->lookup[0x24 + 0] = value & 3;
softwareRenderer->lookup[0x24 + 1] = (value >> 2) & 3;
softwareRenderer->lookup[0x24 + 2] = (value >> 4) & 3;

4
src/gb/serialize.c
View File

@ -139,7 +139,7 @@ bool GBDeserialize(struct GB* gb, const struct GBSerializedState* state) {
mLOG(GB_STATE, WARN, "Savestate is corrupted: OCPS is out of range");
}
bool differentBios = !gb->biosVf || gb->model != state->model;
if (state->io[REG_BANK] == 0xFF) {
if (state->io[GB_REG_BANK] == 0xFF) {
if (differentBios) {
mLOG(GB_STATE, WARN, "Incompatible savestate, please restart with correct BIOS in %s mode", GBModelToName(state->model));
error = true;
@ -206,7 +206,7 @@ bool GBDeserialize(struct GB* gb, const struct GBSerializedState* state) {
GBTimerDeserialize(&gb->timer, state);
GBAudioDeserialize(&gb->audio, state);
if (gb->memory.io[REG_BANK] == 0xFF) {
if (gb->memory.io[GB_REG_BANK] == 0xFF) {
GBMapBIOS(gb);
} else {
GBUnmapBIOS(gb);

8
src/gb/sio.c
View File

@ -66,13 +66,13 @@ void _GBSIOProcessEvents(struct mTiming* timing, void* context, uint32_t cyclesL
if (sio->remainingBits) {
doIRQ = true;
--sio->remainingBits;
sio->p->memory.io[REG_SB] &= ~(128 >> sio->remainingBits);
sio->p->memory.io[REG_SB] |= sio->pendingSB & (128 >> sio->remainingBits);
sio->p->memory.io[GB_REG_SB] &= ~(128 >> sio->remainingBits);
sio->p->memory.io[GB_REG_SB] |= sio->pendingSB & (128 >> sio->remainingBits);
}
if (!sio->remainingBits) {
sio->p->memory.io[REG_SC] = GBRegisterSCClearEnable(sio->p->memory.io[REG_SC]);
sio->p->memory.io[GB_REG_SC] = GBRegisterSCClearEnable(sio->p->memory.io[GB_REG_SC]);
if (doIRQ) {
sio->p->memory.io[REG_IF] |= (1 << GB_IRQ_SIO);
sio->p->memory.io[GB_REG_IF] |= (1 << GB_IRQ_SIO);
GBUpdateIRQs(sio->p);
sio->pendingSB = 0xFF;
}

2
src/gb/sio/lockstep.c
View File

@ -90,7 +90,7 @@ static void _finishTransfer(struct GBSIOLockstepNode* node) {
}
struct GBSIO* sio = node->d.p;
sio->pendingSB = node->p->pendingSB[!node->id];
if (GBRegisterSCIsEnable(sio->p->memory.io[REG_SC])) {
if (GBRegisterSCIsEnable(sio->p->memory.io[GB_REG_SC])) {
sio->remainingBits = 8;
mTimingDeschedule(&sio->p->timing, &sio->event);
mTimingSchedule(&sio->p->timing, &sio->event, 0);

16
src/gb/timer.c
View File

@ -14,8 +14,8 @@ void _GBTimerIRQ(struct mTiming* timing, void* context, uint32_t cyclesLate) {
UNUSED(timing);
UNUSED(cyclesLate);
struct GBTimer* timer = context;
timer->p->memory.io[REG_TIMA] = timer->p->memory.io[REG_TMA];
timer->p->memory.io[REG_IF] |= (1 << GB_IRQ_TIMER);
timer->p->memory.io[GB_REG_TIMA] = timer->p->memory.io[GB_REG_TMA];
timer->p->memory.io[GB_REG_IF] |= (1 << GB_IRQ_TIMER);
GBUpdateIRQs(timer->p);
}
@ -25,8 +25,8 @@ static void _GBTimerDivIncrement(struct GBTimer* timer, uint32_t cyclesLate) {
// Make sure to trigger when the correct bit is a falling edge
if (timer->timaPeriod > 0 && (timer->internalDiv & (timer->timaPeriod - 1)) == timer->timaPeriod - 1) {
++timer->p->memory.io[REG_TIMA];
if (!timer->p->memory.io[REG_TIMA]) {
++timer->p->memory.io[GB_REG_TIMA];
if (!timer->p->memory.io[GB_REG_TIMA]) {
mTimingSchedule(&timer->p->timing, &timer->irq, 7 - ((timer->p->cpu->executionState - cyclesLate) & 3));
}
}
@ -35,7 +35,7 @@ static void _GBTimerDivIncrement(struct GBTimer* timer, uint32_t cyclesLate) {
GBAudioUpdateFrame(&timer->p->audio, &timer->p->timing);
}
++timer->internalDiv;
timer->p->memory.io[REG_DIV] = timer->internalDiv >> 4;
timer->p->memory.io[GB_REG_DIV] = timer->internalDiv >> 4;
}
}
@ -75,8 +75,8 @@ void GBTimerDivReset(struct GBTimer* timer) {
mTimingDeschedule(&timer->p->timing, &timer->event);
_GBTimerDivIncrement(timer, 0);
if (((timer->internalDiv << 1) | ((timer->nextDiv >> 3) & 1)) & timer->timaPeriod) {
++timer->p->memory.io[REG_TIMA];
if (!timer->p->memory.io[REG_TIMA]) {
++timer->p->memory.io[GB_REG_TIMA];
if (!timer->p->memory.io[GB_REG_TIMA]) {
mTimingSchedule(&timer->p->timing, &timer->irq, 7 - (timer->p->cpu->executionState & 3));
}
}
@ -84,7 +84,7 @@ void GBTimerDivReset(struct GBTimer* timer) {
if (timer->internalDiv & timingFactor) {
GBAudioUpdateFrame(&timer->p->audio, &timer->p->timing);
}
timer->p->memory.io[REG_DIV] = 0;
timer->p->memory.io[GB_REG_DIV] = 0;
timer->internalDiv = 0;
timer->nextDiv = GB_DMG_DIV_PERIOD;
mTimingSchedule(&timer->p->timing, &timer->event, timer->nextDiv - ((timer->p->cpu->executionState + 1) & 3));

108
src/gb/video.c
View File

@ -239,19 +239,19 @@ void GBVideoSkipBIOS(struct GBVideo* video) {
int32_t next;
if (video->p->model == GB_MODEL_CGB) {
video->ly = GB_VIDEO_VERTICAL_PIXELS;
video->p->memory.io[REG_LY] = video->ly;
video->p->memory.io[GB_REG_LY] = video->ly;
video->stat = GBRegisterSTATClearLYC(video->stat);
next = 20;
} else {
video->ly = GB_VIDEO_VERTICAL_TOTAL_PIXELS;
video->p->memory.io[REG_LY] = 0;
video->p->memory.io[GB_REG_LY] = 0;
next = 56;
}
video->stat = GBRegisterSTATSetMode(video->stat, video->mode);
video->p->memory.io[REG_IF] |= (1 << GB_IRQ_VBLANK);
video->p->memory.io[GB_REG_IF] |= (1 << GB_IRQ_VBLANK);
GBUpdateIRQs(video->p);
video->p->memory.io[REG_STAT] = video->stat;
video->p->memory.io[GB_REG_STAT] = video->stat;
mTimingDeschedule(&video->p->timing, &video->modeEvent);
mTimingSchedule(&video->p->timing, &video->modeEvent, next);
}
@ -261,10 +261,10 @@ void _endMode0(struct mTiming* timing, void* context, uint32_t cyclesLate) {
if (video->frameskipCounter <= 0) {
video->renderer->finishScanline(video->renderer, video->ly);
}
int lyc = video->p->memory.io[REG_LYC];
int lyc = video->p->memory.io[GB_REG_LYC];
int32_t next;
++video->ly;
video->p->memory.io[REG_LY] = video->ly;
video->p->memory.io[GB_REG_LY] = video->ly;
GBRegisterSTAT oldStat = video->stat;
if (video->ly < GB_VIDEO_VERTICAL_PIXELS) {
next = GB_VIDEO_MODE_2_LENGTH;
@ -279,68 +279,68 @@ void _endMode0(struct mTiming* timing, void* context, uint32_t cyclesLate) {
mTimingSchedule(&video->p->timing, &video->frameEvent, -cyclesLate);
if (!_statIRQAsserted(oldStat) && GBRegisterSTATIsOAMIRQ(video->stat)) {
video->p->memory.io[REG_IF] |= (1 << GB_IRQ_LCDSTAT);
video->p->memory.io[GB_REG_IF] |= (1 << GB_IRQ_LCDSTAT);
}
video->p->memory.io[REG_IF] |= (1 << GB_IRQ_VBLANK);
video->p->memory.io[GB_REG_IF] |= (1 << GB_IRQ_VBLANK);
}
video->stat = GBRegisterSTATSetMode(video->stat, video->mode);
if (!_statIRQAsserted(oldStat) && _statIRQAsserted(video->stat)) {
video->p->memory.io[REG_IF] |= (1 << GB_IRQ_LCDSTAT);
video->p->memory.io[GB_REG_IF] |= (1 << GB_IRQ_LCDSTAT);
}
// LYC stat is delayed 1 T-cycle
oldStat = video->stat;
video->stat = GBRegisterSTATSetLYC(video->stat, lyc == video->ly);
if (!_statIRQAsserted(oldStat) && _statIRQAsserted(video->stat)) {
video->p->memory.io[REG_IF] |= (1 << GB_IRQ_LCDSTAT);
video->p->memory.io[GB_REG_IF] |= (1 << GB_IRQ_LCDSTAT);
}
GBUpdateIRQs(video->p);
video->p->memory.io[REG_STAT] = video->stat;
video->p->memory.io[GB_REG_STAT] = video->stat;
mTimingSchedule(timing, &video->modeEvent, (next << video->p->doubleSpeed) - cyclesLate);
}
void _endMode1(struct mTiming* timing, void* context, uint32_t cyclesLate) {
struct GBVideo* video = context;
if (!GBRegisterLCDCIsEnable(video->p->memory.io[REG_LCDC])) {
if (!GBRegisterLCDCIsEnable(video->p->memory.io[GB_REG_LCDC])) {
return;
}
int lyc = video->p->memory.io[REG_LYC];
int lyc = video->p->memory.io[GB_REG_LYC];
// TODO: One M-cycle delay
++video->ly;
int32_t next;
if (video->ly == GB_VIDEO_VERTICAL_TOTAL_PIXELS + 1) {
video->ly = 0;
video->p->memory.io[REG_LY] = video->ly;
video->p->memory.io[GB_REG_LY] = video->ly;
next = GB_VIDEO_MODE_2_LENGTH;
video->mode = 2;
video->modeEvent.callback = _endMode2;
} else if (video->ly == GB_VIDEO_VERTICAL_TOTAL_PIXELS) {
video->p->memory.io[REG_LY] = 0;
video->p->memory.io[GB_REG_LY] = 0;
next = GB_VIDEO_HORIZONTAL_LENGTH - 8;
} else if (video->ly == GB_VIDEO_VERTICAL_TOTAL_PIXELS - 1) {
video->p->memory.io[REG_LY] = video->ly;
video->p->memory.io[GB_REG_LY] = video->ly;
next = 8;
} else {
video->p->memory.io[REG_LY] = video->ly;
video->p->memory.io[GB_REG_LY] = video->ly;
next = GB_VIDEO_HORIZONTAL_LENGTH;
}
GBRegisterSTAT oldStat = video->stat;
video->stat = GBRegisterSTATSetMode(video->stat, video->mode);
video->stat = GBRegisterSTATSetLYC(video->stat, lyc == video->p->memory.io[REG_LY]);
video->stat = GBRegisterSTATSetLYC(video->stat, lyc == video->p->memory.io[GB_REG_LY]);
if (!_statIRQAsserted(oldStat) && _statIRQAsserted(video->stat)) {
video->p->memory.io[REG_IF] |= (1 << GB_IRQ_LCDSTAT);
video->p->memory.io[GB_REG_IF] |= (1 << GB_IRQ_LCDSTAT);
GBUpdateIRQs(video->p);
}
video->p->memory.io[REG_STAT] = video->stat;
video->p->memory.io[GB_REG_STAT] = video->stat;
mTimingSchedule(timing, &video->modeEvent, (next << video->p->doubleSpeed) - cyclesLate);
}
void _endMode2(struct mTiming* timing, void* context, uint32_t cyclesLate) {
struct GBVideo* video = context;
_cleanOAM(video, video->ly);
video->x = -(video->p->memory.io[REG_SCX] & 7);
video->x = -(video->p->memory.io[GB_REG_SCX] & 7);
video->dotClock = mTimingCurrentTime(timing) - cyclesLate + 5 - (video->x << video->p->doubleSpeed);
int32_t next = GB_VIDEO_MODE_3_LENGTH_BASE + video->objMax * 6 - video->x;
video->mode = 3;
@ -348,17 +348,17 @@ void _endMode2(struct mTiming* timing, void* context, uint32_t cyclesLate) {
GBRegisterSTAT oldStat = video->stat;
video->stat = GBRegisterSTATSetMode(video->stat, video->mode);
if (!_statIRQAsserted(oldStat) && _statIRQAsserted(video->stat)) {
video->p->memory.io[REG_IF] |= (1 << GB_IRQ_LCDSTAT);
video->p->memory.io[GB_REG_IF] |= (1 << GB_IRQ_LCDSTAT);
GBUpdateIRQs(video->p);
}
video->p->memory.io[REG_STAT] = video->stat;
video->p->memory.io[GB_REG_STAT] = video->stat;
mTimingSchedule(timing, &video->modeEvent, (next << video->p->doubleSpeed) - cyclesLate);
}
void _endMode3(struct mTiming* timing, void* context, uint32_t cyclesLate) {
struct GBVideo* video = context;
GBVideoProcessDots(video, cyclesLate);
if (video->ly < GB_VIDEO_VERTICAL_PIXELS && video->p->memory.isHdma && video->p->memory.io[REG_HDMA5] != 0xFF) {
if (video->ly < GB_VIDEO_VERTICAL_PIXELS && video->p->memory.isHdma && video->p->memory.io[GB_REG_HDMA5] != 0xFF) {
video->p->memory.hdmaRemaining = 0x10;
video->p->cpuBlocked = true;
mTimingDeschedule(timing, &video->p->memory.hdmaEvent);
@ -369,12 +369,12 @@ void _endMode3(struct mTiming* timing, void* context, uint32_t cyclesLate) {
GBRegisterSTAT oldStat = video->stat;
video->stat = GBRegisterSTATSetMode(video->stat, video->mode);
if (!_statIRQAsserted(oldStat) && _statIRQAsserted(video->stat)) {
video->p->memory.io[REG_IF] |= (1 << GB_IRQ_LCDSTAT);
video->p->memory.io[GB_REG_IF] |= (1 << GB_IRQ_LCDSTAT);
GBUpdateIRQs(video->p);
}
video->p->memory.io[REG_STAT] = video->stat;
video->p->memory.io[GB_REG_STAT] = video->stat;
// TODO: Cache SCX & 7 in case it changes
int32_t next = GB_VIDEO_MODE_0_LENGTH_BASE - video->objMax * 6 - (video->p->memory.io[REG_SCX] & 7);
int32_t next = GB_VIDEO_MODE_0_LENGTH_BASE - video->objMax * 6 - (video->p->memory.io[GB_REG_SCX] & 7);
mTimingSchedule(timing, &video->modeEvent, (next << video->p->doubleSpeed) - cyclesLate);
}
@ -385,7 +385,7 @@ void _updateFrameCount(struct mTiming* timing, void* context, uint32_t cyclesLat
mTimingSchedule(timing, &video->frameEvent, 4 - ((video->p->cpu->executionState + 1) & 3));
return;
}
if (!GBRegisterLCDCIsEnable(video->p->memory.io[REG_LCDC])) {
if (!GBRegisterLCDCIsEnable(video->p->memory.io[GB_REG_LCDC])) {
mTimingSchedule(timing, &video->frameEvent, GB_VIDEO_TOTAL_LENGTH);
}
@ -404,7 +404,7 @@ void _updateFrameCount(struct mTiming* timing, void* context, uint32_t cyclesLat
static void _cleanOAM(struct GBVideo* video, int y) {
int spriteHeight = 8;
if (GBRegisterLCDCIsObjSize(video->p->memory.io[REG_LCDC])) {
if (GBRegisterLCDCIsObjSize(video->p->memory.io[GB_REG_LCDC])) {
spriteHeight = 16;
}
int o = 0;
@ -439,7 +439,7 @@ void GBVideoProcessDots(struct GBVideo* video, uint32_t cyclesLate) {
}
void GBVideoWriteLCDC(struct GBVideo* video, GBRegisterLCDC value) {
if (!GBRegisterLCDCIsEnable(video->p->memory.io[REG_LCDC]) && GBRegisterLCDCIsEnable(value)) {
if (!GBRegisterLCDCIsEnable(video->p->memory.io[GB_REG_LCDC]) && GBRegisterLCDCIsEnable(value)) {
video->mode = 2;
video->modeEvent.callback = _endMode2;
int32_t next = GB_VIDEO_MODE_2_LENGTH - 5; // TODO: Why is this fudge factor needed? Might be related to T-cycles for load/store differing
@ -447,64 +447,64 @@ void GBVideoWriteLCDC(struct GBVideo* video, GBRegisterLCDC value) {
mTimingSchedule(&video->p->timing, &video->modeEvent, next << video->p->doubleSpeed);
video->ly = 0;
video->p->memory.io[REG_LY] = 0;
video->p->memory.io[GB_REG_LY] = 0;
GBRegisterSTAT oldStat = video->stat;
video->stat = GBRegisterSTATSetMode(video->stat, 0);
video->stat = GBRegisterSTATSetLYC(video->stat, video->ly == video->p->memory.io[REG_LYC]);
video->stat = GBRegisterSTATSetLYC(video->stat, video->ly == video->p->memory.io[GB_REG_LYC]);
if (!_statIRQAsserted(oldStat) && _statIRQAsserted(video->stat)) {
video->p->memory.io[REG_IF] |= (1 << GB_IRQ_LCDSTAT);
video->p->memory.io[GB_REG_IF] |= (1 << GB_IRQ_LCDSTAT);
GBUpdateIRQs(video->p);
}
video->p->memory.io[REG_STAT] = video->stat;
video->p->memory.io[GB_REG_STAT] = video->stat;
video->renderer->writePalette(video->renderer, 0, video->palette[0]);
mTimingDeschedule(&video->p->timing, &video->frameEvent);
}
if (GBRegisterLCDCIsEnable(video->p->memory.io[REG_LCDC]) && !GBRegisterLCDCIsEnable(value)) {
if (GBRegisterLCDCIsEnable(video->p->memory.io[GB_REG_LCDC]) && !GBRegisterLCDCIsEnable(value)) {
// TODO: Fix serialization; this gets internal and visible modes out of sync
video->mode = 0;
video->stat = GBRegisterSTATSetMode(video->stat, 0);
video->p->memory.io[REG_STAT] = video->stat;
video->p->memory.io[GB_REG_STAT] = video->stat;
video->ly = 0;
video->p->memory.io[REG_LY] = 0;
video->p->memory.io[GB_REG_LY] = 0;
video->renderer->writePalette(video->renderer, 0, video->dmgPalette[0]);
mTimingDeschedule(&video->p->timing, &video->modeEvent);
mTimingDeschedule(&video->p->timing, &video->frameEvent);
mTimingSchedule(&video->p->timing, &video->frameEvent, GB_VIDEO_TOTAL_LENGTH);
}
video->p->memory.io[REG_STAT] = video->stat;
video->p->memory.io[GB_REG_STAT] = video->stat;
}
void GBVideoWriteSTAT(struct GBVideo* video, GBRegisterSTAT value) {
GBRegisterSTAT oldStat = video->stat;
video->stat = (video->stat & 0x7) | (value & 0x78);
if (!GBRegisterLCDCIsEnable(video->p->memory.io[REG_LCDC]) || video->p->model >= GB_MODEL_CGB) {
if (!GBRegisterLCDCIsEnable(video->p->memory.io[GB_REG_LCDC]) || video->p->model >= GB_MODEL_CGB) {
return;
}
if (!_statIRQAsserted(oldStat) && video->mode < 3) {
// TODO: variable for the IRQ line value?
video->p->memory.io[REG_IF] |= (1 << GB_IRQ_LCDSTAT);
video->p->memory.io[GB_REG_IF] |= (1 << GB_IRQ_LCDSTAT);
GBUpdateIRQs(video->p);
}
}
void GBVideoWriteLYC(struct GBVideo* video, uint8_t value) {
GBRegisterSTAT oldStat = video->stat;
if (GBRegisterLCDCIsEnable(video->p->memory.io[REG_LCDC])) {
if (GBRegisterLCDCIsEnable(video->p->memory.io[GB_REG_LCDC])) {
video->stat = GBRegisterSTATSetLYC(video->stat, value == video->ly);
if (!_statIRQAsserted(oldStat) && _statIRQAsserted(video->stat)) {
video->p->memory.io[REG_IF] |= (1 << GB_IRQ_LCDSTAT);
video->p->memory.io[GB_REG_IF] |= (1 << GB_IRQ_LCDSTAT);
GBUpdateIRQs(video->p);
}
}
video->p->memory.io[REG_STAT] = video->stat;
video->p->memory.io[GB_REG_STAT] = video->stat;
}
void GBVideoWritePalette(struct GBVideo* video, uint16_t address, uint8_t value) {
if (video->p->model < GB_MODEL_SGB) {
switch (address) {
case REG_BGP:
case GB_REG_BGP:
video->palette[0] = video->dmgPalette[value & 3];
video->palette[1] = video->dmgPalette[(value >> 2) & 3];
video->palette[2] = video->dmgPalette[(value >> 4) & 3];
@ -514,7 +514,7 @@ void GBVideoWritePalette(struct GBVideo* video, uint16_t address, uint8_t value)
video->renderer->writePalette(video->renderer, 2, video->palette[2]);
video->renderer->writePalette(video->renderer, 3, video->palette[3]);
break;
case REG_OBP0:
case GB_REG_OBP0:
video->palette[8 * 4 + 0] = video->dmgPalette[(value & 3) + 4];
video->palette[8 * 4 + 1] = video->dmgPalette[((value >> 2) & 3) + 4];
video->palette[8 * 4 + 2] = video->dmgPalette[((value >> 4) & 3) + 4];
@ -524,7 +524,7 @@ void GBVideoWritePalette(struct GBVideo* video, uint16_t address, uint8_t value)
video->renderer->writePalette(video->renderer, 8 * 4 + 2, video->palette[8 * 4 + 2]);
video->renderer->writePalette(video->renderer, 8 * 4 + 3, video->palette[8 * 4 + 3]);
break;
case REG_OBP1:
case GB_REG_OBP1:
video->palette[9 * 4 + 0] = video->dmgPalette[(value & 3) + 8];
video->palette[9 * 4 + 1] = video->dmgPalette[((value >> 2) & 3) + 8];
video->palette[9 * 4 + 2] = video->dmgPalette[((value >> 4) & 3) + 8];
@ -539,7 +539,7 @@ void GBVideoWritePalette(struct GBVideo* video, uint16_t address, uint8_t value)
video->renderer->writeVideoRegister(video->renderer, address, value);
} else {
switch (address) {
case REG_BCPD:
case GB_REG_BCPD:
if (video->mode != 3) {
if (video->bcpIndex & 1) {
video->palette[video->bcpIndex >> 1] &= 0x00FF;
@ -553,12 +553,12 @@ void GBVideoWritePalette(struct GBVideo* video, uint16_t address, uint8_t value)
if (video->bcpIncrement) {
++video->bcpIndex;
video->bcpIndex &= 0x3F;
video->p->memory.io[REG_BCPS] &= 0x80;
video->p->memory.io[REG_BCPS] |= video->bcpIndex;
video->p->memory.io[GB_REG_BCPS] &= 0x80;
video->p->memory.io[GB_REG_BCPS] |= video->bcpIndex;
}
video->p->memory.io[REG_BCPD] = video->palette[video->bcpIndex >> 1] >> (8 * (video->bcpIndex & 1));
video->p->memory.io[GB_REG_BCPD] = video->palette[video->bcpIndex >> 1] >> (8 * (video->bcpIndex & 1));
break;
case REG_OCPD:
case GB_REG_OCPD:
if (video->mode != 3) {
if (video->ocpIndex & 1) {
video->palette[8 * 4 + (video->ocpIndex >> 1)] &= 0x00FF;
@ -572,10 +572,10 @@ void GBVideoWritePalette(struct GBVideo* video, uint16_t address, uint8_t value)
if (video->ocpIncrement) {
++video->ocpIndex;
video->ocpIndex &= 0x3F;
video->p->memory.io[REG_OCPS] &= 0x80;
video->p->memory.io[REG_OCPS] |= video->ocpIndex;
video->p->memory.io[GB_REG_OCPS] &= 0x80;
video->p->memory.io[GB_REG_OCPS] |= video->ocpIndex;
}
video->p->memory.io[REG_OCPD] = video->palette[8 * 4 + (video->ocpIndex >> 1)] >> (8 * (video->ocpIndex & 1));
video->p->memory.io[GB_REG_OCPD] = video->palette[8 * 4 + (video->ocpIndex >> 1)] >> (8 * (video->ocpIndex & 1));
break;
}
}

4
src/platform/qt/AssetView.cpp
View File

@ -237,7 +237,7 @@ bool AssetView::lookupObjGB(int id, struct ObjInfo* info) {
const GBObj* obj = &gb->video.oam.obj[id];
unsigned height = 8;
GBRegisterLCDC lcdc = gb->memory.io[REG_LCDC];
GBRegisterLCDC lcdc = gb->memory.io[GB_REG_LCDC];
if (GBRegisterLCDCIsObjSize(lcdc)) {
height = 16;
}
@ -280,4 +280,4 @@ bool AssetView::ObjInfo::operator!=(const ObjInfo& other) const {
other.stride != stride ||
other.paletteId != paletteId ||
other.paletteSet != paletteSet;
}
}