diff --git a/src/arm/decoder-thumb.c b/src/arm/decoder-thumb.c
index 4074d5f88..6534aa2a0 100644
--- a/src/arm/decoder-thumb.c
+++ b/src/arm/decoder-thumb.c
@@ -138,7 +138,6 @@ DEFINE_DATA_FORM_5_DECODER_THUMB(MVN, MVN, ARM_OPERAND_AFFECTED_1)
 	DEFINE_THUMB_DECODER(NAME, MNEMONIC, \
 		info->op1.reg = (opcode & 0x0007) | H1; \
 		info->op2.reg = ((opcode >> 3) & 0x0007) | H2; \
-		info->accessesSpecialRegisters = info->op1.reg > 12 || info->op2.reg > 12; \
 		info->branches = info->op1.reg == ARM_PC; \
 		info->affectsCPSR = CPSR; \
 		info->operandFormat = ARM_OPERAND_REGISTER_1 | \
@@ -161,7 +160,6 @@ DEFINE_DECODER_WITH_HIGH_THUMB(MOV3, MOV, ARM_OPERAND_AFFECTED_1, 0)
 		info->op1.reg = RD; \
 		info->op2.reg = REG; \
 		info->op3.immediate = (opcode & 0x00FF) << 2; \
-		info->accessesSpecialRegisters = 1; \
 		info->operandFormat = ARM_OPERAND_REGISTER_1 | \
 			ARM_OPERAND_AFFECTED_1 | \
 			ARM_OPERAND_REGISTER_2 | \
@@ -172,7 +170,6 @@ DEFINE_DECODER_WITH_HIGH_THUMB(MOV3, MOV, ARM_OPERAND_AFFECTED_1, 0)
 		info->op1.reg = RD; \
 		info->memory.baseReg = REG; \
 		info->memory.offset.immediate = (opcode & 0x00FF) << 2; \
-		info->accessesSpecialRegisters = 1; \
 		info->operandFormat = ARM_OPERAND_REGISTER_1 | \
 			ARM_OPERAND_AFFECTED_1 | \
 			ARM_OPERAND_MEMORY_2; \
@@ -223,7 +220,6 @@ DEFINE_LOAD_STORE_WITH_REGISTER_THUMB(STRH2, STRH, STORE_CYCLES)
 #define DEFINE_LOAD_STORE_MULTIPLE_EX_THUMB(NAME, RN, MNEMONIC, SPECIAL_REG, ADDITIONAL_REG) \
 	DEFINE_THUMB_DECODER(NAME, MNEMONIC, \
 		info->memory.baseReg = RN; \
-		info->accessesSpecialRegisters = SPECIAL_REG; \
 		info->op1.immediate = (opcode & 0xFF) | ADDITIONAL_REG; \
 		info->branches = info->op1.immediate & (1 << ARM_PC); \
 		info->operandFormat = ARM_OPERAND_MEMORY_1; \
@@ -263,7 +259,6 @@ DEFINE_CONDITIONAL_BRANCH_THUMB(LE)
 	DEFINE_THUMB_DECODER(NAME, MNEMONIC, \
 		info->op1.reg = ARM_SP; \
 		info->op2.immediate = (opcode & 0x7F) << 2; \
-		info->accessesSpecialRegisters = 1; \
 		info->operandFormat = ARM_OPERAND_REGISTER_1 | \
 			ARM_OPERAND_AFFECTED_1 | \
 			ARM_OPERAND_IMMEDIATE_2;)
@@ -288,13 +283,11 @@ DEFINE_THUMB_DECODER(B, B,
 DEFINE_THUMB_DECODER(BL1, BLH,
 	int16_t immediate = (opcode & 0x07FF) << 5;
 	info->op1.immediate = (((int32_t) immediate) << 7);
-	info->operandFormat = ARM_OPERAND_IMMEDIATE_1;
-	info->accessesSpecialRegisters = 1;)
+	info->operandFormat = ARM_OPERAND_IMMEDIATE_1;)
 
 DEFINE_THUMB_DECODER(BL2, BL,
 	info->op1.immediate = (opcode & 0x07FF) << 1;
 	info->operandFormat = ARM_OPERAND_IMMEDIATE_1;
-	info->accessesSpecialRegisters = 1;
 	info->branches = 1;)
 
 DEFINE_THUMB_DECODER(BX, BX,
@@ -317,7 +310,6 @@ void ARMDecodeThumb(uint16_t opcode, struct ThumbInstructionInfo* info) {
 	info->opcode = opcode;
 	info->branches = 0;
 	info->traps = 0;
-	info->accessesSpecialRegisters = 0;
 	info->affectsCPSR = 0;
 	info->condition = ARM_CONDITION_AL;
 	info->sDataCycles = 0;
diff --git a/src/arm/decoder.h b/src/arm/decoder.h
index b5ae3d865..3d6009fcf 100644
--- a/src/arm/decoder.h
+++ b/src/arm/decoder.h
@@ -136,7 +136,6 @@ struct ThumbInstructionInfo {
 	int operandFormat;
 	int branches;
 	int traps;
-	int accessesSpecialRegisters;
 	int affectsCPSR;
 	int condition;
 	int sDataCycles;