From 9a0d14645b1acd3dd67453ccecfc8b074e794518 Mon Sep 17 00:00:00 2001 From: Jeffrey Pfau Date: Wed, 10 Apr 2013 22:52:46 -0700 Subject: [PATCH] Log stubs --- src/arm.h | 2 ++ src/gba.c | 16 +++++++++++++++ src/gba.h | 4 ++++ src/isa-arm.c | 51 ++++++++++++++++++++++++----------------------- src/isa-inlines.h | 2 ++ 5 files changed, 50 insertions(+), 25 deletions(-) diff --git a/src/arm.h b/src/arm.h index 5136b76f4..6b9b5e25a 100644 --- a/src/arm.h +++ b/src/arm.h @@ -85,6 +85,8 @@ struct ARMMemory { struct ARMBoard { struct ARMCore* cpu; void (*reset)(struct ARMBoard* board); + + void (*hitStub)(struct ARMBoard* board, uint32_t opcode); }; struct ARMCore { diff --git a/src/gba.c b/src/gba.c index 57d9e6596..43a7bc88f 100644 --- a/src/gba.c +++ b/src/gba.c @@ -1,11 +1,14 @@ #include "gba.h" +#include +#include #include #include static const char* GBA_CANNOT_MMAP = "Could not map memory"; static void GBASetActiveRegion(struct ARMMemory* memory, uint32_t region); +static void GBAHitStub(struct ARMBoard* board, uint32_t opcode); void GBAInit(struct GBA* gba) { gba->errno = GBA_NO_ERROR; @@ -60,6 +63,7 @@ void GBAMemoryDeinit(struct GBAMemory* memory) { void GBABoardInit(struct GBABoard* board) { board->d.reset = GBABoardReset; + board->d.hitStub = GBAHitStub; } void GBABoardReset(struct ARMBoard* board) { @@ -367,3 +371,15 @@ void GBAStore8(struct ARMMemory* memory, uint32_t address, int8_t value) { break; } } + +void GBALog(int level, const char* format, ...) { + va_list args; + va_start(args, format); + vprintf(format, args); + va_end(args); + printf("\n"); +} + +void GBAHitStub(struct ARMBoard* board, uint32_t opcode) { + GBALog(GBA_LOG_STUB, "Stub opcode: %08x", opcode); +} diff --git a/src/gba.h b/src/gba.h index 77700c634..3de802d41 100644 --- a/src/gba.h +++ b/src/gba.h @@ -8,6 +8,10 @@ enum GBAError { GBA_OUT_OF_MEMORY = -1 }; +enum GBALogLevel { + GBA_LOG_STUB +}; + enum GBAMemoryRegion { REGION_BIOS = 0x0, REGION_WORKING_RAM = 0x2, diff --git a/src/isa-arm.c b/src/isa-arm.c index fbe0cb95e..181d9a89d 100644 --- a/src/isa-arm.c +++ b/src/isa-arm.c @@ -345,18 +345,18 @@ DEFINE_ALU_INSTRUCTION_S_ONLY_ARM(TST, ARM_NEUTRAL_S(cpu->gprs[rn], cpu->shifter // Begin multiply definitions -DEFINE_INSTRUCTION_ARM(MLA,) -DEFINE_INSTRUCTION_ARM(MLAS,) -DEFINE_INSTRUCTION_ARM(MUL,) -DEFINE_INSTRUCTION_ARM(MULS,) -DEFINE_INSTRUCTION_ARM(SMLAL,) -DEFINE_INSTRUCTION_ARM(SMLALS,) -DEFINE_INSTRUCTION_ARM(SMULL,) -DEFINE_INSTRUCTION_ARM(SMULLS,) -DEFINE_INSTRUCTION_ARM(UMLAL,) -DEFINE_INSTRUCTION_ARM(UMLALS,) -DEFINE_INSTRUCTION_ARM(UMULL,) -DEFINE_INSTRUCTION_ARM(UMULLS,) +DEFINE_INSTRUCTION_ARM(MLA, ARM_STUB) +DEFINE_INSTRUCTION_ARM(MLAS, ARM_STUB) +DEFINE_INSTRUCTION_ARM(MUL, ARM_STUB) +DEFINE_INSTRUCTION_ARM(MULS, ARM_STUB) +DEFINE_INSTRUCTION_ARM(SMLAL, ARM_STUB) +DEFINE_INSTRUCTION_ARM(SMLALS, ARM_STUB) +DEFINE_INSTRUCTION_ARM(SMULL, ARM_STUB) +DEFINE_INSTRUCTION_ARM(SMULLS, ARM_STUB) +DEFINE_INSTRUCTION_ARM(UMLAL, ARM_STUB) +DEFINE_INSTRUCTION_ARM(UMLALS, ARM_STUB) +DEFINE_INSTRUCTION_ARM(UMULL, ARM_STUB) +DEFINE_INSTRUCTION_ARM(UMULLS, ARM_STUB) // End multiply definitions @@ -395,11 +395,11 @@ DEFINE_LOAD_STORE_T_INSTRUCTION_ARM(STRT, \ cpu->memory->store8(cpu->memory, address, cpu->gprs[rd]); \ ARMSetPrivilegeMode(cpu, priv);) -DEFINE_LOAD_STORE_MULTIPLE_INSTRUCTION_ARM(LDM,) -DEFINE_LOAD_STORE_MULTIPLE_INSTRUCTION_ARM(STM,) +DEFINE_LOAD_STORE_MULTIPLE_INSTRUCTION_ARM(LDM, ARM_STUB) +DEFINE_LOAD_STORE_MULTIPLE_INSTRUCTION_ARM(STM, ARM_STUB) -DEFINE_INSTRUCTION_ARM(SWP,) -DEFINE_INSTRUCTION_ARM(SWPB,) +DEFINE_INSTRUCTION_ARM(SWP, ARM_STUB) +DEFINE_INSTRUCTION_ARM(SWPB, ARM_STUB) // End load/store definitions @@ -411,14 +411,15 @@ DEFINE_INSTRUCTION_ARM(B, \ cpu->gprs[ARM_PC] += offset; \ ARM_WRITE_PC;) -DEFINE_INSTRUCTION_ARM(BL,) -DEFINE_INSTRUCTION_ARM(BX,) +DEFINE_INSTRUCTION_ARM(BL, ARM_STUB) +DEFINE_INSTRUCTION_ARM(BX, ARM_STUB) // End branch definitions -// TODO -DEFINE_INSTRUCTION_ARM(BKPT,) -DEFINE_INSTRUCTION_ARM(ILL,) // Illegal opcode +// Begin miscellaneous definitions + +DEFINE_INSTRUCTION_ARM(BKPT, ARM_STUB) // Not strictly in ARMv4T, but here for convenience +DEFINE_INSTRUCTION_ARM(ILL, ARM_STUB) // Illegal opcode DEFINE_INSTRUCTION_ARM(MSR, \ int c = opcode & 0x00010000; \ @@ -449,10 +450,10 @@ DEFINE_INSTRUCTION_ARM(MSR, \ } \ }) -DEFINE_INSTRUCTION_ARM(MRS,) -DEFINE_INSTRUCTION_ARM(MSRI,) -DEFINE_INSTRUCTION_ARM(MRSI,) -DEFINE_INSTRUCTION_ARM(SWI,) +DEFINE_INSTRUCTION_ARM(MRS, ARM_STUB) +DEFINE_INSTRUCTION_ARM(MSRI, ARM_STUB) +DEFINE_INSTRUCTION_ARM(MRSI, ARM_STUB) +DEFINE_INSTRUCTION_ARM(SWI, ARM_STUB) #define DECLARE_INSTRUCTION_ARM(EMITTER, NAME) \ EMITTER ## NAME diff --git a/src/isa-inlines.h b/src/isa-inlines.h index b6b0b5219..681bb99d3 100644 --- a/src/isa-inlines.h +++ b/src/isa-inlines.h @@ -52,6 +52,8 @@ #define ARM_V_ADDITION(M, N, D) (!(ARM_SIGN((M) ^ (N))) && (ARM_SIGN((M) ^ (D))) && (ARM_SIGN((N) ^ (D)))) #define ARM_V_SUBTRACTION(M, N, D) ((ARM_SIGN((M) ^ (N))) && (ARM_SIGN((M) ^ (D)))) +#define ARM_STUB cpu->board->hitStub(cpu->board, opcode) + static inline int _ARMModeHasSPSR(enum PrivilegeMode mode) { return mode != MODE_SYSTEM && mode != MODE_USER; }