From 97ce972b2a9366589c660246e527ebcd5341e7ee Mon Sep 17 00:00:00 2001
From: Jeffrey Pfau <jeffrey@endrift.com>
Date: Sun, 14 Apr 2013 02:49:07 -0700
Subject: [PATCH] Implement LSR(2)

---
 src/isa-thumb.c | 18 +++++++++++++++++-
 1 file changed, 17 insertions(+), 1 deletion(-)

diff --git a/src/isa-thumb.c b/src/isa-thumb.c
index 917f7703e..8d0df264b 100644
--- a/src/isa-thumb.c
+++ b/src/isa-thumb.c
@@ -181,7 +181,23 @@ DEFINE_DATA_FORM_3_INSTRUCTION_THUMB(SUB2, ARM_STUB)
 DEFINE_DATA_FORM_5_INSTRUCTION_THUMB(AND, cpu->gprs[rd] = cpu->gprs[rd] & cpu->gprs[rn]; THUMB_NEUTRAL_S( , , cpu->gprs[rd]))
 DEFINE_DATA_FORM_5_INSTRUCTION_THUMB(EOR, cpu->gprs[rd] = cpu->gprs[rd] ^ cpu->gprs[rn]; THUMB_NEUTRAL_S( , , cpu->gprs[rd]))
 DEFINE_DATA_FORM_5_INSTRUCTION_THUMB(LSL2, ARM_STUB)
-DEFINE_DATA_FORM_5_INSTRUCTION_THUMB(LSR2, ARM_STUB)
+DEFINE_DATA_FORM_5_INSTRUCTION_THUMB(LSR2, \
+		int rs = cpu->gprs[rn] & 0xFF; \
+		if (rs) { \
+			if (rs < 32) { \
+				cpu->cpsr.c = cpu->gprs[rd] & (1 << (rs - 1)); \
+				cpu->gprs[rd] = (uint32_t) cpu->gprs[rd] >> rs; \
+			} else { \
+				if (rs > 32) { \
+					cpu->cpsr.c = 0; \
+				} else { \
+					cpu->cpsr.c = ARM_SIGN(cpu->gprs[rd]); \
+				} \
+				cpu->gprs[rd] = 0; \
+			} \
+		} \
+		THUMB_NEUTRAL_S( , , cpu->gprs[rd]))
+
 DEFINE_DATA_FORM_5_INSTRUCTION_THUMB(ASR2, \
 		int rs = cpu->gprs[rn] & 0xFF; \
 		if (rs) { \