From 93a839f52a1748c7768c80968571a9d42ef8fbec Mon Sep 17 00:00:00 2001 From: Jeffrey Pfau Date: Sat, 27 Feb 2016 01:12:23 -0800 Subject: [PATCH] GB Memory: Clean up MBC1 --- src/gb/memory.c | 20 ++++++++++++++++++-- src/gb/memory.h | 5 +++++ 2 files changed, 23 insertions(+), 2 deletions(-) diff --git a/src/gb/memory.c b/src/gb/memory.c index dde742bc8..1e65a558d 100644 --- a/src/gb/memory.c +++ b/src/gb/memory.c @@ -438,8 +438,8 @@ static void _switchBank(struct GBMemory* memory, int bank) { size_t bankStart = bank * GB_SIZE_CART_BANK0; if (bankStart + GB_SIZE_CART_BANK0 > memory->romSize) { mLOG(GB_MBC, GAME_ERROR, "Attempting to switch to an invalid ROM bank: %0X", bank); - bankStart &= (GB_SIZE_CART_BANK0 - 1); - bank /= GB_SIZE_CART_BANK0; + bankStart &= (memory->romSize - 1); + bank = bankStart / GB_SIZE_CART_BANK0; } memory->romBank = &memory->rom[bankStart]; memory->currentBank = bank; @@ -496,6 +496,22 @@ void _GBMBC1(struct GBMemory* memory, uint16_t address, uint8_t value) { } _switchBank(memory, bank | (memory->currentBank & 0x60)); break; + case 0x2: + bank &= 3; + if (!memory->mbcState.mbc1.mode) { + _switchBank(memory, (bank << 5) | (memory->currentBank & 0x1F)); + } else { + _switchSramBank(memory, bank); + } + break; + case 0x3: + memory->mbcState.mbc1.mode = value & 1; + if (memory->mbcState.mbc1.mode) { + _switchBank(memory, memory->currentBank & 0x1F); + } else { + _switchSramBank(memory, 0); + } + break; default: // TODO mLOG(GB_MBC, STUB, "MBC1 unknown address: %04X:%02X", address, value); diff --git a/src/gb/memory.h b/src/gb/memory.h index f3b25a162..ac8c09124 100644 --- a/src/gb/memory.h +++ b/src/gb/memory.h @@ -90,6 +90,10 @@ enum GBMBC7MachineState { GBMBC7_STATE_WRITE = 8, }; +struct GBMBC1State { + int mode; +}; + struct GBMBC7State { enum GBMBC7MachineState state; uint32_t sr; @@ -101,6 +105,7 @@ struct GBMBC7State { }; union GBMBCState { + struct GBMBC1State mbc1; struct GBMBC7State mbc7; };