mirror of https://github.com/mgba-emu/mgba.git
GB Memory: Fix OAM DMA from top 8 kB
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673f4aa149
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1
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@ -6,6 +6,7 @@ Emulation fixes:
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- ARM: Fix ALU reading PC after shifting
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- ARM: Fix ALU reading PC after shifting
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- ARM: Fix STR storing PC after address calculation
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- ARM: Fix STR storing PC after address calculation
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- GB: Partially fix timing for skipped BIOS
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- GB: Partially fix timing for skipped BIOS
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- GB Memory: Fix OAM DMA from top 8 kB
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- GB MBC: Fix MBC1 mode changing behavior
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- GB MBC: Fix MBC1 mode changing behavior
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- GB MBC: Fix MBC1 RAM enable bit selection
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- GB MBC: Fix MBC1 RAM enable bit selection
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- GB MBC: Fix MBC2 bit selection
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- GB MBC: Fix MBC2 bit selection
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After Width: | Height: | Size: 528 B |
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@ -1,2 +0,0 @@
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[testinfo]
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fail=1
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@ -193,7 +193,7 @@ void GBIOReset(struct GB* gb) {
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GBIOWrite(gb, REG_SCY, 0x00);
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GBIOWrite(gb, REG_SCY, 0x00);
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GBIOWrite(gb, REG_SCX, 0x00);
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GBIOWrite(gb, REG_SCX, 0x00);
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GBIOWrite(gb, REG_LYC, 0x00);
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GBIOWrite(gb, REG_LYC, 0x00);
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GBIOWrite(gb, REG_DMA, 0xFF);
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gb->memory.io[REG_DMA] = 0xFF;
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GBIOWrite(gb, REG_BGP, 0xFC);
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GBIOWrite(gb, REG_BGP, 0xFC);
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if (gb->model < GB_MODEL_CGB) {
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if (gb->model < GB_MODEL_CGB) {
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GBIOWrite(gb, REG_OBP0, 0xFF);
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GBIOWrite(gb, REG_OBP0, 0xFF);
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@ -519,8 +519,8 @@ uint8_t GBView8(struct SM83Core* cpu, uint16_t address, int segment) {
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}
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}
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void GBMemoryDMA(struct GB* gb, uint16_t base) {
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void GBMemoryDMA(struct GB* gb, uint16_t base) {
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if (base > 0xF100) {
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if (base >= 0xE000) {
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return;
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base &= 0xDFFF;
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}
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}
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mTimingDeschedule(&gb->timing, &gb->memory.dmaEvent);
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mTimingDeschedule(&gb->timing, &gb->memory.dmaEvent);
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mTimingSchedule(&gb->timing, &gb->memory.dmaEvent, 8);
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mTimingSchedule(&gb->timing, &gb->memory.dmaEvent, 8);
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