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ARM: Fix LDM^ writeback to user-mode register

This commit is contained in:
Vicki Pfau 2020-06-26 01:17:19 -07:00
parent 2ec57def29
commit 8ef0427885
2 changed files with 3 additions and 2 deletions
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1
CHANGES
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@ -5,6 +5,7 @@ Features:
Emulation fixes: Emulation fixes:
- ARM: Fix ALU reading PC after shifting - ARM: Fix ALU reading PC after shifting
- ARM: Fix STR storing PC after address calculation - ARM: Fix STR storing PC after address calculation
- ARM: Fix LDM^ writeback to user-mode register
- GB: Partially fix timing for skipped BIOS - GB: Partially fix timing for skipped BIOS
- GB Memory: Fix OAM DMA from top 8 kB - GB Memory: Fix OAM DMA from top 8 kB
- GB MBC: Fix MBC1 mode changing behavior - GB MBC: Fix MBC1 mode changing behavior

4
src/arm/isa-arm.c
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@ -446,9 +446,9 @@ ATTRIBUTE_NOINLINE static void _neutralS(struct ARMCore* cpu, int32_t d) {
uint32_t address = cpu->gprs[rn]; \ uint32_t address = cpu->gprs[rn]; \
S_PRE; \ S_PRE; \
address = cpu->memory. LS ## Multiple(cpu, address, rs, LSM_ ## DIRECTION, &currentCycles); \ address = cpu->memory. LS ## Multiple(cpu, address, rs, LSM_ ## DIRECTION, &currentCycles); \
WRITEBACK; \
S_POST; \ S_POST; \
POST_BODY; \ POST_BODY;)
WRITEBACK;)
#define DEFINE_LOAD_STORE_MULTIPLE_INSTRUCTION_ARM(NAME, LS, POST_BODY) \ #define DEFINE_LOAD_STORE_MULTIPLE_INSTRUCTION_ARM(NAME, LS, POST_BODY) \